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MX29F800C T/B

8M-BIT [1024K x 8 / 512K x 16] SINGLE VOLTAGE 5V ONLY FLASH MEMORY

FEATURES

GENERAL FEATURES• SinglePowerSupplyOperation -4.5to5.5voltforread,erase,andprogramoperations• 1,048,576x8/524,288x16switchable• BootSectorArchitecture -T=TopBootSector -B=BottomBootSector• SectorStructure -16K-Bytex1,8K-Bytex2,32K-Bytex1,and64K-Bytex15• Sectorprotection -Hardwaremethodtodisableanycombinationofsectorsfromprogramoreraseoperations -Temporarysectorunprotectedallowscodechangesinpreviouslylockedsectors• Latch-upprotectedto100mAfrom-1VtoVcc+1V• CompatiblewithJEDECstandard -PinoutandsoftwarecompatibletosinglepowersupplyFlash

PERFORMANCE• HighPerformance -Accesstime:70ns -Byte/Wordprogramtime:9us/11us(typical) -Erasetime:0.7s/sector,8s/chip(typical)• LowPowerConsumption -Lowactivereadcurrent:40mA(maximum)at5MHz -Lowstandbycurrent:1uA(typical)• Minimum100,000erase/programcycle• 20yearsdataretention

SOFTWARE FEATURES• EraseSuspend/EraseResume -Suspendssector eraseoperation to readdata fromorprogramdata toanother sectorwhich is not beingerased

• StatusReply -Data#Polling&Togglebitsprovidedetectionofprogramanderaseoperationcompletion

HARDWARE FEATURES• Ready/Busy#(RY/BY#)Output -Providesahardwaremethodofdetectingprogramanderaseoperationcompletion• HardwareReset(RESET#)Input -Providesahardwaremethodtoresettheinternalstatemachinetoreadmode

PACKAGE • 44-PinSOP• 48-PinTSOP• 48-BallLFBGA(6x8mm)• All devices are RoHS Compliant• All non RoHS Compliant devices are not recommeded for new design in

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MX29F800C T/B

PIN CONFIGURATIONS

44 SOP(500mil)

48 TSOP(TYPE I) (12mm x 20mm)

2345678910111213141516171819202122

44434241403938373635343332313029282726252423

RY/BY#A18A17

A7A6A5A4A3A2A1A0

CE#GNDOE#

Q0Q8Q1Q9Q2

Q10Q3

Q11

RESET#WE#A8A9A10A11A12A13A14A15A16BYTE#GNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCC

MX2

9F80

0CT/

CB

A15A14A13A12A11A10A9A8NCNC

WE#RESET#

NCNC

RY/BY#A18A17A7A6A5A4A3A2A1

123456789101112131415161718192021222324

A16BYTE#GNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCQ11Q3Q10Q2Q9Q1Q8Q0OE#GNDCE#A0

484746454443424140393837363534333231302928272625

MX29F800C T/B

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MX29F800C T/B

LOGIC SYMBOLPIN DESCRIPTION

SYMBOL PIN NAMEA0~A18 AddressInput

Q0~Q14 DataInput/Output

Q15/A-1 Q15(Wordmode)/LSBaddr(Bytemode)

CE# ChipEnableInput

WE# WriteEnableInput

BYTE# Word/ByteSelectioninput

RESET# HardwareResetPin/SectorProtectUnlock

OE# OutputEnableInput

RY/BY# Ready/BusyOutput

VCC PowerSupplyPin(+5V)

GND GroundPin

16 or 8Q0-Q15

(A-1)

RY/BY#

A0-A18

CE#

OE#

WE#

RESET#

BYTE#

19

A136

5

4

3

2

1

A B C D E F G H

A9

A7

A3

WE#

RY/BY#

A12

A8

NC

A17

A4

A14

A10

NC

A18

A6

A2

A15

A11

RE-SET# NC

NC

A5

A1

A16

Q7

Q5

Q2

Q0

A0

BYTE# Q15/A-1

Q14

Q12

Q10

Q8

Q13

VCC

Q11

Q9

GND

Q6

Q4

Q3

Q1

GNDCE# OE#

48-Ball LFBGA (6x8mm)

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MX29F800C T/B

BLOCK DIAGRAM

CONTROLINPUTLOGIC

PROGRAM/ERASE

HIGH VOLTAGE

WRITE

STATE

MACHINE

(WSM)

STATE

REGISTERFLASHARRAY

X-DEC

OD

ERADDRESS

LATCH

AND

BUFFER Y-PASS GATE

Y-DEC

OD

ER

ARRAYSOURCE

HVCOMMANDDATA

DECODER

COMMAND

DATA LATCH

I/O BUFFER

PGMDATA

HV

PROGRAMDATA LATCH

SENSEAMPLIFIER

Q0-Q15/A-1

A0-AM

AM: MSB address

CE#OE#WE#

RESET#BYTE#

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MX29F800C T/B

Table 1. SECTOR STRUCTURE

Note: AddressrangeisA18~A-1inbytemodeandA18~A0inwordmode.

MX29F800CT TOP BOOT SECTOR ADDRESS TABLE

MX29F800CB BOTTOM BOOT SECTOR ADDRESS TABLE

Sector Sector Size Address range Sector AddressByte Mode Word Mode Byte Mode (x8) Word Mode(x16) A18 A17 A16 A15 A14 A13 A12

SA0 64Kbytes 32Kwords 00000h-0FFFFh 00000h-07FFFh 0 0 0 0 X X XSA1 64Kbytes 32Kwords 10000h-1FFFFh 08000h-0FFFFh 0 0 0 1 X X XSA2 64Kbytes 32Kwords 20000h-2FFFFh 10000h-17FFFh 0 0 1 0 X X XSA3 64Kbytes 32Kwords 30000h-3FFFFh 18000h-1FFFFh 0 0 1 1 X X XSA4 64Kbytes 32Kwords 40000h-4FFFFh 20000h-27FFFh 0 1 0 0 X X XSA5 64Kbytes 32Kwords 50000h-5FFFFh 28000h-2FFFFh 0 1 0 1 X X XSA6 64Kbytes 32Kwords 60000h-6FFFFh 30000h-37FFFh 0 1 1 0 X X XSA7 64Kbytes 32Kwords 70000h-7FFFFh 38000h-3FFFFh 0 1 1 1 X X XSA8 64Kbytes 32Kwords 80000h-8FFFFh 40000h-47FFFh 1 0 0 0 X X XSA9 64Kbytes 32Kwords 90000h-9FFFFh 48000h-4FFFFh 1 0 0 1 X X XSA10 64Kbytes 32Kwords A0000h-AFFFFh 50000h-57FFFh 1 0 1 0 X X XSA11 64Kbytes 32Kwords B0000h-BFFFFh 58000h-5FFFFh 1 0 1 1 X X XSA12 64Kbytes 32Kwords C0000h-CFFFFh 60000h-67FFFh 1 1 0 0 X X XSA13 64Kbytes 32Kwords D0000h-DFFFFh 68000h-6FFFFh 1 1 0 1 X X XSA14 64Kbytes 32Kwords E0000h-EFFFFh 70000h-77FFFh 1 1 1 0 X X XSA15 32Kbytes 16Kwords F0000h-F7FFFh 78000h-7BFFFh 1 1 1 1 0 X XSA16 8Kbytes 4Kwords F8000h-F9FFFh 7C000h-7CFFFh 1 1 1 1 1 0 0SA17 8Kbytes 4Kwords FA000h-FBFFFh 7D000h-7DFFFh 1 1 1 1 1 0 1SA18 16Kbytes 8Kwords FC000h-FFFFFh 7E000h-7FFFFh 1 1 1 1 1 1 X

Sector Sector Size Address range Sector AddressByte Mode Word Mode Byte Mode (x8) Word Mode(x16) A18 A17 A16 A15 A14 A13 A12

SA0 16Kbytes 8Kwords 00000h-03FFFh 00000h-01FFFh 0 0 0 0 0 0 XSA1 8Kbytes 4Kwords 04000h-05FFFh 02000h-02FFFh 0 0 0 0 0 1 0SA2 8Kbytes 4Kwords 06000h-07FFFh 03000h-03FFFh 0 0 0 0 0 1 1SA3 32Kbytes 16Kwords 08000h-0FFFFh 04000h-07FFFh 0 0 0 0 1 X XSA4 64Kbytes 32Kwords 10000h-1FFFFh 08000h-0FFFFh 0 0 0 1 X X XSA5 64Kbytes 32Kwords 20000h-2FFFFh 10000h-17FFFh 0 0 1 0 X X XSA6 64Kbytes 32Kwords 30000h-3FFFFh 18000h-1FFFFh 0 0 1 1 X X XSA7 64Kbytes 32Kwords 40000h-4FFFFh 20000h-27FFFh 0 1 0 0 X X XSA8 64Kbytes 32Kwords 50000h-5FFFFh 28000h-2FFFFh 0 1 0 1 X X XSA9 64Kbytes 32Kwords 60000h-6FFFFh 30000h-37FFFh 0 1 1 0 X X XSA10 64Kbytes 32Kwords 70000h-7FFFFh 38000h-3FFFFh 0 1 1 1 X X XSA11 64Kbytes 32Kwords 80000h-8FFFFh 40000h-47FFFh 1 0 0 0 X X XSA12 64Kbytes 32Kwords 90000h-9FFFFh 48000h-4FFFFh 1 0 0 1 X X XSA13 64Kbytes 32Kwords A0000h-AFFFFh 50000h-57FFFh 1 0 1 0 X X XSA14 64Kbytes 32Kwords B0000h-BFFFFh 58000h-5FFFFh 1 0 1 1 X X XSA15 64Kbytes 32Kwords C0000h-CFFFFh 60000h-67FFFh 1 1 0 0 X X XSA16 64Kbytes 32Kwords D0000h-DFFFFh 68000h-6FFFFh 1 1 0 1 X X XSA17 64Kbytes 32Kwords E0000h-EFFFFh 70000h-77FFFh 1 1 1 0 X X XSA18 64Kbytes 32Kwords F0000h-FFFFFh 78000h-7FFFFh 1 1 1 1 X X X

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MX29F800C T/B

Table 2. BUS OPERATION

Notes:1.Vhvistheveryhighvoltage,11.5Vto12.5V.2.Xmeansinputhigh(Vih)orinputlow(Vil).3.SAmeanssectoraddress:A12~A18.4.Code=00H/XX00Hmeansunprotected. Code=01H/XX01Hmeansprotected.

Mode Pins CE# OE# WE# RESET# A0 A1 A6 A9 Q0 ~ Q15

ReadSiliconIDManufactureCode

L L H H L L X Vhv C2H(Bytemode)00C2H(Wordmode)

ReadSiliconIDDeviceCode

L L H H H L X Vhv D6/58(Bytemode)22D6/2258(Wordmode)

Read L L H H A0 A1 A6 A9 DOUT

Standby H X X H X X X X HIGHZOutputDisable L H H H X X X X HIGHZWrite L H L H A0 A1 A6 A9 DIN

SectorProtect L H L Vhv L H L X DIN

ChipUnprotect L H L Vhv L H H X DIN

VerifySectorProtect/Unprotect L L H H L H L Vhv Code(4)Reset X X X L X X X X HIGHZ

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MX29F800C T/B

REQUIREMENTS FOR READING ARRAY DATA

Readarrayactionistoreadthedatastoredinthearrayout.Whilethememorydeviceisinpowereduporhasbeenreset,itwillautomaticallyenterthestatusofreadarray.Ifthemicroprocessorwantstoreadthedatastoredinarray,ithastodriveCE#(deviceenablecontrolpin)andOE#(Outputcontrolpin)asVil,andinputtheaddressofthedatatobereadintoaddresspinatthesametime.Afteraperiodofreadcycle(TceorTaa),thedatabeingreadoutwillbedisplayedonoutputpinformicroprocessortoaccess.IfCE#orOE#isVih,theoutputwillbeintri-state,andtherewillbenodatadisplayedonoutputpinatall.

Afterthememorydevicecompletesembeddedoperation(automaticEraseorProgram),itwillautomaticallyre-turntothestatusofreadarray,andthedevicecanreadthedatainanyaddressinthearray.Intheprocessoferasing, if thedevicereceives theErasesuspendcommand,eraseoperationwillbestoppedafteraperiodoftimenomorethanTreadyandthedevicewillreturntothestatusofreadarray.Atthistime,thedevicecanreadthedatastoredinanyaddressexceptthesectorbeingerasedinthearray.Inthestatusoferasesuspend,ifuserwantstoreadthedatainthesectorsbeingerased,thedevicewilloutputstatusdataontotheoutput.Similarly,ifprogramcommandisissuedaftererasesuspend,afterprogramoperationiscompleted,systemcanstillreadar-raydatainanyaddressexceptthesectorstobeerased.Thedeviceneedsto issueresetcommandtoenablereadarrayoperationagaininordertoarbitrarilyreadthedatainthearrayinthefollowingtwosituations:

1.Inprogramoreraseoperation,theprogrammingorerasingfailurecausesQ5togohigh.

2.Thedeviceisinautoselectmode.

In the twosituationsabove, if resetcommand isnot issued, thedevice isnot in readarraymodeandsystemmustissueresetcommandbeforereadingarraydata.

WRITE COMMANDS/COMMAND SEQUENCES

Towriteacommandtothedevice,systemmustdriveWE#andCE#toVil,andOE#toVih.Inacommandcycle,alladdressare latchedat the later fallingedgeofCE#andWE#,andalldataare latchedat theearlier risingedgeofCE#andWE#.

Figure1illustratestheACtimingwaveformofawritecommand,andTable3definesallthevalidcommandsetsofthedevice.Systemisnotallowedtowriteinvalidcommandsnotdefinedinthisdatasheet.Writinganinvalidcommandwillbringthedevicetoanundefinedstate.

RESET# OPERATION

DrivingRESET#pinlowforaperiodmorethanTrpwillresetthedevicebacktoreadmode.Ifthedeviceisinprogramoreraseoperation,theresetoperationwill takeatmostaperiodofTreadyforthedevicetoreturntoreadarraymode.Beforethedevicereturnstoreadarraymode,theRY/BY#pinremainslow(busystatus).

WhenRESET#pinisheldatGND±0.3V,thedeviceconsumesstandbycurrent(Isb).However,devicedrawslarg-ercurrentifRESET#pinisheldatVilbutnotwithinGND±0.3V.

ItisrecommendedthatthesystemtotieitsresetsignaltoRESET#pinofflashmemory,sothattheflashmemo-rywillberesetduringsystemresetandallowssystemtoreadbootcodefromflashmemory.

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MX29F800C T/B

SECTOR PROTECT OPERATION

Whenasectorisprotected,programoreraseoperationwillbedisabledonthesesectors.MX29F800CT/Bpro-videsonemethodforsectorprotection.

Oncethesectorisprotected,thesectorremainsprotecteduntilnextchipunprotect,oristemporarilyunprotectedbyassertingRESET#pinatVhv.Refertotemporarysectorunprotectoperationforfurtherdetails.

ThismethodisbyapplyingVhvonRESET#pin.RefertoFigure12fortimingdiagramandFigure13fortheal-gorithmforthismethod.

CHIP UNPROTECT OPERATION

MX29F800CT/Bprovidesonemethod for chipunprotect.Thechipunprotectoperationunprotectsall sectorswithinthedevice.Itisrecommendedtoprotectallsectorsbeforeactivatingchipunprotectmode.Allsectorareunprotectedwhenshippedfromthefactory.

ThismethodisbyapplyingVhvonRESET#pin.RefertoFigure12fortimingdiagramandFigure13foralgo-rithmoftheoperation.

TEMPORARY SECTOR UNPROTECT OPERATION

SystemcanapplyRESET#pinatVhvtoplacethedeviceintemporaryunprotectmode.Inthismode,previouslyprotectedsectorscanbeprogrammedorerasedjustasitisunprotected.Thedevicesreturnstonormalopera-tiononceVhvisremovedfromRESET#pinandpreviouslyprotectedsectorsareagainprotected.

AUTOMATIC SELECT OPERATION

When thedevice is inReadarraymodeorerase-suspendedreadarraymode,usercan issuereadsilicon IDcommandtoenterreadsiliconIDmode.AfterenteringreadsiliconIDmode,usercanqueryseveralsiliconIDscontinuouslyanddoesnotneed to issuereadsilicon IDmodeagain.WhenA0 isLow,devicewilloutputMa-cronixManufactureIDC2.WhenA0ishigh,devicewilloutputDeviceID.InreadsiliconIDmode,issuingresetcommandwillresetdevicebacktoreadarraymodeorerase-suspendedreadarraymode.

AnotherwaytoenterreadsiliconIDistoapplyhighvoltageonA9pinwithCE#,OE#andA1atVil.WhilethehighvoltageofA9pin isdischarged,devicewillautomatically leavereadsiliconIDmodeandgobacktoreadarraymodeorerase-suspendedreadarraymode.WhenA0isLow,devicewilloutputMacronixManufactureIDC2.WhenA0ishigh,devicewilloutputDeviceID.

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MX29F800C T/B

VERIFY SECTOR PROTECT STATUS OPERATION

MX29F800CT/BprovideshardwaresectorprotectionagainstProgramandEraseoperation forprotectedsec-tors.ThesectorprotectstatuscanbereadthroughSectorProtectVerifycommand.ThismethodrequiresVhvonA9pin,VihonWE#andA1pins,VilonCE#,OE#,A6andA0pins,andsectoraddressonA12toA17pins.Ifthereadoutdatais01H,thedesignatedsectorisprotected.Oppositely,ifthereadoutdatais00H,thedesignatedsectorisstillnotbeingprotected.

DATA PROTECTION

Toavoidaccidentalerasureorprogrammingofthedevice,thedeviceisautomaticallyresettoreadarraymodeduringpowerup.Besides,onlyaftersuccessfulcompletionofthespecifiedcommandsetswillthedevicebeginitseraseorprogramoperation.

Otherfeaturestoprotectthedatafromaccidentalalternationaredescribedasfollowed.

WRITE PULSE "GLITCH" PROTECTION

CE#,WE#,OE#pulsesshorter than5nsaretreatedasglitchesandwillnotberegardedasaneffectivewritecycle.

LOGICAL INHIBIT

AvalidwritecyclerequiresbothCE#andWE#atVilwithOE#atVih.WritecycleisignoredwheneitherCE#atVih,WE#aVih,orOE#atVil.

POWER-UP SEQUENCE

Uponpowerup,MX29F800CT/Bisplacedinreadarraymode.Furthermore,programoreraseoperationwillbe-ginonlyaftersuccessfulcompletionofspecifiedcommandsequences.

POWER-UP WRITE INHIBIT

WhenWE#,CE#isheldatVilandOE#isheldatVihduringpowerup,thedeviceignoresthefirstcommandontherisingedgeofWE#.

POWER SUPPLY DECOUPLING

A0.1uFcapacitorshouldbeconnectedbetweentheVccandGNDtoreducethenoiseeffect.

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MX29F800C T/B

TABLE 3. MX29F800C T/B COMMAND DEFINITIONS

Notes:1.DeviceID:22D6H/D6HforTopBootSectordevice. 2258H/58HforBottomBootSectordevice.2.For sector protect verify result,XX00H/00Hmeans sector is not protected,XX01H/01Hmeans sector has

beenprotected.3.SectorProtectcommandisvalidduringVhvatRESET#pin,VihatA1pinandVilatA0,A6pins.ThelastBus

cycisforprotectverify.4. Itisnotallowedtoadoptanyothercodewhichisnotintheabovecommanddefinitiontable.

Command ReadMode ResetModeAutomaticSelect

ManufacturerID DeviceID SectorProtectVerifyWord Byte Word Byte Word Byte

1stBusCycle

Addr Addr XXX 555 AAA 555 AAA 555 AAAData Data F0 AA AA AA AA AA AA

2ndBusCycle

Addr 2AA 555 2AA 555 2AA 555Data 55 55 55 55 55 55

3rdBusCycle

Addr 555 AAA 555 AAA 555 AAAData 90 90 90 90 90 90

4thBusCycle

Addr X00 X00 X01 X02 (Sector)X02 (Sector)X04

Data 00C2 C2 ID ID XX00/XX01 00/01

5thBusCycle

AddrData

6thBusCycle

AddrData

Command Program ChipErase SectorErase EraseSuspend

EraseResume SectorProtect

Word Byte Word Byte Word Byte Word Byte1stBusCycle

Addr 555 AAA 555 AAA 555 AAA Sector Sector XXX XXXData AA AA AA AA AA AA B0 30 60 60

2ndBusCycle

Addr 2AA 555 2AA 555 2AA 555 sector sectorData 55 55 55 55 55 55 60 60

3rdBusCycle

Addr 555 AAA 555 AAA 555 AAA sector sectorData A0 A0 80 80 80 80 40 40

4thBusCycle

Addr Addr Addr 555 AAA 555 AAA sector sectorData Data Data AA AA AA AA 00/01 00/01

5thBusCycle

Addr 2AA 555 2AA 555Data 55 55 55 55

6thBusCycle

Addr 555 AAA Sector SectorData 10 10 30 30

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MX29F800C T/B

RESET

Inthefollowingsituations,executingresetcommandwillresetdevicebacktoreadarraymode:• Amongerasecommandsequence(beforethefullcommandsetiscompleted)• Sectorerasetime-outperiod• Erasefail(whileQ5ishigh)• Amongprogramcommandsequence(beforethefullcommandset iscompleted,erase-suspendedprogramincluded)

• Programfail(whileQ5ishigh,anderase-suspendedprogramfailisincluded)• ReadsiliconIDmode• Sectorprotectverify

Whiledeviceisatthestatusofprogramfailorerasefail(Q5ishigh),usermustissueresetcommandtoresetdevicebacktoreadarraymode.WhilethedeviceisinreadsiliconIDmodeorsectorprotectverifymode,usermustissueresetcommandtoresetdevicebacktoreadarraymode.

Whenthedeviceisintheprogressofprogramming(notprogramfail)orerasing(noterasefail),devicewillig-noreresetcommand.

AUTOMATIC SELECT COMMAND SEQUENCE

AutomaticSelectmodeisusedtoaccessthemanufacturerID,deviceIDandtoverifywhetherornotasectorisprotected.Theautomaticselectmodehasfourcommandcycles.Thefirsttwoareunlockcycles,andfollowedbyaspecificcommand.Thefourthcycleisanormalreadcycle,andusercanreadatanyaddressanynumberoftimeswithoutenteringanothercommandsequence.TheresetcommandisnecessarytoexittheAutomaticSe-lectmodeandbacktoreadarray.Thefollowingtableshowstheidentificationcodewithcorrespondingaddress.

Address Data(Hex) Representation

ManufacturerIDWord X00 00C2

Byte X00 C2

DeviceIDWord X01 22D6/2258 Top/BottomBootSector

Byte X02 D6/58 Top/BottomBootSector

SectorProtectVerifyWord (Sectoraddress)X02 00/01 Unprotected/protected

Byte (Sectoraddress)X04 00/01 Unprotected/protected

ThereisanalternativemethodtothatshowninTable2,whichisintendedforEPROMprogrammersandrequiresVhvonaddressbitA9.

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AUTOMATIC PROGRAMMING

TheMX29F800CT/BcanprovidetheuserprogramfunctionbytheformofByte-ModeorWord-Mode.AslongastheusersentertherightcycledefinedintheTable.3(including2unlockcyclesandA0H),anydatauserinputswillautomaticallybeprogrammedintothearray.

Once theprogram function is executed, the internalwrite state controllerwill automatically execute thealgo-rithmsand timingsnecessary forprogramandverification,which includesgeneratingsuitableprogrampulse,verifyingwhetherthethresholdvoltageoftheprogrammedcellishighenoughandrepeatingtheprogrampulseifanyofthecellsdoesnotpassverification.Meanwhile,theinternalcontrolwillprohibittheprogrammingtocellsthatpassverificationwhiletheothercellsfailinverificationinordertoavoidover-programming.

Programmingwillonlychangethebitstatusfrom"1"to"0".Thatistosay,itisimpossibletoconvertthebitstatusfrom"0"to"1"byprogramming.Meanwhile,theinternalwriteverificationonlydetectstheerrorsofthe"1"thatisnotsuccessfullyprogrammedto"0".

Anycommandwrittentothedeviceduringprogrammingwillbeignoredexcepthardwarereset,whichwilltermi-natetheprogramoperationafteraperiodoftimenomorethanTready.Whentheembeddedprogramalgorithmiscompleteortheprogramoperationisterminatedbyhardwarereset,thedevicewillreturntothereadingarraydatamode.

Withtheinternalwritestatecontroller,thedevicerequirestheusertowritetheprogramcommandanddataonly.ThetypicalchipprogramtimeatroomtemperatureoftheMX29F800CT/Bis3seconds.(Word-Mode)

Whentheembeddedprogramoperationisongoing,usercanconfirmiftheembeddedoperationisfinishedornotbythefollowingmethods:

*1:Thestatus"inprogress"meansbothprogrammodeanderase-suspendedprogrammode.*2:RY/BY#isanopendrainoutputpinandshouldbeweaklyconnectedtoVDDthroughapull-upresistor.*3:Whenanattemptismadetoprogramaprotectedsector,Q7willoutputitscomplementdataorQ6continuestotoggleforabout1usandthedevicereturnstoreadarraystatewithoutprogramingthedataintheprotectedsector.

Status Q7 Q6 Q5 RY/BY#*2Inprogress*1 Q7# Toggling 0 0Finished Q7 Stoptoggling 0 1

Exceedtimelimit Q7# Toggling 1 0

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SECTOR ERASE

SectorEraseistoeraseallthedatainasectorwith"1"and"0"asall"1".Itrequiressixcommandcyclestois-sue.Thefirsttwocyclesare"unlockcycles",thethirdoneisaconfigurationcycle,thefourthandfiftharealso"unlockcycles"andthesixthcycleisthesectorerasecommand.Afterthesectorerasecommandsequenceisissued, there isa time-outperiodof40uscounted internally.During the time-outperiod,additional sectorad-dressandsectorerasecommandcanbewrittenmultiply.Onceuserentersanothersectorerasecommand,thetime-outperiodof40usisrecounted.Ifuserentersanycommandotherthansectoreraseorerasesuspenddur-ingtime-outperiod,theerasecommandwouldbeabortedandthedeviceisresettoreadarraycondition.Thenumberofsectorscouldbefromonesectortoallsectors.Aftertime-outperiodpassingby,additionalerasecom-mandisnotacceptedanderaseembeddedoperationbegins.

Duringsectorerasing,allcommandswillnotbeacceptedexcepthardwareresetanderasesuspendandusercancheckthestatusaschiperase.

Whentheembeddederaseoperationisongoing,usercanconfirmiftheembeddedoperationisfinishedornotbythefollowingmethods:

Status Q7 Q6 Q5 Q3 Q2 RY/BY#*2Time-outperiod 0 Toggling 0 0 Toggling 0

Inprogress 0 Toggling 0 1 Toggling 0

Finished 1 Stoptoggling 0 1 1 1

Exceedtimelimit 0 Toggling 1 1 Toggling 0

CHIP ERASE

ChipEraseistoeraseallthedatawith"1"and"0"asall"1".Itneeds6cyclestowritetheactionin,andthefirsttwocyclesare"unlock"cycles,thethirdoneisaconfigurationcycle,thefourthandfiftharealso"unlock"cycles,andthesixthcycleisthechiperaseoperation.

Duringchiperasing,allthecommandswillnotbeacceptedexcepthardwarerestsortheworkingvoltageistoolowthatchiperasewillbeinterrupted.AfterChipErase,thechipwillreturntothestateofReadArray.

Whentheembeddedchiperaseoperationisongoing,usercanconfirmiftheembeddedoperationisfinishedornotbythefollowingmethods:

*1:ThestatusQ3isthetime-outperiodindicator.WhenQ3=0,thedeviceisintime-outperiodandisacceptibletoanothersectoraddresstobeerased.WhenQ3=1,thedeviceisineraseoperationandonlyerasesuspendisvalid.*2:RY/BY#isopendrainoutputpinandshouldbeweaklyconnectedtoVDDthroughapull-upresistor.*3:Whenanattemptismadetoeraseaprotectedsector,Q7willoutputitscomplementdataorQ6continuestotogglefor100usandthedevicereturnedtoreadarraystatuswithouterasingthedataintheprotectedsector.

Status Q7 Q6 Q5 Q2 RY/BY#Inprogress 0 Toggling 0 Toggling 0Finished 1 Stoptoggling 0 1 1

Exceedtimelimit 0 Toggling 1 Toggling 0

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When thedevicehassuspendederasing,user canexecute thecommandsetsexcept sectoreraseandchiperase,suchasreadsiliconID,sectorprotectverify,program,anderaseresume.

SECTOR ERASE RESUME

Sectoreraseresumecommandisvalidonlywhenthedeviceisinerasesuspendstate.Aftereraseresume,usercan issueanothererasesuspendcommand,but thereshouldbea400us intervalbetweeneraseresumeandthenexterasesuspend.Ifuserissueinfinitesuspend-resumeloop,orsuspend-resumeexceeds1024times,thetimeforerasingwillincrease.

SECTOR ERASE SUSPEND

Duringsectorerasure,sectorerasesuspendistheonlyvalidcommand.Ifuserissueerasesuspendcommandinthetime-outperiodofsectorerasure,devicetime-outperiodwillbeover immediatelyandthedevicewillgobacktoerase-suspendedreadarraymode.Ifuserissueerasesuspendcommandduringthesectoreraseisbe-ingoperated,devicewillsuspendtheongoingeraseoperation,andaftertheTready1(<=20us)suspendfinishesandthedevicewillentererase-suspendedreadarraymode.Usercanjudgeifthedevicehasfinishederasesus-pendthroughQ6,Q7,andRY/BY#.

Afterdevicehasenterederase-suspendedreadarraymode,usercanreadothersectorsnotaterasesuspendbythespeedofTaa;whilereadingthesectorinerase-suspendmode,devicewilloutputitsstatus.UsercanuseQ6andQ2tojudgethesectoriserasingortheeraseissuspended.

Status Q7 Q6 Q5 Q3 Q2 RY/BY#Erasesuspendreadinerasesuspendedsector 1 Notoggle 0 N/A Toggle 1Erasesuspendreadinnon-erasesuspendedsector Data Data Data Data Data 1Erasesuspendprograminnon-erasesuspendedsector Q7# Toggle 0 N/A N/A 0

15P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

ABSOLUTE MAXIMUM STRESS RATINGS

OPERATING TEMPERATURE AND VOLTAGECommercial (C) Grade SurroundingTemperature(TA) 0°Cto+70°CIndustrial (I) Grade SurroundingTemperature(TA) -40°Cto+85°CVCC Supply Voltages VCCrange +4.5Vto5.5V

SurroundingTemperaturewithBias -65°Cto+125°CStorageTemperature -65°Cto+150°C

VoltageRangeVCC -0.5Vto+7.0VRESET#,A9 -0.5Vto+12.5VTheotherpins. -0.5VtoVCC+0.7V

OutputShortCircuitCurrent(lessthanonesecond) 200mA

16P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

DC CHARACTERISTICS Symbol Description Min. Typ. Max. Remark

Iilk InputLeak ±1.0uA

Iolk OutputLeak 10uA

Iilk9 A9Leak 35uA A9:12.5V

Icr1 ReadCurrent(10MHz) 50mA CE#=Vil,OE#=Vih

Icr2 ReadCurrent(5MHz) 40mA CE#=Vil,OE#=Vih

Isb1 StandbyCurrent(TTL) 1mAVcc=Vccmax,CE#=Vihotherpindisable

Isb2 Standbycurrent(CMOS) 1uA 50uAVcc=Vccmax,CE#=vcc+0.3V,otherpindisable

Icw WriteCurrent 50mA CE#=Vil,OE#=Vih,WE#=Vil

Vil InputLowVoltage -0.3V 0.8V

Vih InputHighVoltage 0.7xVcc Vcc+0.3V

VhvVeryHighVoltageforhardwareProtect/Unprotect/AutoSelect/TemporaryUnprotect

11.5V 12V 12.5V

Vol OutputLowVoltage 0.45VIol=2.1mA,Vcc=Vccmin

Voh1 OuputHighVoltage(TTL) 2.4V Ioh1=-2mA

Voh2 OuputHighVoltage(CMOS) Vcc-0.4V Ioh2=-100uA

17P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

SWITCHING TEST CIRCUITS

TestConditionOutputLoad:1TTLgateOutputLoadCapacitance,CL:30PFfor70nsRise/FallTimes:10nsInputpulselevels:0.45V/0.7xVccReferencelevelsformeasuringtiming:0.8V,2.0V

SWITCHING TEST WAVEFORMS

R1=6.2KohmR2=2.7Kohm

TESTED DEVICE

DIODES=IN3064OR EQUIVALENT

CLR1

Vcc

0.1uFR2

Vcc

2.0V 2.0V

0.8V0.8VTEST POINTS

0.7xVCC

0.45VOUTPUTINPUT

18P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

AC CHARACTERISTICS

Symbol DescriptionSpeed Option -70

UnitMin. Typ. Max.

Taa Validdataoutputafteraddress 70 nsTce ValiddataoutputafterCE#low 70 nsToe ValiddataoutputafterOE#low 30 nsTdf DataoutputfloatingafterOE#high 20 ns

Toh Output hold time from theearliest risingedgeofAddress,CE#,OE# 0 ns

Twc Writeperiodtime 70 nsTcwc Commandwriteperiodtime 70 nsTas Addresssetuptime 0 nsTah Addressholdtime 45 nsTds Datasetuptime 30 nsTdh Dataholdtime 0 nsTvcs Vccsetuptime 50 usTcs CE#Setuptime 0 nsTch CE#holdtime 0 nsToes Outputenablesetuptime 0 ns

Toeh OutputenableholdtimeRead 0 nsToggle &Data#Polling 10 ns

Tcep CE#pulsewidth 35 nsTceph CE#pulsewidthhigh 20 nsTwp WE#pulsewidth 35 ns

Twph WE#pulsewidthhigh 30 ns

Tghwl Readrecovertimebeforewrite 0 nsTbusy Program/EraseactivetimebyRY/BY# 90 ns

Tavt ProgramoperationByte 9 300 usWord 11 360 us

Taetc ChipEraseoperation 8 32 secTaetb SectorEraseoperation 0.7 15 secTbal Sectoraddressholdtime 40 us

19P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 1. COMMAND WRITE OPERATION

Addresses

CE#

OE#

WE#

DIN

Tds

Tah

Data

Tdh

Tcs Tch

Tcwc

Toes

Tas

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

VA

VA: Valid Address

Twp Twph

20P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

READ/RESET OPERATION

Figure 2. READ TIMING WAVEFORMS

Addresses

CE#

OE#

Taa

WE#

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Voh

Vol

HIGH Z HIGH ZDATA Valid

Toe Tdf

Tce

Trc

Outputs

Toh

ADD Valid

21P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 3. RESET# TIMING WAVEFORM

AC CHARACTERISTICS

Trh

Trb1

Trp2

Trp1

Tready2

Tready1

RY/BY#

CE#, OE#

RESET#

Reset Timing NOT during Automatic Algorithms

Reset Timing during Automatic Algorithms

RY/BY#

CE#, OE#

Trb2

WE#

RESET#

Item Description Setup Speed UnitTrp1 RESET#PulseWidth(DuringAutomaticAlgorithms) MIN 10 us

Trp2 RESET#PulseWidth(NOTDuringAutomaticAlgorithms) MIN 500 ns

Trh RESET#HighTimeBeforeRead MIN 0 ns

Trb1 RY/BY#RecoveryTime(toCE#,OE#golow) MIN 0 ns

Trb2 RY/BY#RecoveryTime(toWE#golow) MIN 50 ns

Tready1 RESET#PINLow(DuringAutomaticAlgorithms)toReadorWrite MAX 20 us

Tready2 RESET#PINLow(NOTDuringAutomaticAlgorithms)toReadorWrite MAX 500 ns

22P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

ERASE/PROGRAM OPERATION

Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM

Twc

Address

OE#

CE#

55h

2AAh SA

10h

InProgress Complete

VA VA

Tas Tah

SA: 555h for chip erase

Tch

Tds Tdh

Taetc

Read StatusLast 2 Erase Command Cycle

Tbusy Trb

TcsWE#

Data

RY/BY#

23P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART

START

Write Data AAH Address 555H

Write Data 55H Address 2AAH

Write Data AAH Address 555H

Write Data 80H Address 555H

YES

NOData=FFh ?

Write Data 10H Address 555H

Write Data 55H Address 2AAH

Data# Polling Algorithm or Toggle Bit Algorithm

Auto Chip Erase Completed

24P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM

Twc

Address

OE#

CE#

55h

2AAh SectorAddress 1

SectorAddress 0

30h

InProgress Complete

VA VA

30h

SectorAddress n

Tas

Tah

Tbal

Tch

Tds Tdh

Taetb

Read Status

Last 2 Erase Command Cycle

TbusyTrb

TcsWE#

Data

RY/BY#

30h

25P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART

START

Write Data AAH Address 555H

Write Data 55H Address 2AAH

Write Data AAH Address 555H

Write Data 80H Address 555H

Write Data 30H Sector Address

Write Data 55H Address 2AAH

Data# Polling Algorithm orToggle Bit Algorithm

Auto Sector Erase Completed

NOLast Sectorto Erase

YES

YES

NOData=FFh

26P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 8. ERASE SUSPEND/RESUME FLOWCHART

START

Write Data B0H

Toggle Bit checking Q6 not toggled

ERASE SUSPEND

YES

NO

Write Data 30H

Continue Erase

Reading or Programming End

Read Array orProgram

AnotherErase Suspend ?

NO

YES

YES

NO

ERASE RESUME

27P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS

Address

OE#

CE#

A0h

555h PA

PD Status DOUT

VA VA

Tas Tah

Tch

Tds Tdh

Tavt

Last 2 Read Status CycleLast 2 Program Command Cycle

TbusyTrb

TcsWE#

Data

RY/BY#

28P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 10. CE# CONTROLLED WRITE TIMING WAVEFORM

Address

OE#

CE#

A0h

555h PA

PD Status DOUT

VA VA

Tas Tah

Tghwl

Tcep

Tds Tdh

Tavt or Taetb

Tbusy

Tceph

WE#

Data

RY/BY#

29P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 11. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART

START

Write Data AAH Address 555H

Write Data 55H Address 2AAH

Write Program Data/Address

Write Data A0H Address 555H

YES

Read Again Data:Program Data?

YES

Auto Program Completed

Data# Polling Algorithm orToggle Bit Algorithm

next address

Last Word to beProgramed

No

No

30P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

SECTOR PROTECT/CHIP UNPROTECT

Figure 12. SECTOR PROTECT/CHIP UNPROTECT WAVEFORM (RESET# Control)

150uS: Sector Protect15mS: Chip Unprotect1us

Vhv

Vih

Data

SA, A6A1, A0

CE#

WE#

OE#

VA VA VA

Status

VA: valid address

40h60h60h

Verification

RESET#

31P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 13-1. IN-SYSTEM SECTOR PROTECT WITH RESET#=Vhv

START

Retry count=0

RESET#=Vhv

Wait 1us

Write Sector Addresswith [A6,A1,A0]:[0,1,0]

data: 60h

Write Sector Addresswith [A6,A1,A0]:[0,1,0]

data: 40h

Read at Sector Addresswith [A6,A1,A0]:[0,1,0]

Wait 150us

Reset PLSCNT=1

Temporary Unprotect Mode

RESET#=Vih

Write RESET CMD

Sector Protect Done

Device fail

Temporary Unprotect Mode

Retry Count +1

First CMD=60h?

Data=01h?Retry Count=25?

Yes

YesYes

Yes

No

No

No

No

Protect anothersector?

32P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 13-2. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv

Write [A6,A1,A0]:[1,1,0]data: 60h

Write [A6,A1,A0]:[1,1,0]data: 40h

Read [A6,A1,A0]:[1,1,0]

Wait 15ms

Temporary Unprotect

Write reset CMD

Chip Unprotect Done

Retry Count +1

Device fail

All sectorsprotected?

Data=00h?Retry Count=1000?

YesYes

No

No

Yes

Protect All Sectors

START

Retry count=0

RESET#=Vhv

Wait 1us

Temporary Unprotect

First CMD=60h?

Yes

No

No

33P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 14. TEMPORARY SECTOR UNPROTECT WAVEFORMS

Table 5. TEMPORARY SECTOR UNPROTECT

RESET#

CE#

WE#

RY/BY#

Trpvhh

12VVhv

0 or 5V 0 or 5V

Tvhhwl

Trpvhh

Program or Erase Command Sequence

Parameter Alt Description Condition Speed Unit

Trpvhh Tvidr RESET#RiseTimetoVhvandVhvFallTimetoRESET# MIN 500 ns

Tvhhwl Trsp RESET#VhvtoWE#Low MIN 4 us

34P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 15. TEMPORARY SECTOR UNPROTECT FLOWCHART

Notes:1.TemporaryunprotectallprotectedsectorsVhv=11.5~12.5V.2.Theprotectedconditionsoftheprotectedsectorsarethesametotemporarysectorunprotectmode.

Start

Apply RESET# pin Vhv Volt

Enter Program or Erase Mode

(1) Remove Vhv Volt from RESET#(2) RESET# = Vih

Completed Temporary SectorUnprotected Mode

Mode Operation Completed

35P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 16. SILICON ID READ TIMING WAVEFORM

Taa

Tce

Taa

Toe

Toh Toh

Tdf

DATA OUT

C2H 23H (TOP boot)ABH (Bottom boot)

Vhv

Vih

VilA9

ADD

CE#

A1

OE#

WE#

A0

DATA OUTDATAQ0-Q7

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

36P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

WRITE OPERATION STATUS

Figure 17. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)

Tdf

Tce

Tch

Toe

Toeh

Toh

CE#

OE#

WE#

Q7

Q0-Q6

RY/BY#

Tbusy

Status Data Status Data

ComplementComplement True Valid Data

Taa

Trc

Address VAVA

High Z

High ZValid DataTrue

37P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 18. DATA# POLLING ALGORITHM

Read Q7~Q0 at valid address(Note 1)

Read Q7~Q0 at valid address

Start

Q7 = Data# ?

Q5 = 1 ?

Q7 = Data# ?(Note 2)

FAIL Pass

No

No

No

Yes

Yes

Yes

Notes:1.Forprogramming,validaddressmeansprogramaddress.Forerasing,validaddressmeanserasesectorsaddress.2.Q7shouldberecheckedevenQ5="1"becauseQ7maychangesimultaneouslywithQ5.

38P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 19. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)

Tdf

Tce

Tch

Toe

Taa

Toh

Address

CE#

OE#

WE#

Q6/Q2

RY/BY#

Tbusy

Valid Status

(first read)

Valid Status

(second read) (stops toggling)

Valid Data

VA VAVA

Notes:

1. VA : Valid Address

2. CE# must be toggled when toggle bit toggling.

VA

Valid Data

39P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

Figure 20. TOGGLE BIT ALGORITHM

Notes:1.Readtogglebittwicetodeterminewhetherornotitistoggling.2.RechecktogglebitbecauseitmaystoptogglingasQ5changesto"1".

Read Q7-Q0 Twice

Q5 = 1?

Read Q7~Q0 Twice

Program/Erase failWrite Reset CMD Program/Erase Complete

Q6 Toggle ?

Q6 Toggle ?

NO

(Note1)

(Note1, 2)

YES

NO

NO

YES

YES

Start

40P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

RECOMMENDED OPERATING CONDITIONS

At Device Power-Up

ACtimingillustratedinFigureAisrecommendedforthesupplyvoltagesandthecontrolsignalsatdevicepower-up.Ifthetiminginthefigureisignored,thedevicemaynotoperatecorrectly.

Figure A. AC Timing at Device Power-Up

Vcc

ADDRESS

CE#

WE#

OE#

DATA

Tvr

TaaTr or Tf Tr or Tf

TceTf

Vcc(min)

GND

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Vih

Vil

Voh High ZVol

WP#/ACC

ValidOuput

ValidAddress

Tvcs

Tr

ToeTfTr

Symbol Parameter Min. Max. UnitTvr VccRiseTime 20 500000 us/VTr InputSignalRiseTime 20 us/VTf InputSignalFallTime 20 us/V

Tvcs Vccsetuptime 50 us

41P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

LATCH-UP CHARACTERISTICS

ERASE AND PROGRAMMING PERFORMANCE

PIN CAPACITANCE

ParameterLimits

UnitsMin. Typ. Max.ByteProgrammingTime 9 300 us

WordProgrammingTime 11 360 us

SectorEraseTime 0.7 8 sec

ChipEraseTime 8 32 sec

ChipProgrammingTimeByteMode 10 27 sec

WordMode 7.5 17 sec

Erase/ProgramCycles 100,000 Cycles

Note: 1.Typicalconditionmeans25°C,5V. 2.Maximumconditionmeans85°C,4.5V,100Kcycles.

Min. Max.

InputVoltagevoltagedifferencewithGNDonA9,Reset#pins -1.0V 12.5V

InputVoltagevoltagedifferencewithGNDonallnormalpinsinputs -1.0V Vcc+1.0V

Inputcurrentpulse -100mA +100mA

IncludesallpinsexceptVcc.Testconditions:Vcc=5V,onepinpertesting

Parameter Symbol Parameter Description Test Set Typ. Max. Unit

CIN2 ControlPinCapacitance VIN=0 12 pF

COUT OutputCapacitance VOUT=0 12 pF

CIN InputCapacitance VIN=0 8 pF

42P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

ORDERING INFORMATION

Part No. Access Time (ns)

Temperature Range Package Remark

MX29F800CTMI-70G 70 -40oC~85oC 44PinSOP RoHSCompliant

MX29F800CBMI-70G 70 -40oC~85oC 44PinSOP RoHSCompliant

MX29F800CTTI-70G 70 -40oC~85oC 48PinTSOP(NormalType) RoHSCompliant

MX29F800CBTI-70G 70 -40oC~85oC 48PinTSOP(NormalType) RoHSCompliant

MX29F800CTXEI-70G 70 -40oC~85oC 48BallLFBGA(6x8mm) RoHSCompliant

MX29F800CBXEI-70G 70 -40oC~85oC 48BallLFBGA(6x8mm) RoHSCompliant

43P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

PART NAME DESCRIPTION

MX 29 F 70C T T I GOPTION:G: RoHS Compliant

SPEED:70:70ns

TEMPERATURE RANGE:I: Industrial (-40°C to 85°C)

PACKAGE:M:SOPT: TSOPXE: LFBGA (6x8x1.3mm, Pitch 0.8mm, 0.4mm Ball)

BOOT BLOCK TYPE:T: Top BootB: Bottom Boot

REVISION:C

DENSITY & MODE:800: 8M, x8/x16 Boot Sector

TYPE:F: 5V

DEVICE:29: Flash

800

44P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

PACKAGE INFORMATION

45P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

46P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

47P/N:PM1493 REV. 1.2, JUL. 05, 2012

MX29F800C T/B

REVISION HISTORY

Revision No. Description Page Date1.0 1.Removed"Preliminary" P1 NOV/17/2009 2.Removed90nsgradeatOrderInformation P1,18,42,43 3.ModifiedTbalspecfrom50usto40us P13,17 4.Modifiedtypicalchipprogrammingtime P411.1 1.AddedTvcs,Toeh,Twp,TwphandTghwl P18,19,40 NOV/21/2011 2.Modifieddescriptionwordingfor"RoHSCompliant" P1,42,431.2 1.Modified48-ballLFBGApackagetype P1,3,42,43 JUL/05/2012

MX29F800C T/B

48

MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.

Except forcustomizedproductswhichhasbeenexpressly identified in theapplicableagreement,Macronix'sproducts aredesigned, developed, and/ormanufactured for ordinary business, industrial, personal, and/orhouseholdapplicationsonly,andnotforuseinanyapplicationswhichmay,directlyorindirectly,causedeath,personalinjury,orseverepropertydamages.IntheeventMacronixproductsareusedincontradictedtotheirtargetusageabove,thebuyershalltakeanyandallactionstoensuresaidMacronix'sproductqualifiedforitsactualuseinaccordancewiththeapplicablelawsandregulations;andMacronixaswellasit’ssuppliersand/ordistributorsshallbereleasedfromanyandallliabilityarisentherefrom.

Copyright©Macronix InternationalCo., Ltd. 2009~2012.All rights reserved, including the trademarksandtradenamethereof,suchasMacronix,MXIC,MXICLogo,MXLogo,IntegratedSolutionsProvider,NBit,Nbit,NBiit,MacronixNBit,eLiteFlash,HybridNVM,HybridFlash,XtraROM,Phines,KHLogo,BE-SONOS,KSMC,Kingtech,MXSMIO,MacronixvEE,MacronixMAP,RichAudio,RichBook,RichTV,andFitCAM.Thenamesandbrandsofthirdpartyreferredthereto(ifany)areforidentificationpurposesonly.

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