BALANCED LNA

sector to keep operating, butwith reduced performance.The switch can be imple-mented with PIN or field-

effect-transistor (FET) devices. TheLNA to be described covers 1.7-to-2.2-GHz applications.

The primary goals for any LNA arelow noise figure, adequate gain, andstability. For the tower-mounted appli-cation, a high intercept point, +5-VDCsupply voltage, and low current con-sumption are also required. The use ofa balanced configuration supports goodinput and output match, and helps

Balanced LNA SuitsCellular Base Stations

A TMA installed beneath a base-stationantenna can increase that base station’srange to 40 percent as the TMA corrects thecommon cellular problem of link imbalance.

ase stations can often transmit a signal to a mobile handset

further and stronger than they can receive the return sig-

nals. This is known as link imbalance and it is made worse

by the feeder loss between the base station and the anten-

nas. The imbalance can be as high as 20 percent or more,

so system designers need to correct the balance to improve

coverage. The simplest solution is the addition of a

tower-mounted amplifier (TMA) ormasthead amplifier.

A TMA installed directly beneath abase-station antenna can increase thesensitivity of the base station and increaseits range to 40 percent, correcting thelink imbalance and practically dou-bling its reception coverage area. Alow-loss filter and low-noise amplifier(LNA) within the TMA help to selectand amplify the received signal.

A typical TMAfunctional blockdiagram is shownin Fig. 1. The alarmcircuit senses a fail-ure in the LNA andis normally trig-gered by a windowcomparator circuitthat checks the biascurrent. The bypassswitch permitsbypass of the LNAif a failure occursand, thus, allowsthe base-station

bIAN PIPER, SID SEWARD,AND AL WARD Applications Engineers Agilent Technologies, Inc., 3175Bowers Ave., MS 86C, Santa Clara, CA95054; (408) 654-8741, FAX: (408)577-6620, e-mail: mark_alden@agilent.com, Internet: www.agilent.com.

H.P. HOSTERGAARDProduct Line Manager

SAMIR TOZINRF/Microwave Engineer—InternAnaren Microwave, Inc., 6635 KirkvilleRd., East Syracuse, NY 13057;Internet: www.anaren.com.

MICROWAVES & RF 70 APRIL 2002

DESIGN

RF in

SwitchFilterLNA

DC powerAlarm

Fixed attenuator

Digitalstep

attenuator

Fixed attenuator

Bypass mode

RF out

DC power/alarm/attenuatorSwitch-control circuit board

1. This figure shows a functional block diagram of a TMA.

ensure stability. However, the split-ter/combiner network must maintain lowloss, be physically small, and have goodphase and amplitude balance over thebandwidth of interest. Also, the band-width should be high enough to includethe uplink (mobile-handset-to-base-station) frequencies for cellular standardsof approximately 2 GHz. The design goalswere thus chosen, as shown in Table 1.

A critical first step in any LNA designis the selection of the active device.Low-cost FETs are often used for theirlow noise figures and high linearity.

Besides maintaining a low typicalnoise figure of 0.5 dB, Agilent Tech-nologies’ (Santa Clara, CA) ATF-54143uses a +3-VDC bias and provides a+36-dBm intercept point at 60-mAdrain current. In addition, the ATF-54143 is an enhancement-mode deviceand, thus, does not require a negativegate voltage.

The ATF-54143 is one of a family ofnew high-dynamic-range, low-noiseenhancement-mode pseudomorphic-high-electron-mobility-transistor (PHEMT)devices designed for low-cost commer-cial applications in the very-high-fre-quency (VHF)-to-6-GHz frequency range.It has an 800-µm gate-width device with2-GHz performance tested and guar-anteed at a Vce of +3 VDC and Id of 60mA. If an active bias is desirable forrepeatability of the bias setting, then theATF-54143 will only require the addi-tion of a single PNP BJT.1

An important consideration for a bal-anced amplifier is the splitting and com-bining of the RF signal. When designingthe splitter network for a balanced LNA,there is interest in minimizing insertionloss and return loss while providing equalpower to both amplifiers. Power dividersare sometimes used for this task. Themost popular types are the T-junctiondivider and Wilkinson power divider.Wilkinson power dividers use quarter-wave-length transmission lines to producedesired power splits. Due to the quarter-wavelength transmission lines, the band-width of a single section power divideris limited to 10 to 20 percent.

Although power dividers can be usedin balanced amplifier design, low-loss

72

DESIGN

hybrid couplers are superior. Hybrid cou-plers are four-port devices that havegood match and isolation with a fixed90-deg. phase shift between outputports. The bandwidth of a branch-linehybrid is limited to 10 to 20 percent, buta single-section broadside coupler canhave a bandwidth as large as an octave.

Figure 2 illustrates the most impor-tant advantage of using a hybridcoupler over a power divider onthe input side of the balancedamplifier. Reflected power fromeach of the two identical LNAinputs (shown in blue) recom-bines at the isolated port of thehybrid coupler, and is dissipatedin the resistive termination. Thisallows one to design each LNAfor optimum noise-figure per-formance without worrying aboutreturn loss from each of the two

LNAs. If a hybrid coupler is used on theinput side, then an identical hybrid cou-pler can be used on the output side torecombine the signals.

Anaren Microwave, Inc. (Syracuse,NY) recently released a new class ofminiature hybrid couplers known asPico Xingers. The chosen balancedamplifier was the Pico Xinger JP503

DESIGN

MICROWAVES & RF 73 APRIL 2002

Splitter

Combiner

LNA

LNA

Out 1

Out 2

Anaren Anaren

Xinger Xinger

Incident power

Incident power

Incident power

Isolated portR

Input port

Coupled port

Reflected power

Reflected power

DC port Output

power

Reflected power

from LNA

Z0

Z0

To identical

stage

L1 L2

L3

C3

C2

C4

C1

C5

C6

Q1, ATF-54143

From identical

stage

LL1 LL2

R2

R3

R4R5

R1

Vdd = +5 VDC

2. Reflective power from each of the two identical LNA inputs (shown in blue)recombines at the isolated port of the hybrid coupler, and is dissipated in the resis-tive termination.

3. The amplifier schematic is shown here.

Table 1: Design goalsPARAMETER AT 2000 MHZ VALUE

Gain

Noise figure

Output third-order intercept point

Input third-order intercept point

Output P1dB compression

Input return loss

Output return loss

Supply current

Bandwidth

15.5 dB

0.8 dB

+39 dBm

+23.5 dBm

+22.4 dBm

25 dB

27 dB

120 mA

1.7 to 2.2 GHz

surface-mount coupler (Table 2).To meet the design goals, the drain-

source current (Ids) was chosen to be 60mA. Data indicate that 60 mA providesthe best third-order intercept point(IP3), while providing a very low min-imum noise figure (Fmin). Also, a +3-VDCdrain-to-source voltage (Vds) offershigher gain and is preferred since itsupports a +5-VDC regulated supply.

One advantage of the enhancement-mode PHEMT is the ability to DC groundthe source leads and yet only require asingle positive-polarity power supply.A depletion-mode PHEMT pulls max-imum drain current when Vgs = 0 VDC,whereas an enhancement-mode PHEMTpulls approximately zero drain currentwhen Vgs = 0 VDC. The gate must be madepositive with respect to the source for theenhancement-mode PHEMT to beginpulling drain current. Also note that ifthe gate terminal is left open-circuited,the device will pull some amount ofdrain current due to the leakage cur-rent, creating a voltage differentialbetween the gate and source terminals.

ATF-54143 biasing is accomplishedwith a voltage divider, consisting ofR1 and R2. The voltage is derived fromthe drain voltage which provides a formof voltage feedback to help keep draincurrent constant. The purpose of R4 isto enhance the low-frequency stabilityof the device by providing a resistive ter-mination at low frequencies. CapacitorC3 provides a low-frequency bypassfor R4. Additional resistance in theform of R5 is added to provide currentlimiting for the gate of enhancement-mode devices (Fig. 3) This is importantwhen the device is driven to P1dB or Psat.

where: Ids = the desired drain current, IBB = the current flowing through

the R1/R2 voltage divider network,

RV

I

RV V R

V

RV V

I I

gs

BB

ds gs

gs

DD ds

ds BB

1

21

3

≈

≈−( ) ×

≈−

+

74

DESIGN

VDD = +5 VDC,Vds = +3 VDC,Id = 60 mA,Vgs = +0.56 VDC,R1 = 280 Ω,R2 = 1220 Ω, and R3 = 32.3 Ω.The repeatability of the bias settings

from device to device is a function of aparticular device’s DC characteristics.More information on this can be foundin ref. 1.

The use of a controlled amount ofsource inductance can often be used toenhance LNA performance. The amountof inductance required is usually onlya few tenths of a nanohenry, which isequivalent toincreasing thesource leads byapproximately0.05 in. The effectcan be modeledusing an RF sim-ulation tool suchas Agilent Tech-nologies’Advanced DesignSystem (ADS). Theusual side effect

of excessive sourceinductance is VHFgain peaking withresultant oscilla-tions. Larger gate-width devices haveless high-fre-quency gain and,therefore, thehigh-frequencyperformance is notas sensitive tosource inductanceas a smaller device

would be. Using EEsof ADS software, the ampli-

fier circuit can be simulated in linear andnonlinear modes of operation. The orig-inal design draft was an LNA with anOIP3 of +39 dBm with an approximatenoise figure of 1 dB at 2 GHz.

Linear AnalysisOne half of the amplifier circuit usedfor linear analysis is shown in Fig. 5. Forlinear analysis, the transistors can be mod-eled with a two-port scattering (S)-parameter file using Touchstone for-mat. The ATF54143.s2p file can be

DESIGN

MICROWAVES & RF 75 APRIL 2002

Table 2: Data for the JP503SPECIFICATION BANDWIDTH UNITS

Frequency

Isolation

Insertion loss

VSWR

Amplitude balance

Phase balance

Power handling

2.0 to 2.3

20

0.30

1.20

±0.25

3

25

GHz

dB minimum

dB maximum

maximum: 1

dB maximum

deg. maximum

avg. watts—CW max.

Inputreturn loss

Outputreturn loss

Ret

urn

loss

—d

B

Frequency—GHz

0–5

–10–15–20–25–30–35–40–45

0.5 1.0 1.5 2.0 2.5 3.0

Frequency—GHz

Sta

bili

ty f

acto

r—K

5

4

3

2

1

00.5 1.0 1.5 2.0 2.5 3.0

5. A plot of the Rollett Stability factor (K), as calculated from 1to 3 GHz, is shown here for the amplifier.

4. The linear-simulated input and output return loss versus fre-quency is illustrated.

downloaded from the Agilent WirelessDesign Center website. Simulation con-trols can be obtained from theSparams_wNoise template available inADS. The circuit components can thenbe added to the simulation circuit. Themore detailed the simulation is, themore accurate the results will be. Accu-rate circuit simulation can provide thefirst appropriate step to a successfulamplifier design. Transmission-line sec-tions can be modeled with variousmicrostrip and stripline elements avail-able in the component library. In thiscase, all microstrip sections assumed a0.031-in.-thick board and FR-4 mate-rial. Inductance associated with thechip capacitors and resistors was alsoincluded in the simulation. Where pos-sible, models were chosen from theADS SMT component library. Mod-els of SMT components can also beobtained from the manufacturers websites. Manufacturing tolerances in activeand passive components often prohib-it perfect correlation. When the designmet the specifications for gain, noise fig-ure, and stability, the create/edit schemat-ic symbol function was used, allowingdesigners to duplicate the amplifierdesign.

The model for the hybrid coupler isbased on the four-port Touchstone lin-ear S-parameter file and can be down-loaded from the Anaren website. Themicrostrip elements, the circuit-bal-anced amplifier input and output tracks,and 50-Ω load resistor pads were addedto build the complete amplifier. Theinput- and output-matching network usea highpass topology to ensure goodlow-frequency stability. The simulatoris then used to find component values,which provide the desired performance.

Results of simulated input and out-put return losses are shown in Fig 4.The linear-simulated performance ofthe amplifier was very close to the mea-sured results. The design was testedwith a +3-VDC, 40-mA S-parameterfile and did not show any change inlinear performance.

The ATF-54143 S- and noise param-eters are tested in a fixture that includesplated through holes through a 0.025-

76

DESIGN

in.-thick printed-circuit board (PCB). Dueto the complexity of de-embeddingthese grounds, the S- and noise param-eters include the effects of the test-fix-ture grounds.

Therefore, when simulating a 0.031-in.-thick PCB, the only difference in thePCB thickness is included in the simu-lation (i.e., 0.031 – 0.025 in. = 0.006 in.).The transmission lines that connect eachsource lead to its corresponding platedthrough hole are simulated as a microstriptransmission line (MLIN).

Nonlinear AnalysisFor nonlinear analysis, harmon-ic-balance simulation was used.Harmonic balance is preferredover other nonlinear methodsbecause it is computationally fast,handles distributed- and lumped-element circuitry, and can easi-ly include higher-order harmon-ics and intermodulation (IM)products.2

The nonlinear transistor modelused in the simulation is based onthe work of Curtice.3

The model can bedownloaded from Agi-lent’s website or byrequest from theauthors. An importantfeature of the nonlinearmodel is the use of aquadratic expressionfor the drain currentversus gate voltage.Although this modelclosely predicts the DC

and small-sig-nal behavior(includingnoise), it doesnot predict the in-tercept pointcorrectly. Forexample, thebalanced out-put third-orderintercept point

(OIP3) was sim-ulated at +34.4

dBm and the P1dB was at +21.8 dBm.The simulated performance for P1dB wasvery close to the measured results. How-ever, the simulated OIP3 was too low.To properly model the exceptionallyhigh linearity of the EPHEMT transis-tor, a better model is needed. Thismodel, however, can still be used topredict the relative importance of out-put matching, bias, and source induc-tance.

Circuit StabilityBesides providing important informa-tion regarding gain, P1dB, noise figure,

DESIGN

MICROWAVES & RF 77 APRIL 2002

Table 3: Measured resultsPARAMETER VALUE

Minimum gain

Maximum noise figure

Output third-order intercept point

Input third-order intercept point

Output P1dB compression

Maximum input return loss

Maximum output return loss

Supply current

Bandwidth

14.8 dB

0.85 dB

+39 dBm

+24.2 dBm

+22.4 dBm

17.2 dB

18.5 dB

120 mA

1.7 to 2.2 GHz

Gai

n—

dB

Frequency—GHz

2015

10

5

0

–5

–10

–15

–200.5 1.0 1.5 2.0 2.5 3.0

1.2

1.1

0.9

0.8

0.7

0.6

0.5

1.0

No

ise

figu

re—

dB

1.50 1.75 2.00 2.25 2.50Frequency—GHz

7. Noise figure is a nominal 0.8 dB from 1.7 to 2.1 GHz.

6. The measured gain of the completed amplifier is seen here.

DESIGNalong with input and output return loss,the computer simulation also providesinformation on circuit stability. Unlessa circuit is actually oscillating on thebench, it may be difficult to predict insta-bilities without presenting various VSWRloads at various phase angles to the

amplifier. Calculating the Rollett Sta-bility factor K and generating stabilitycircles are made easier with computer simulations.

Simulated input and output returnloss of the ATF-54143 amplifier appearsin Fig. 4. A plot of Rollett Stability fac-

tor (K) as calculated from 1 to 3 GHz isshown in Fig. 5 for the amplifier. Emit-ter inductance can be used to help stability.

The amplifier was designed for aVds of +3 VDC and an Ids of 60 mA. Itsschematic is shown in Fig. 3. The eval-uation board was designed so that inputand output impedance-matching net-works can be adjusted to optimize per-formance from 1.7 to 2.2 GHz. Low-pass or highpass structures can begenerated based on system require-ments. The main constraint for theLNA RF layout is that the circuit mustbe a balanced configuration. The effectof uneven path lengths results in thesumming of the signals out of phaseand lower output power and IP3 thanexpected. To achieve a balanced con-figuration, the bottom ATF-54143 isturned through 90 deg., supporting aneasy duplication of the top and bottomRF microstrip tracks.

The amplifier uses a highpass im-pedance-matching network for the noisematch. The highpass network consistsof a series capacitor C1 and shunt induc-tors L1 and L2. The circuit loss will bedirectly related to noise figure. A TokoAmerica, Inc. (Mt. Prospect, IL) LL1608-FS4N7 multilayer chip inductor or sim-ilar device is suitable for this purpose.Shunt inductor L1 provides low-fre-quency gain reduction, which can min-imize the amplifier’s susceptibility tolow-frequency transmitter (Tx) overload.It is also part of the input-matchingnetwork along with C1. C1 also dou-bles as a DC block. L2 doubles as aresult of inserting gate voltage for bias-ing up the PHEMT. This requires agood bypass capacitor in the form of C2.This network has been a compromisebetween low noise figure, input returnloss, and gain. Resistor R2 and capac-itors C2 and C4 provide in-band sta-bility, while resistors R1 and R3 offerlow-frequency stability by providing aresistive termination. The highpass net-work on the output consists of a seriescapacitor C4 and shunt inductor L3.

Inductors LL1 and LL2 are veryshort transmission lines between eachsource lead and ground. The inductorsact as series feedback. The amount of

MICROWAVES & RF 78 APRIL 2002

MICROWAVES & RF 80 APRIL 2002

series feedback has a dramatic effect on in-band and out-of-band gain, stability, as well as input and output return loss.The amplifier demo board is designed so that the amountof source inductance is variable. Each source lead connectsto a microstrip section, which can be connected to a groundpad at any point along the line. For minimal inductance, thesource lead pad is connected to the ground pad with a veryshort piece of etch at the point closest to the device sourcelead.

Additional source inductance has the effect of improvinginput return loss and low-frequency stability. For an ampli-fier operating in the 2-GHz range, excessive source induc-tance will manifest itself in the form of a gain peak from 6to 10 GHz. Normally, the high-frequency gain roll-off willbe gradual and smooth. Adding source inductance begins toadd bumps to the once smooth roll-off.

The amplifier is biased at a Vds of +3 VDC and Id of 60 mA.Typical Vgs is +0.56 VDC. The measured gain and noise fig-ure of the completed amplifier is shown in Figs. 6 and 7. Noisefigure is a nominal 0.8 dB from 1.7 to 2.1 GHz, while gain istypically 15.3 dB at 2.1 GHz with a peak of 18.2 dB at 1.1 GHz.Noise-figure performance was found to be slightly better thanthe simulated noise figure of the circuit (Table 3).

Measured input and output return loss are shown in Fig.8. The input return loss at 2 GHz is 17.3 dB with a correspondingoutput return loss of 20 dB. The amplifier output IP3 was mea-sured at a nominal +39 dBm at a DC bias point of +3 VDCVds and an Id of 60 mA. P1dB measured +22.4 dBm. Theamplifier was also checked at lower bias conditions of +3VDC Vds and Id of 40 mA. No degradation to the noise andgain response was noted. Typical output IP3 was measuredat a nominal +36 dBm.

REFERENCES1. Applications Note (AN1222): High intercept Low Noise Point Amplifier for 1850 to 1910 MHzPCS Band using the ATF-54143 Enhancement Mode PHEMT, A.J. Ward.

2. Stephan Maas, Nonlinear Microwave Circuits, IEEE Press, New York, 1997.

3. W.R. Curtice, “A MESFET Model For Use In The Design Of GaAs Integrated Circuits,” IEEETransactions On Microwave Theory Techniques, Vol. MTT-28, pp. 448-456, May 1980.

ACKNOWLEDGEMENTSSpecial thanks to Mark Bowyer (Anaren) for suggesting this work and Alan Rixon (Agilent) for hismany useful comments on TMA system requirements.

NOTEPerformance data for ATF-54143 PHEMT may be found on www.agilent.com/view/rf. Applica-tion notes can be found at: www.anaren.com and www.agilent.com/view/rf.

MRF

DESIGN

Inputreturn loss

Outputreturn loss

Frequency—GHz

Ret

urn

loss

—d

B

0–5

–10

–15

–20

–25

–30

–350.5 1.0 1.5 2.0 2.5 3.0

8. Input and output return loss versus frequency can be seenabove.