Multimedia Teaching Tool SimArch V1.0 Faculty of Electronic Engineering University of Nis Serbia.

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Multimedia Teaching Multimedia Teaching Tool Tool SimArch V1.0 Faculty of Electronic Engineering University of Nis Serbia

Transcript of Multimedia Teaching Tool SimArch V1.0 Faculty of Electronic Engineering University of Nis Serbia.

Page 1: Multimedia Teaching Tool SimArch V1.0 Faculty of Electronic Engineering University of Nis Serbia.

Multimedia Teaching ToolMultimedia Teaching Tool

SimArch V1.0

Faculty of Electronic Engineering

University of Nis

Serbia

Page 2: Multimedia Teaching Tool SimArch V1.0 Faculty of Electronic Engineering University of Nis Serbia.

SimArch is a teaching tool that supports lectures of computer architectures.

SimArch can be adapted to meet requirements of any computer architecture course.

SimArch - visualization tool that leads to higher quality lectures.

Enables better lecture understanding - the students are driven through data flows step-by-step.

Application areaApplication area

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Software requirementsSoftware requirements FUNCTIONAL REQUIREMENTS

Visualization of custom processor architecture. Hardware descriptions have to be stored in separated files. Capabilities of viewing hardware component details. Visualization of instruction flow through processor

components. Detailed information of hardware components status need to be

derived from hardware simulation. Adaptation capabilities that enables involving of new lectures. User-friendly interface. Easy software upgrading.

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Software requirementsSoftware requirements

NON-FUNCTIONAL REQUIREMENTS

Graphical elements optimized for presentation using video-beam.

Basic package distribution contains files with RISC architectures that are involved in computer architecture courses on Faculty of Electronic Engineering, University of Nis.

Supported platforms: Microsoft Win9x, Win2000, WinXP.

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Development environmentDevelopment environment

CASE tools that have been used for software development are:

Rational Rose 2000e. Microsoft Visual Studio 6.0 (Visual C++),

Software model has been developed using the CASE tool named Rose 2000e, made by Rational, while the Microsoft product named Visual Studio 6.0 has been used for coding process.

Used programming language is C++.

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Used techniques Used techniques

Complexness of involved requirements engages usage of Design Patterns as well as some of the task-separation techniques.

Used Design Patterns are: Singleton classes Manager classes Interface classes

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Software model Software model

SimArch contains a few sub-systems. All sub-system models were derived from using

UML modeling tool - Rational Rose 2000e. Sub-systems are

Components Engine Window Manager Draw Manager Shared Components

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UML modelUML model

Fig 1. UML model of subsystem Components

Page 9: Multimedia Teaching Tool SimArch V1.0 Faculty of Electronic Engineering University of Nis Serbia.

Script language Script language

A specialized, custom script language has been developed to meet requirements of hardware description. Architectures are described by script language that consists of three parts:

First part of script is involved into hardware description.

Second is used for lecture scenario description. Third part of script language consist of a list of

assembler instruction (assembler program without declarations) to be simulated.

Page 10: Multimedia Teaching Tool SimArch V1.0 Faculty of Electronic Engineering University of Nis Serbia.

Script exampleScript example <Architecture description>

PC(0,1;2) %38 ?28,302,29,60,1OR#3(7,93;1) %1 ?30,100,26,26,1CONSTANT#1(;3) %4 ?80,238,0,0,1ADD#1(2,3;4) ?110,185,35,80,1INSTRUCTION_MEMORY(2;5) %.\Code\Code.mps ?

85,302,69,125,1IF_ID(5,4,6,7;8,9) ?175,217,22,330,1BUS_SPLITER#1(8;57) %31,26 ?0,0,0,0,0…#INSTRUCTION=ADDPCINSTRUCTION_MEMORYADD#1CONSTANT#1MUX2X1#17MUX2X1#182-12-23-14-15-187-10-1stop

<Assembler code example>30: sw $25, 50($7)34: j 1638: lw $10, 0($1)3c: add $8, $10, $840: sub $11, $2, $344: lw $16, -12($7)48: and $12, $1, $74c: or $13, $1, $750: add $1, $2, $154: slt $12, $15, $658: beq $3, $9, -115c: slt $3, $0, $160: or $2, $3, $564: sub $1, $2, $25

<Scenario description>

.\1_Singleclock implementation\Single.shm

.\2_Multiclock implementation\Multi.shm

.\3_Pipeline without Forwarding\Main.shm

.\3_Pipeline without Forwarding\Main_HDU.shm

.\4_Pipeline with Forwarding\Main.shm

.\4_Pipeline with Forwarding\Main_FU_HDU.shm

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How to use SimArch?How to use SimArch?

Lectures are being prepared by the following steps:

Step 1: Architecture selection Step 2: Planning the lecture flow Step 3: Scripts writing.

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How to use SimArch?How to use SimArch?

As well as lecture preparation, presentation conduction consists of two steps, too. These steps are:

Step 1: Selection and loading of created script Step 2: Script leaded step-by-step presentation.

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Vision of Future Releases Vision of Future Releases

NEW VISUAL EFECTS

Future releases will involve new visualization methods, such as: Animated data flows through processor Involving additional windows that will have a

capability to display a waveform of signals that flows through architecture buses and components.

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Vision of Future Releases Vision of Future Releases

Client – Server presentation

Plan for future SimArch releases contains involving of network capabilities. One of those capabilities is client-server presentation.

Aim of the client-server presentation will be to enable presenting without using video-beam. Presentation tools will be monitors of the client computers. That kind of approach enables implementation of interactive learning tool.

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Vision of Future Releases Vision of Future Releases

Web version

Web version of package is one of the future releases that represents SimArch's web application. Web release should be an application, hosted on web server, able to provide identical user interface using web techniques.

Students should be able to practice their own test examples on architectures prepared by teacher.

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Vision of Future Releases Vision of Future Releases

Extension of available component sets

Components libraries CISC processor componentsComponents needed by most of DSP

architectures

Script libraries

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All Suggestions and Comments All Suggestions and Comments are welcome...are welcome...

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