Multilevel Arch Str Org

7/31/2019 Multilevel Arch Str Org

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Need for Memory Hierarchy (Unit-1,3)(M.M. Chapter 12)

The memory unit is an essential component in a digital computer since it is neededfor storing program and data.

A small computer with a limited application may be able to fulfill its intended taskwithout the need of additional storage capacity.

Most general-purpose computers would run more efficiently if they were equippedwith additional storage beyond the capacity of the main memory. there is just notenough space in one memory unit to accommodate all the programs used in a typicalcomputer.

It is more economical to use low-cost storage devices to serve as a backup forstoring the information that is not currently used by the CPU.

The memory unit that communicates directly with the CPU is called the mainmemory.

Devices that provide backup storage are called auxiliary memory. The mostcommon auxiliary memory devices used in computer systems are magnetic tapesand magnetic disks. They are used for storing system programs, large data files, andother backup information.

Only programs and data currently needed by the processor reside in main memory.


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The total memory capacity of a computer can be visualized as hierarchy ofcomponents.

The memory hierarchy system consists of all storage devices employed in acomputer system from the slow but high-capacity auxiliary memory to a

relatively faster main memory, to an even smaller and faster cache memoryaccessible to the high-speed processing logic.

The overall goal of Memory Hierarchy is to obtain the highest possibleaverage access speed while minimizing the total cost of the entire memorysystem.

I/O Processor

Magnetic disks

Magnetic tapesMain Memory

CPUCache

Memory


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At the bottom of the hierarchy are the relatively slow magnetic tapesused to store removable files.

Next are the magnetic disks used as backup storage.

The main memory occupies a central position by being able tocommunicate directly with the CPU and with auxiliary memory devicesthrough an I/O processor.

Cache Memory :- L1 cache & L2 cache

1. A special very high speed memory called cache.2. It is sometimes used to increase the speed of processing by makingcurrent programs and data available to the CPU at a rapid rate.

3. The cache memory is employed in computer system to compensate forthe speed differential between main memory access time andprocessor logic.

4. The Cache memory is concerned with the transfer of informationbetween main memory & CPU.

L1 cache is a small, fast memory cache that is built onto a CPU andhelps speed access to important and frequently-used data.

L1 cache is typically smaller and faster than L2 cache.

L1 cache is an abbreviation ofLevel 1 cache.
http://www.topbits.com/l2-cache.htmlhttp://www.topbits.com/l2-cache.html


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While I/O processor manages data transfers between

auxiliary memory and main memory, the cache organization isconcerned with the transfer of information between mainmemory and CPU.

Many operating systems are designed to enable the CPU to

process a number of independent programs concurrently .This concept is called multiprogramming, refers to theexistence of two or more programs in different parts of thememory hierarchy at the same time.

The part of the computer system that supervises the flow ofinformation between auxiliary memory and main memory iscalled the memory management system.


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Main Memory

The technology used for main memory is based on

Semiconductor Integrated Circuits. Main Memory : RAM & ROM

RAM (volatile) : SRAM & DRAM

SRAM consist of internal flip-flops to store binary information.The stored information remains valid as long as power is

applied to the unit. SRAM is easier to use & has shorter read/write cycles.

DRAM stores information in the form of electrical charges thatare applied to capacitors.

The stored charge on the capacitors tend to discharge with

time. It needs refreshing.

DRAM offers reduced power consumption & larger storagecapacity in a single memory chip.


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ROM : Read only Memory

It is also Random Access, permanent.

ROM is required to store initial program called

bootstrap loader. Its function is to start the computer softwareoperating when power is turned on.

The hardware of the computer sets the ProgramCounter (PC) to the first address of the bootstraploader.

It loads a portion of the O.S. from disk to mainmemory & then control is transferred to the O.S.


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Multilevel Viewpoint of a Machine

Each higher level is built on a preceding

one and provides more abstract

instructions that are translated to the lower

level to be executed.

Each higher level is a virtual machine

related to the language describing its

capabilities.


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Multilevel Computer

Problem oriented language level

Assembly Language

Operating System machine level

Instruction Set Architecture

Micro-architecture level

Digital Logic Level

Level 5

Level 3

Level 2

Level 1

Level 0

Level 4


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Microarchitecture also known as Computer organizationat a lowerlevel.

It is the description of the system that involves how the constituent

parts of the system are interconnected and how they interoperate inorder to implement the ISA.

It is the way a given instruction set architecture (ISA) is implementedon a processor.

A given ISA may be implemented with different microarchitectures.

Implementations might vary due to different goals of a given designor due to shifts in technology.

Computer architecture is the combination of microarchitecture andinstruction set design.

Instruction Set Architecture (ISA) is the abstract image of acomputing system that is seen by a machine language (orassemblylanguage) programmer.

ISA includes the instruction set, word size, memory address modes,processor registers, and address and data formats.
http://en.wikipedia.org/wiki/Instruction_set_architecturehttp://en.wikipedia.org/wiki/Computer_architecturehttp://en.wikipedia.org/wiki/Machine_languagehttp://en.wikipedia.org/wiki/Assembly_languagehttp://en.wikipedia.org/wiki/Assembly_languagehttp://en.wikipedia.org/wiki/Instruction_sethttp://en.wikipedia.org/wiki/Word_sizehttp://en.wikipedia.org/wiki/Addressing_modehttp://en.wikipedia.org/wiki/Processor_registerhttp://en.wikipedia.org/wiki/Processor_registerhttp://en.wikipedia.org/wiki/Addressing_modehttp://en.wikipedia.org/wiki/Word_sizehttp://en.wikipedia.org/wiki/Instruction_sethttp://en.wikipedia.org/wiki/Assembly_languagehttp://en.wikipedia.org/wiki/Assembly_languagehttp://en.wikipedia.org/wiki/Machine_languagehttp://en.wikipedia.org/wiki/Computer_architecturehttp://en.wikipedia.org/wiki/Instruction_set_architecture


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Computer Level Hierarchy

Level 6 User Executable Program

Level 5 High Level Lang. C++, Java etc.

Level 4 Assembly Lang. Assembly Code

Level 3 System Software Operating System, Library

Code

Level 2 Machine Level Instruction Set Architecture

Level 1 Control Unit Microprogrammed or

Hardwired

Level 0 Digital Logic Circuits, gates etc.


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Functions of Operating System

Process Management

Memory Management

File Management

Device Management

Types of Control Unit

Micro Program is a program written in a low level lang. thatis implemented by the hardware. This results in CISCarchitecture.

Hardwired CU consist of hardware that directly executesmachine instructions. This design results in RISCarchitecture.


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Structured Organization of a computer System

System Bus

CPU Main Memory

Disk ControllerVideoSubsytem

Interfaces Audio

Hard Disks

VDU

Serial (COM)

Parallel (LPT) Port


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The Functions performed by a computing System

Data Processing Functions : carried out by CPU

Data Movement Functions : Registers & Memory

Control Functions : carried out by CU

Data Storage Functions : Memory Units

System Bus Structure : Communication pathwayconnecting two or more devices like CPU, Main Memoryor I/O. Bus is a group of physical wires.

Address Bus (Unidirectional)

Data Bus (Bidirectional) Control Bus (Unidirectional)


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MIPS and MFLOPS as Performance Metrics

MIPS rating of a CPU refers to how many low level machine codeinstructions, a processor can execute in one sec.

One way to measure CPU performance is MIPS, orMillion Instructionsper second.

MIPS = Instruction count / Execution time *106

Since, Execution time = Instruction count *CPI / Clock rate(CPI- Cycles per instruction)Equation becomes

MIPS = Clock rate / CPI *106

Since MIPS is a rate of operations per unit time, CPU performance canbe specified as the inverse of execution time, with faster machineshaving a higher MIPS rating.

Advantages:

Easy to understand

Faster machines will have higher MIPS rating and appear to havebetter performance.


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However, there are problems with using MIPS as a performance metric.

MIPS is dependent on the instruction set of the CPU, making itdifficult to compare the MIPS ratings of processors with differentinstruction sets.

MIPS can vary inversely to performance.

MFLOPS :Mega FLoating point OPerations perSecond. One millionfloating point operations per second. (FLoating point Operations PerSecond)

The measurement of floating point calculations.

The FLOPS is a measure of a computer's performance, especially infields of scientific calculations that make heavy use offloating pointcalculations, similar to the older, simpler, instructions per second.

Used for finding the performance of specialized computers likesupercomputers.

MFLOPS depends on programming behavior and hardware design

of the computer. The programs which has no floating point operation have rating

zero.

MFLOPS can measure the performance of the system morecorrectly than MIPS.
http://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Computer_performancehttp://en.wikipedia.org/wiki/Floating_pointhttp://en.wikipedia.org/wiki/Calculationhttp://en.wikipedia.org/wiki/Instructions_per_secondhttp://en.wikipedia.org/wiki/Instructions_per_secondhttp://en.wikipedia.org/wiki/Calculationhttp://en.wikipedia.org/wiki/Floating_pointhttp://en.wikipedia.org/wiki/Computer_performancehttp://en.wikipedia.org/wiki/Computer


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MFLOPS -

No. of floating point operations in program / execution time * 106

Advantage:

Useful in comparing performance of scientific applications machine. Intended to provide a fair comparison between such machines such

a flop is the same on all machines.

Problems:

Not all machines implemented the same set of flops some

operations are synthesized from some primitive flops.


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Language Of the Machine 8086

8086 is a 16bit N-Channel, HMOS Microprocessor.

It Consumes less power.

It draws 360 mA on 5 Volt.

The 8086 operates in both single processor and multiple processorconfigurations to achieve high performance.

It is manufactured for standard temperature range 32f 180f as well as

extended temperature range from 40f 180f. Its clock frequencies for different versions are 5, 8 and 10 MHz.

It is built on single semiconductor chip and packaged in 40 pin IC package.The type of package is DIP (Dual Inline Package).

It uses 20 address lines & 16 data lines.

It can directly address upto 220 = 1Mbit of memory.

16 bit data word is divided into low order byte & high order byte. 20 address lines are multiplexed lines 16 low address lines are time

multiplexed with data & 4 high address lines are time multiplexed with statussignals.


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8086 CPU is divided into independentFunctional Parts:

1. Bus Interface Unit (BIU)

2. Execution Unit (EU)

BIU sends out addresses, fetches instructions from memory,reads data from ports & memory and write data to ports &memory.

It handles all transfers of data & addresses on buses or executionunit.

EU tells BIU where to fetch instruction or data from & decodesinstructions & execute instructions.

EU contains control circuitry which direct internal operations,decoder in EU translates instructions fetched from memory intoseries of actions which EU carries out.

EU has 16 bit ALU which can add, subtract, AND, OR, XOR,increment, decrement, complement or shift binary numbers.

A 16 bit register in EU has 9 active flags where flag is a flip-flopthat indicates some conditions produced by execution of aninstruction.


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Register Organization of 8086

8086 has fourteen 16 bit registers

classified as :

General purpose Register : Ax, Bx, Cx, Dx

Pointer & Index Register : SP, BP, SI, DI

Segment register : CS (Code), DS (Data),SS (Stack), ES (Extra)

Instruction pointer & status register


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Language levels used to write a program for

a microcomputer:

Machine Language

Assembly Language

High level Language

Statement in Assembly Language

Label Field OPcode field Operand

field

Comment

field

NEXT: ADD AL, 07H ;


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Simulation Using MASM (MicrosoftAssembler)

Need for Assembler : Learn how computer works at low level.

Write device drivers

Optimize program for speed & size.

Debug, hack & dissect other programs

Bootstrap new computer system Communicate with input, output directly

Write utilities in HLL using features not available in those languages.

MASM for microprocessor can be used in 2 ways:

1. With models that are unique to a particular assembler2. With full segment definition that allow full control over the assembly

process & are universal to all assemblers.


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CAO Model Question PaperUnit 1

Q: 1 Explain Stored program control concept of various types ofcomputers.

Q: 2 On what basis Flynn has classified computers? Explain.

Q: 3 What are the characteristics of CISC architecture ? How is itdifferent from RISC architecture?

Q: 4 Explain Immediate and indexed addressing mode. Discuss theiradvantages and disadvantages.

Q: 5 How do you classify instructions in an instruction set? Explainany two instructions in each category with suitable examples.

Q: 6 Discuss the two metrics to measure the performance of acomputer system. What are their advantages & Disadvantages?

Q: 7 Distinguish between SRAM and DRAM.

Q: 8 Discuss Multilevel viewpoint of a Machine.

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