Motivation for high-speed VCSELs...¾Testing and characterization Top-emitting : 850nm self-aligned...

1

1Copyright © 2006 by Ahmad N. AL-Omari

“High-Speed Vertical-Cavity Surface-Emitting Lasers with Reduced Electrical and Thermal Constraints on

Modulation Bandwidth”Doctor of Philosophy Final Exam

of

Ahmad N. AL-Omari

Colorado State UniversityElectrical and Computer Engineering Dept.

May 26, 2006

This work has been supported in part by the DARPA under contract number DAAD19-03-1-0059 and by Yarmouk University in Jordan.


Motivation for high-speed VCSELs

PC mother board

2


Optical connection between individual computers

Motivation for high-speed VCSELs

Optical connection between Printed circuit boards

Chip-to-chipOptical

interconnects

*N. Savage, “Linking with Light,” IEEE Spectrum vol. 39, no. 8, pp 32-36, 2002

Today* IC

VCSEL

PD

VCSEL

PD

waveguide

waveguide

chip A

chip B


Components level speed limitations

* multimode fiber with a bandwidth distance product 200 MHz-km offers > 100 GHz bandwidth at this distance.

SPEED

40GHz

SPEED

100GHz

Photodiode Wave guide VCSEL(fiber)

SPEED

10GHz

(<1m)*

3


High-speed VCSEL limitations

Intrinsic limitations (58 GHz* and 71 GHz **)

Extrinsic limitations

- Junction heating- Parasitic circuit effects- Mode control

* K. L. Lear, V.M. Hietala, H.Q. Hou, J. Banas, B.E. Hammons, J. Zolper, and S. Kilcoyne, Advances in Vertical Cavity Surface Emitting Lasers in Trends in Optics and Photonics Series, vol. 15, pp. 69-74, 1997.

** D. Tauber, G. Wang and L. A. Coldren, IEEE Transactions on Electron Devices, vol. 39, pp.2652-2652, November 1992.

Schematic cross section of conventional, top-emitting, high speed VCSEL structure with superposed equivalent

circuit.


VCSELs fabrication and process development: ► Top-emitting► Bottom-emitting flip-chip bonded

Testing and characterization►Top-emitting : ■ 850nm self-aligned Cu-plated (1st generation)

■ 980nm non–self-aligned Cu-plated(2nd generation)■ 850nm non–self-aligned Cu-plated(2nd generation)

► Bottom-emitting flip-chip bonded

Electrical parasitic analysisEffect of external heating on VCSELs resonance frequency and damping factorCharacterization of spin-on dielectrics Summary (conclusions, achievements and future work)

Outline

4


Fabrication of top-emitting self-aligned VCSELs.

Top-mirror

Bottom-mirror

Self-aligned top contact

Mesa etching

Wet oxidation

Bottom contact

Isolation

Planarization

Metal wrapping & electroplating


Self-aligned top contact and mesa etching

The top contact and a smaller diameter photoresistprotecting the aperture served as an etch mask

Annular top contact

Photoresist

etch etch

4μm

1818 photoresist(Pd/Ge/Ti/Pt)

1818 photoresist

(Pd/Ge/Ti/Pt)

Microscopic top view of the (Pd/Ge/Ti/Pt)top contact and a smaller diameter 1818 photoresist

Fabrication of top-emitting self-aligned VCSELs (cont’d)

5


Mesa sidewall covered with SiNx

APlated Cu

SEM images for a top-emitting VCSEL ready for testing

0μm overlap. 2μm overlap. 4μm overlap.

A’

Plated Cu Ti-Au

p-mirror

n-mirror

GaAs substrate

PolyimideAuGe-Ni-Au

SiNxTi-AuOxide

3 QW

A cross-section of the device along AA’

Fabrication of top-emitting self-aligned VCSELs (cont’d)


Fabrication of 980nm bottom-emitting flip-chip bonded VCSELs.

Dummy mesa Device mesa Dummy mesa

Substrate

Bottom-mirror

Top-mirror

Topcontact

Ti/Au seed layersemi-insulating GaAs substrate

Plated In

Plated Cu

Bottomcontact

Mesa etching

Wet oxidation

Top contact

Bottom contact

Heat Spreader

6


Fabrication of 980nm bottom-emitting flip-chip bonded VCSELs (cont’d)

Flip-chip bonding

semi-insulating GaAs substrate

Dummy mesa Device mesa Dummy mesa

Substrate

Bottom-mirror

Top-mirror

Plated Cu/In

Mesa foot print

Top contactTi/Au

Bottom contactGe-Au-Ni-Au

Plated Cu/In

SEM images of the device mesas before and after bonding

Ti-AuTopcontact

Bottomcontact

Polyimide

Substrate

Substrate

Substrate

1. The device mesa sidewalls need to be protected from the plated metals2. The ground (Dummy) mesa sidewalls profile needs to be modified.

The incorporation of photosensitive polyimide with the VCSEL die


Fabrication of 980nm bottom-emitting flip-chip bonded VCSELs (cont’d)

Heat spreader substrateVCSELs die

VCSELs die

Device mesa wrapped with polyimide

Polyimide

Ground mesa wrapped with polyimide and covered with Ti/Au

7







Outline


0

0.2

0.4

0.6

0.8

1

0 5 10I bias (mA)

Pout

(mW

)

10μm oxide apertureIth~0.8mA

Cu-plated Au-wrappedPolyimide-wrapped*

CW L-I characteristics

* A. N. AL-Omari and K. L. Lear, “Polyimide-Planarized Vertical-Cavity Surface Emitting Lasers with 17.0 GHz Bandwidth,” IEEE PTL, vol. 16, 969-971, 2004.

Top-emitting 850nm VCSELs with a self-aligned contact and Cu-plated heatsink (1st generation)

0.91 mW

0.76 mW

0.66mW

0

1

2

3

0 5 10 15 20Active diameter(μm)

Rth

(°C

/mW

)

[*]Polyimide-wrappedAu-wrappedCu-plated

VCSELs thermal resistance vs. active diameter.

Polyimide-wrapped* Au-wrapped Cu-platedPout↑ by 15% Pout↑ by 38%

Rth↓ by 25% Rth↓ by 44%

f3dB ↑ by 12%

VCSELs modulation response vs. bias currents.

0

4

8

12

16

0 2 4 6 8Current (mA)

f3dB

(GH

z)

Cu-plated f3dBmax =16.3GHzPolyimide-wrapped*f3dBmax =14.6GHz

Plated Cu

SEM photo for a completed Au-wrapped high-speed VCSEL with 18μm diameter and 10μm oxide aperture.

SEM photo for a completed Cu-electroplated high-speed VCSEL with 18mm diameter and 10mm oxide aperture.

G

S

G

G

S

G

Au-wrapped

Polyimide

Polyimide

8


0

0.2

0.4

0.6

0.8

1

0 5 10I bias (mA)

Pout

(mW

)

10μm oxide apertureIth~0.8mA

Cu-plated Au-wrappedPolyimide-wrapped*

CW L-I characteristics

* A. N. AL-Omari and K. L. Lear, “Polyimide-Planarized Vertical-Cavity Surface Emitting Lasers with 17.0 GHz Bandwidth,” IEEE PTL, vol. 16, 969-971, 2004.

Top-emitting 850nm VCSELs with a self-aligned contact and Cu-plated heatsink (1st generation)

0.91 mW

0.76 mW

0.66mW

0

1

2

3


Rth

(°C

/mW

)

[*]Polyimide-wrappedAu-wrappedCu-plated

VCSELs thermal resistance vs. active diameter.

Polyimide-wrapped* Au-wrapped Cu-platedPout↑ by 15% Pout↑ by 38%

Rth↓ by 25% Rth↓ by 44%

f3dB ↑ by 12%

VCSELs modulation response vs. bias currents.

0

4

8

12

16

0 2 4 6 8Current (mA)

f3dB

(GH

z)

Cu-plated f3dBmax =16.3GHzPolyimide-wrapped*f3dBmax =14.6GHz


1st generation vs. 2nd generation

► Cu-plated quality ■ Density (current density,

duty cycle, temperature, sample orientation)

■ Adhesion (oxide layer, seed layer)

► Signal pad open circuit (shrinkage of the polyimide during the curing process)

► Relief of device dimensions (yield)

X2,000 X2,200

1st generation 2nd generation

9


Top-emitting 850nm VCSELs with a non-self-aligned contact and Cu-plated heatsink (2nd generation)

Ground

Polyimide

Signal

Polyimide

Ground

Plated Cu

SEM images of (a) a 26μm mesa diameter including coplanar waveguide probe pads

plated with ~3μm of Cu.

2μm overlap.

0μm overlap.


Top-emitting 850nm VCSELs with a non-self-aligned contact and Cu-plated heatsink (2nd generation)

Ground

Polyimide

Signal

Polyimide

Ground

Plated Cu

SEM images of (a) a 26μm mesa diameter including coplanar waveguide probe pads

plated with ~3μm of Cu.

2μm overlap.

0μm overlap.

f3dB vs. (I-Ith)1/2

0

5

10

15

20

0 1 2 3(I-Ith)1/2mA1/2

f 3dB

(GH

z)

10μm/2μm/8.1(GHz/mA1/2)12μm/2μm/5.7(GHz/mA1/2)18μm/2μm/4.0(GHz/mA1/2)

Legend key: Active area/overlap/MCEFStraight lines: fit to f3dB=MCEF(I-Ith)1/2

8μm/2μm/15.6(GHz/mA1/2)8μm/0μm/11.8(GHz/mA1/2)

+

f3dB ↑ by 11% compared tof3dB ~ 18 GHz at 8kA/cm2

+

+

0

1

2

3


Rth

(°C

/mW

)

Rth vs. active diameter.

Polyimide-wrappedAu-wrappedCu-plated (1st generation)Cu-plated(2nd generation)

■ Rth ↓ by 57%, 52%, and 45% compared to , ,and respectively

10


Top-emitting 850nm VCSELs with a non-self-aligned contact and Cu-plated heatsink (2nd generation) (cont’d)

0

5

10

15

20

0 1 2 3(I-Ith)1/2mA1/2

f3dB

(GH

z)

f3dB vs. (I-Ith)1/2

8μm/2μm/15.6(GHz/mA1/2)Active area/overlap/MCEF

843 845 847 849λ(nm)

I bias (Ibias-Ith)1/2

1mA 0.71mA1/2

2mA 1.22mA1/2

3mA 1.58mA1/2

4mA 1.87mA1/2

5mA 2.21mA1/2

Wavelength spectrum for an 8μm active diameter VCSEL with a 3μm of plated Cu at different bias currents.




Plated Cu

0μm overlap.

4μm overlap.

Non-self-aligned top-emitting Cu-plated 980nm VCSELs (2nd generation)

0

1

2

3

4

5

6

0 10 20 30 40Current (mA)

Pow

er(m

W)

0

1

2

3

4

5

6

Vol

tage

(V)

0um overlap4um overlap

CW L-I-V characteristics for a 26mm mesa diameter VCSEL with a

9μm oxide-aperture diameter.

power output ↑ by 131%

11




Plated Cu

0μm overlap.

4μm overlap.

Non-self-aligned top-emitting Cu-plated 980nm VCSELs (2nd generation)

0

1

2

3

4

5

6

0 10 20 30 40Current (mA)

Pow

er(m

W)

0

1

2

3

4

5

6

Vol

tage

(V)

0um overlap4um overlap

CW L-I-V characteristics for a 26mm mesa diameter VCSEL with a

9μm oxide-aperture diameter.

power output ↑ by 131%

0

1

2

3


Rth

(°C

/mW

)

Cu-plated 850nm (2nd)Cu-plated 980nm (2nd )

Polyimide-wrappedAu-wrappedCu-plated 850nm (1st)

Rth vs. active diameter.

Rth↓ by 50%f3dB ↑ by 30 and 40% for and ,respectively, compared tof3dB max ~ 9.8 GHz at 8.9kA/cm2

0

2

4

6

8

10

12

0 1 2 3 4

(I-Ith)1/2 (mA)1/2

f 3dB

(GH

z)0um overlap2um overlap4um overlap

f3dB vs. (I-Ith)1/2

5.0, 3.0, and 2.2 GHz/mA1/2MCEF

f3dB=MCEF(I-Ith)1/2


0

1

2

3


Rth

(°C

/mW

)

Previous workPrevious work/Bottom-emittingPresent work/1st generationPresent work/1st generationPresent work/2nd generationPresent work/2nd generationPresent work/2nd generation

VCSELs’ thermal resistance vs. active diameter

aRth ⋅

=ξ41

fit

12


VCSELs bandwidths vs. current densities

0

5

10

15

20

0 10 20 30 40 50

Jbias(kA/cm2)

f 3dB

(GH

z)

work by othersprevious work by authorpresent workbenchmark for reliability

Calculated

Photonic crystal


Bottom-emitting flip-chip bonded 980nm VCSELs

CW L-I characteristics for 980nm bottom-emitting VCSELs before and after flip-chip bonding.

Heat spreader substrateVCSELs die

polyimide- wrapped device mesa

VCSELs dieG

G

0

5

10

15

20

25

0 5 10 15 20 25 30 35

Current(mA)

Pow

er(m

W)

0

5

10

15

20

25

0 5 10 15 20 25 30 35

Current(mA)

Pow

er(m

W)

Before bonding: doted After bonding: solid

10μm

14μm

16μm

20μm

The flip-chip bonding↑ the maximum output power for VCSELs with active diameters of 10, 14, 16, and 20μm by 10, 11, 19, and 25%, respectively.

13







Outline


Electrical parasitic analysis

Top-emitting long oxide VCSEL Cm = 142.4 fFCp = 56.9 fF

Top-emitting short oxide VCSEL

Cm = 70 fF (~49%)Cp = 21 fF (37%)

Estimated values for a 7μm oxide aperture:

High speed VCSEL cross section

Polyimide

Substrate

Cp Co2 Metal pad

Co1 Ca

Oxide

QWs

7μm

14


Electrical parasitic analysis

CwrapH+CwrapV ~ 236fFf3dB ~15.6 GHz (simulated) f3dB ~16.3 GHz (measured)

Polyimide

Gold rap(3000Å)

Ti/Au

Si3N4 (1000Å)

Cwrap V

Cwrap H 0

0.2

0.4

0.6

0.1 1 10 100Frequency (GHz)

Vou

t(V

)

6μm extension of Cu around the mesa2μm extension of Cu around the mesa

Electrical parasitic analysis (cont’d)

PSpice simulations pointed out that purely electrical circuit effects would allow a maximum 3dB bandwidth of

about 63GHz

It is believed that Cu-plated VCSELs with 6μm extension of Cu around the mesa are limited by electrical parasitics rather than thermal effects.







Outline

15


Effect of external heating on VCSELs resonance frequency and damping factor

0

0.4

0.8

1.2

1.6

0 1 2 3 4 5 6 Current(mA)

Pow

er(m

W)

974 975 976λ (nm)

Bias point for RIN measurements

18μm mesa diameter/8μm active diameter

L-I of an 18μm mesa diameter with an 8μm active diameter. The inset shows the wavelength spectrum at which the relative intensity noise (RIN) was measured.

Hp 8569B spectrum analyzer 23

dB34dB

Amplifiers

Temp. controllerILX-LDT-5910B

Photodiode

RIN measurement setup.

Keithley source meter

Temp. controller stage


0

2

4

6

8

0 10 20 30 40 50 60Stage temperature (°C)

f r(G

Hz)

0

5

9

14

18

Γx1

09 (Rad

/s)

Effect of external heating on VCSELs resonance frequency and damping factor (cont’d)

Relaxation oscillation frequency and damping as a function of the stage

temperature.

4 6 8Frequency(GHz)

a.u.

10C20C30C40C50C

RIN spectra of the investigated VCSEL under different stage

temperatures.

16


0

4

8

12

16

0 10 20 30 40 50

fr2(GHz)2

Γx1

09 (Rad

/s)

2~ rKfΓ

Temperature increase in 10°C step

60°C

10°C

Effect of external heating on VCSELs resonance frequency and damping factor (cont’d)

Slope=K=0.36ns

Kf dB )22(3 π=

A maximum intrinsic 3dB frequency bandwidth of 24.7GHz is estimated using:

Damping vs. the relaxation oscillation frequency squared at different stage temperatures







Outline

17


Dielectric130μm

GaAs substrate

Signal contactTi-Au (0.33 μm)

Ground contactTi-Au-Ti (0.37 μm)

Ti-Au (0.33 μm)

Capacitor cross-section at AA’

Characterization of spin-on dielectrics

Metal padsTi/Au

G

S

G

Ti/Au/Ti

Dielectric

A’

A

SEM photo for a completed capacitor ready for testing.

Futurrex, Inc. Dow Chemical Cyclotene™HD Microsystems™HD Microsystems™Manufacturer

SOG IC1-200BCB-4024PI-2723HD-8000Specific variety

►Capacitors from the different dielectric materials with various thicknesses were fabricated.► Microwave scattering parameters were measured.


Characterization of spin-on dielectrics (cont’d)

1

2

3

4

5

0 10 20 30 40Frequency (GHz)

ε'

PI-2723

HD-8000 BCB-4024

SOG IC1-200

ε’ vs. freq.

40

50

60

70

80

90

100

110

0 10 20 30 40Frequency (GHz)

Cp(f

F)

BCB-4024 IC1-200 (÷4)

HD-8000

PI-2723

MeasuredFit

Capacitance vs. frequency.

0

6

12

18

24

0 2 4 6 8Dielectric thickness (μm)

Rlo

ss ( Ω

)

HD 8000PI 2723SOG IC1 200BCB 4024

Dielectric loss equivalent resistance vs. dielectric thickness.

Dielectric permitivity as a function of frequency was extracted and is well approximated by a second degree polynomial.A circuit model for the pad capacitance is developed based on geometrical and physical considerations

18







Outline


AchievementsWe have fabricated and characterized high-speed oxide-confined VCSELs with high-

speed performance.

A mask set was designed with flexibility to investigate various VCSEL structures. A complete fabrication process for self- and non-self-aligned VCSELs was developed.

Self- and non-self-aligned top-emitting 850 and 980nm high-speed VCSELs were fabricated and characterized. The effect of a heat-sinking layer on the VCSELsperformance was demonstrated.

↑ 40%↑ 131%↓ 50%↓ 63%2ndNon-self-aligned 980 nm

↑ 11%↑ 42%↓ 57%↓ 63%2ndNon-self-aligned 850nm

↑ 12%↑ 38%↓ 44%↓ 63%1stSelf-aligned 850nm

Modulation bandwidth

Output power

Thermal resistance

Padcapacitance

GenerationTop-emitting

↓↓ Preferred trend

Un-preferred trend

19


Achievements (cont’d)

Bottom-emitting non-self-aligned flip-chip bonded 980nm devices were fabricated and characterized. ■ Flip-chip bonding ↑ the output power by up to 25%.■ The lasers exhibited a slope and wall plug efficiencies of 71% and 47%, respectively.

Increasing the stage temperature tends to reduce both the resonance frequency and the damping factor, hence limiting the modulation bandwidth of the VCSEL. The maximum intrinsic 3dB frequency bandwidth was estimated to be 24.7GHz.

The effect of annealing, etching, and oxidation on the Ti-Pd-Ti-Au-Ti-Pd and Ti-Ni-Ti-Ni metal systems specific contact resistance was investigated. The later metal system exhibited a lower specific contact resistance relative to the former one.

Dielectric properties of 4 different spin-on dielectrics were investigated. A circuit model for the pad capacitance was obtained.


Achievements (cont’d)

Development of ► a computer controlled planetary stage for metal step coverage.► an In-situ monitor for end point etch detection.► a more accurate sample temperature monitoring system during the oxidation process with manual feedback.► an electrically-heated stage to replace the flip-chip bonding gas-heated stage for more accurate and repeatable bonding process.

Technical support for almost all of the cleanroom equipments including writing new and editing exist standard equipment procedures, maintenance, modifications needed to carry out specific processes, and fixing.

Trained more than 20 cleanroom users (EE, CH, C, and PH) on various equipments and helped them accomplish their goals ( mask design, process development, and fabrication issues).

20


Conclusions► Scaling down mesa diameter and active area reduce the VCSEL self-heating and mesa

parasitic capacitance.

► The effect of heat-sinking on the performance of high-speed VCSELs was demonstrated at 850 and 980nm. The presence of heat-spreading layers the thermal impedance, the maximum output power, and the f3dB modulation bandwidth.

► There is a tradeoff between the heat-spreading layer overlap for thermal impedance reduction and the resulting parasitic capacitance for high-speed operation.

► The flip-chip bonding of bottom-emitting devices demonstrated its effect on the VCSEL performance.

► The thermal resistance measurements indicated the importance of lateral heat flow to the mesa sidewalls.

► The reduction in the resonance frequency and damping factor due to the increase in stage temperature is believed to cause the VCSEL’s modulation bandwidth to saturate.

► The use of photosensitive HD-8000 polyimide gave reliable and repeatable results.


Future workMore fabrication runs need to be done to optimize the VCSEL fabrication process.

Investigation of the high threshold voltage values and nonlinear I-V characteristics that the fabricated devices suffered from.

At which thickness will further increase in the heat-sinking layer cease to have considerable effect on the VCSEL thermal resistance reduction?

Other materials with better characteristics such as CVD diamond can be used to replace SiNx and polyimide.

To improve the heat sinking for the current bottom-emitting flip-chip devices, the device mesa sidewalls need to be plated with a heat sinking layer.

Epitaxial structure optimization since tradeoffs exists between different factors affecting high-speed operation.

A comparison between the measured and modeled performance need to be done to develop further understand of the major issues affecting VCSEL speed and model modifications that results in more accurate predictions.

21


ACKNOWLEDGMENTS

The technical assistance from G. Dang and the support of R. Athale, W. Chang, and G. Simonis.


JOURNALS[1] A. N. AL-Omari and K. L. Lear, “Polyimide-Planarized Vertical-Cavity Surface Emitting Lasers with 17.0 GHz

Bandwidth,” IEEE Photonics Technology Letters, Vol. 16, No. 4, pp. 969-971, April 2004.[2] A. N. AL-Omari and K. L. Lear, “VCSELs with a Self-Aligned Contact and Copper-Plated Heatsink,” IEEE Photonics

Technology Letters, Vol. 17, No. 9, pp. 1767- 1769, September 2005. [3] A. N. AL-Omari and K. L. Lear, “Dielectric Characteristics of Spin-Coated Dielectric Films Using On-Wafer Parallel-

Plate Capacitors at Microwave Frequencies,” IEEE Transactions on Dielectrics and Electrical Insulation. Vol. 12, No. 6, pp. 1151- 1161, December 2005.

[4] A. N. AL-Omari et al., “Low Thermal Resistance, High Speed, Top Emitting 980nm VCSELs,” IEEE Photonics Technology Letters, Vol. 18, No.11, pp. 1225- 1227, November 2006.

[5] A. N. AL-Omari and K. L. Lear, “Low Current Density, Inverted Polarity, 850nm VCSELs with 18GHz Bandwidth,”IEEE Photonics Technology Letters, in preparation.

CONFERENCES[1] A. N. AL-Omari and K. L. Lear, “High-Speed Polyimide-Planarized, Vertical-Cavity Surface Emitting Lasers,”

Proceedings of SPIE, Vertical-Cavity Surface-Emitting Lasers VIII Conf., Vol. 5364, pp.73-79, San Jose, CA, June 2004.

[2] A. N. AL-Omari, Stewart. A. Feld, and K. L. Lear, “Bottom-Emitting, Flip-Chip VCSEL Structure with Reduced Constraints on Modulation Response,” Proceedings of SPIE, Photonic Devices and Algorithms for Computing VI Conf.,Vol. 5556, pp.199-205, Denver, CO, August 2004.

[3] A. N. Al-Omari, S. A. Feld, and K. L. Lear, “Novel VCSEL Structure with Reduced Constraints on Modulation Bandwidth,” Proceedings of the 17th Annual Meeting of the IEEE - LEOS 2004, Vol.1, pp.328-329, Rio Grande, Puerto Rico, 7-11 November 2004.

[4] A. N. Al-Omari and K. L. Lear, “Improved Performance of Top-Emitting, Oxide-Confined VCSELs with Self-Aligned Contact and Cu-Plated Heatsink,” IEEE Conference on Quantum Electronics and Laser Science, Vol. 2, pp. 1020-1022, Baltimore, Maryland, 22–27 May 2005.

Publications

22


[5] A. N.AL-Omari et al.,“Low Thermal Resistance, Low Current Density, High-Speed 980 and 850nm VCSELs,” 20th IEEE International Semiconductor Laser Conference, Waikoloa, Hawaii, 17–21 September 2006. (submitted)

OTHER PRESENTATIONS[1] A. N. AL-Omari and K. L. Lear, “High-Speed Polyimide-Planarized, 850nm VCSELs with 17.0 GHz Bandwidth,”

Colorado Photonics Industry Association 4th annual meeting, Boulder, CO, November 20, 2003. [2] A. N. AL-Omari and K. L. Lear “17 GHz polyimide planarized VCSELs” seminar at Cielo Communication Inc.,

Broomfield, CO, March 2004. [3] K.L. Lear and A. N. AL-Omari, “VCSEL drives higher-bandwidth LANs,” Fiber Systems Europe in association

with LIGHTWAVE Europe (FSE&LE), p.7, United Kingdom, May 2004. (Editor: Tami Freeman)[4] A. N. AL-Omari and K. L. Lear, “17 GHz polyimide planarized VCSELs for chip-to-chip optical interconnects,”

poster presented at Information Science and Technology Colloquium, Fort Collins, CO, April 13-14, 2005. [5] A. N. Al-Omari et al., “Thermal impact and management for high-speed VCSELs,” poster presented at Information

Science and Technology Colloquium, Fort Collins, CO, April 13-14, 2005. [6] A. N. AL-Omari, K. L. Lear, and C. Menoni, “Laboratory Manual for Electrical Engineering Fundamentals

(EE192),” Colorado State University, Electrical and Computer Engineering Department, 2000.

Publications (cont’d)

Memberships and societies

Motivation for high-speed VCSELs...¾Testing and characterization Top-emitting : 850nm self-aligned...

Documents

Transcript of Motivation for high-speed VCSELs...¾Testing and characterization Top-emitting : 850nm self-aligned...