More Instructions EE 3170 Microcontroller Applications 3170 Lecture 6-part1... · format (or...
Transcript of More Instructions EE 3170 Microcontroller Applications 3170 Lecture 6-part1... · format (or...
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EE3170/CC/Lecture#6 1
EE 3170 Microcontroller ApplicationsLecture 6 : Instruction Subset & Machine Language: Addressing Modes in Motorola 68HC11- Miller §2.1 & §2.2 & §2.3
Based on slides for ECE3170 by Profs. Davis, Kieckhafer, Tan, and Cischke
EE3170/CC/Lecture#6 2
Lecture OverviewMore Instructions
Example: first assembly language program
Addressing ModesIntroduction, definitions, and notation
The 68HC11 Addressing Modesdefinitionaddress calculationadvantages and disadvantagescommon uses
EE3170/CC/Lecture#6 3
A Few More InstructionsInstruction Set Table:
Explains operation of instructionPresents additional detailsThere will be more columns later
Figure 2-15: Part of the instruction set table
Store Accumulator ASTAALDAA Load Accumulator AADDA Add Memory to A BB hh ll
OpCode
A M
Operand
Machine Code
Byte
s
STOP Stop program 3F
B6B7
hh llhh ll
3331
SourceForm
OperationBoolean
Expression
A+M AM A
EE3170/CC/Lecture#6 4
Instruction Format
From Reference Manual
Each ONE of the TEN encodings is a different format (or addressing mode) for the same LDA instruction
Only concern ourselves with one at a time
Source: 68HC11 Reference Manual(http://www.technologicalarts.com/myfiles/links.html)
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EE3170/CC/Lecture#6 5
Example - First Program
“C” Version: SUM = N1 + N2SUM, N1, & N2 are variablesC compiler assigns a mem address to each variable
Assembly language version:Programmer assigns addresses to variables, e.g.
N1 ⇒ C20BN2 ⇒ C20CSUM ⇒ C20D
At some point programmer must initialize N1& N2
EE3170/CC/Lecture#6 6
Example - First Program“SUM = N1 + N2” in Assembler Language (AL)
ldaa C20B * Load N1 into A
adda C20C * Add N2 to A
staa C20D * Store A in SUM
stop * Halt the program
Assembler program translates AL code into ML codeB6C20B, BBC2OC, B7C20D, 3F
Loader program loads ML “object code” into mem
EE3170/CC/Lecture#6 7
Loaded Object Program and Data
ldaa C20B
adda C20C
staa C20D
stop
B6C2
C200C201C202C203C204C205C206C207C208C209C20AC20BC20CC20D
0BBBC20CB7C20D3FFF0229FF
LDAA
ADDA
STAA
STOP
N1N2
SUM
PC
A
B
CF
EE3170/CC/Lecture#6 8
How Would We Extend This Program to Add Three Numbers?
What would stay the same?
What would change?
C200C201C202C203C204C205C206C207C208C209C20AC20BC20CC20D
00
PC
A
B
C2
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EE3170/CC/Lecture#6 9
Considerations for Third Number
We need another adda which is a 3-byte instruction.
That means stop will be in C20C.
N1, N2, N3 and SUM will follow.
EE3170/CC/Lecture#6 10
Program to Add Three Numbers
Program
ldaa C20Eadda C20Fadda C210staa C211stop
Memory
ldaa C200 B6C201 C2C202 0E
adda C203 BBC204 C2C205 0F
adda C206 BBC207 C2C208 10
staa C209 B7C20A C2C20B 11
stop C20C CFC20D blank
N1 C20EN2 C20FN3 C210SUM C211
C200C201C202C203C204C205C206C207C208C209C20AC20BC20CC20D
00
PC
A
B
C2
EE3170/CC/Lecture#6 11
Programming Reference Guide
Available at: http://www.freescale.com/files/microcontrollers/
doc/ref_manual/M68HC11ERG.pdf
EE3170/CC/Lecture#6 12
Programming Reference Guide
Available at: http://www.freescale.com/files/microcontrollers/doc/ref_manual/M68HC11ERG.pdf
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EE3170/CC/Lecture#6 13
How Can We Address Memory? -Addressing Modes
So far, all data addresses have been embedded in their entirety within the instruction
This approach can have disadvantages:It takes a lot of space in the instruction,
68HC11: 64KB address space ⇒ 2 bytes / addressPentium et al: 4GB address space ⇒ 4 bytes / address
It takes extra clock ticks to fetch the whole addressMay need to calculate or modify address at run-time
an array entrya linked list pointer
We need a shorter, faster way to address memory.EE3170/CC/Lecture#6 14
DefinitionsEA = Effective Address = the complete 16-bit address of a data item in memory
Addressing Mode = a method the processor uses to calculate an effective address, including:
The information used in the calculationThe algorithm used in the calculation
EE3170/CC/Lecture#6 15
Notationhh = high-order byte of an addressll = low-order byte of an addressdd = one byte of dataM = a one-byte memory word“:” = concatenation:
hh:ll = full 16-bit address00 : value = unsigned byte zero-extended to 16-bitsss : value = signed byte sign-extended to 16 bitsM:(M-1) = 16-bit concat. of two adjacent mem. bytes
EE3170/CC/Lecture#6 16
68HC11 Addressing Modes6 Basic Addressing Modes:
Some minor variations to be introduced later
Mode Names:Extended AddressingDirect AddressingInherent AddressingImmediate AddressingIndexed AddressingRelative Addressing
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EE3170/CC/Lecture#6 17
Addressing modes in a nutshellExtended Addressing
EA = hh:ll
Direct AddressingEA = 00:ll
Inherent Addressingn/a : no memory access – uses registers
Immediate Addressingn/a : no memory access – data contained in machine code
Indexed AddressingEA = index + 00 : offset
Relative AddressingEA = PC + ss : offset
EE3170/CC/Lecture#6 18
1. Extended AddressingDefinition:
The complete address is contained in the instructionExactly what we have been looking at
Instruction: Opcode hh ll
EA Calculation: EA = hh:ll
Range: 0000 …FFFFEntire Address Space
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1. Extended AddressingAdvantages:
can access the entire address space
Disadvantages:Requires two bytes in the instruction for addressRequires two clock ticks to fetch the addressAddress of the data must be known at assembly time
Uses:Scalar Variables
EE3170/CC/Lecture#6 20
Extended Addressing Example
Source: 68HC11 Reference Manual (http://www.technologicalarts.com/myfiles/links.html)
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EE3170/CC/Lecture#6 21
Extended Addressing Example
EE3170/CC/Lecture#6 22
Extended Addressing Example
B6C2
C200C201C202C203C204C205C206C207C208C209C20AC20BC20CC20D
0BBBC20CB7C20D3FFF0229FF
LDAA
ADDA
STAA
STOP
N1N2
SUM
PC
A
B
CF
EE3170/CC/Lecture#6 23
2. Direct AddressingDefinition:
low-order byte of the address is in the instructionhigh-order byte is set to zero
Instruction: Opcode ll
EA Calculation: EA = 00 : ll
Range: 0000 ... 00FFLower 256 bytes of memory
EE3170/CC/Lecture#6 24
2. Direct AddressingAdvantages: relative to extended
saves one byte in the instructionsaves one clock tick in the Fetch Phase
Disadvantages:range limited to lower 256 bytes of memory
Uses:Fast access to frequently used scalar variables
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EE3170/CC/Lecture#6 25
Direct Addressing Example
EE3170/CC/Lecture#6 26
Direct Addressing Example
Source: 68HC11 Reference Manual (http://www.technologicalarts.com/myfiles/links.html)
EE3170/CC/Lecture#6 27
Direct Addressing Example
C200C201C202C203C204C205C206C207C208C209C20AC20BC20CC20D
00
PC
A
B
C2B6dd
BBdd
LDAA
EE3170/CC/Lecture#6 28
3. Inherent AddressingDefinition:
All relevant data is already in registers, not memory68HC11 registers are all special purposeRegister I.D. is “inherent” in the Opcode
Instruction: Opcodee.g. ABA adds accumulator B to accumulator Ai.e. A + B → A
EA Calculation: there is none
Range: Not Applicable
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EE3170/CC/Lecture#6 29
3. Inherent AddressingAdvantages: relative to extended
saves two bytes in the instructionsaves two clock ticks in the Fetch Phase
Disadvantages:there are very few registers
Uses:Fast ops on data previously loaded into registersInstructions which do not need data (e.g. “STOP”).
EE3170/CC/Lecture#6 30
Inherent Addressing Example
EE3170/CC/Lecture#6 31
Inherent Addressing Example
EE3170/CC/Lecture#6 32
4. Immediate AddressingDefinition:
The data is contained in the instructionLimited to 1 byte data
Instruction: Opcode ddwhere dd = the actual data value (not an address)
EA Calculation: there is none
Range: Not Applicable
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EE3170/CC/Lecture#6 33
4. Immediate AddressingAdvantages: relative to extended
saves the extra operation of fetching the data after anaddress is fetched or calculatedsaves the memory required to store an address
Disadvantages:data value must be known at assembly timedata value can not be changed by the program
Uses:constants needed by the programe.g. length of a loop
EE3170/CC/Lecture#6 34
Immediate Addressing Example
EE3170/CC/Lecture#6 35
Immediate Addressing Example
EE3170/CC/Lecture#6 36
5. Indexed AddressingDefinition: The effective address is the sum of
an “index” field contained in an index registeran “offset” field contained in the instruction
Instruction: Opcode offset
EA Calculation: EA = index + 00 : offset68HC11 has two 16-bit index registers (X and Y)68HC11 uses an 8-bit offset
Range: (Val. in index reg.) + (00 … FF)i.e. (X+0) … (X+255) or (Y+0) … (Y+255)
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EE3170/CC/Lecture#6 37
5. Indexed AddressingAdvantages: relative to extended
address need not be known at assembly timesupports loop and array operationsThe effect of altering index reg. is to alter the EA of the instruction
The instruction code including the offset byte remains unchanged.
Disadvantages:addition needed to calculate the address
Uses: ArraysIncrementing addresses inside a loop
EE3170/CC/Lecture#6 38
Indexed Addressing Example
EE3170/CC/Lecture#6 39
Indexed Addressing Example
EE3170/CC/Lecture#6 40
A Few Indexed Addressing Instructions
Indexed Addressing Support InstructionsLDX = Load X register ⇒ M:(M+1) → XLDY = Load Y register ⇒ M:(M+1) → Y
STX = Store X register ⇒ X → M:(M+1) STY = Store Y register ⇒ Y → M:(M+1)
INX = Increment X register ⇒ X+1 → X INY = Increment Y register ⇒ Y+1 → Y
DEX = Decrement X register ⇒ X-1 → X DEY = Decrement Y register ⇒ Y-1 → Y
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EE3170/CC/Lecture#6 41
6. Relative AddressingDefinition: A variation on indexed addressing
The PC is used as the index registerthe “offset” field in the instruction is a signed value
Instruction: Opcode offset
EA Calculation: EA = PC + ss : offset
Range: (Value in PC) + [-7F … (+7F-1) ]i.e. (PC -128) … (PC + 127)
EE3170/CC/Lecture#6 42
6. Relative AddressingAdvantages: relative to extended
full address need not be known at assembly timeif the code is “relocated” to a different starting address(PC reg.) then the data address moves with it
EA is formed during the execute phase of the instruction
Disadvantages:the extra addition needed to calculate the addressthe small range relative to current value of PC
Uses:Branch Instructions
EE3170/CC/Lecture#6 43
Relative Addressing Example
EE3170/CC/Lecture#6 44
Relative Addressing Operations
Address in PC is unsigned numberfor EA calculation we can think of it as signed
Relative offset in instruction is 2’s complement signed number
Sign extend relative offset and add to PC contents
Interpret result as unsigned number (effective address)
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EE3170/CC/Lecture#6 45
One More Complication (Skipped)Program counter is incremented during fetch.
=> points to address of next instruction in sequenceSince branch instruction is two bytes long, this next instruction is 2 after BR.
Branch is executed during execute.=>branches from incremented PC =>branching back 2 gives infinite loop.
Why?
EE3170/CC/Lecture#6 46
Addressing Mode Summary68HC11 Has Six Addressing Modes
Could be logically grouped into three classes
1. “Concatenated-Address” ModesExtended Addressing:
Instruction: Opcode hh llEA = hh:ll
Direct Addressing:Instruction: Opcode llEA = 00:ll
EE3170/CC/Lecture#6 47
Addressing Mode Summary
2. “No-Address” Modes:Inherent Addressing:
Instruction: OpcodeEA = none (data is already in registers)
Immediate Addressing:Instruction: Opcode ddEA = none (data value is in the dd byte of instruction)
EE3170/CC/Lecture#6 48
Addressing Mode Summary
3. “Summed-Address” Modes:Indexed Addressing:
Instruction: Opcode offsetEA = (X + 00:offset) or (Y + 00:offset)
Relative Addressing:Instruction: Opcode offsetEA = PC + ss:offset
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EE3170/CC/Lecture#6 49
Addressing Mode Summary
The addressing mode used in an instruction is encoded into the Opcode
e.g. ldaa has several address mode optionseach option has a different ML opcode, e.g.:
86 ⇒ Use Immediate mode96 ⇒ Use Direct ModeB6 ⇒ Use Extended mode