mohit resume

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Local Address: 1377 E-Block, AECS Layout Kundanahalli, Bangalore 560037 MOHIT SRIVASTAVA [email protected] +91-8884676016 Permanent Address: N 98, Hindalco Colony,Renukut, Sonebhadra, 231217 OBJECTIVE Looking forward to enhance my capabilities and skills in a research and growth oriented organization and help it advance efficiently and productively with creative vision. EDUCATION 2012-2014 M.Tech, Indian Institute of Information Technology, Allahabad India.|8.4/10 2006-2010 B.Tech, Electronics and Communication Uma Nath Singh Institute of Engineering and Technology, VBS Purvanchal University, Jaunpur, India.|75.03% 2006 Intermediate, CBSE, India. |74.2% 2004 Highschool, CBSE, India. |75.4% SKILLS Worked in: Familiar with: C Spice Matlab Perl C++. WORK EXPERIENCE Trainee Engineer at “Si2Chip Technologies Pvt Ltd.” (Jul 2014 – Jul 2015) Associate Design Engineer at “Si2Chip Technologies Pvt Ltd.” (Aug 2015 – Present) PROJECTS UNDERTAKEN Single bank SRAM Memory Margins Characterization of memory: Access Time Cycle Time Setup & Hold Power, Leakage Signal flow. Trend Analysis with different instances, PVT. Migration of multibank memory architecture to 45nm. Enabling redundancy in Single bank SRAM Developed single bit redundancy. Basic functionality test of modified architecture. SRAM Bitcell Design and Characterization of 6T Bitcell Optimizing transistor sizing Analyzed Iread, Bump, SNM, Write time etc.

Transcript of mohit resume

Page 1: mohit resume

Local Address: 1377 E-Block, AECS Layout Kundanahalli, Bangalore 560037

MOHIT SRIVASTAVA [email protected]

+91-8884676016

Permanent Address:

N 98, Hindalco Colony,Renukut,

Sonebhadra, 231217

OBJECTIVE Looking forward to enhance my capabilities and skills in a research and growth

oriented organization and help it advance efficiently and productively with creative vision.

EDUCATION 2012-2014 M.Tech, Indian Institute of Information Technology, Allahabad India.|8.4/10 2006-2010 B.Tech, Electronics and Communication

Uma Nath Singh Institute of Engineering and Technology, VBS Purvanchal University, Jaunpur, India.|75.03%

2006 Intermediate, CBSE, India. |74.2% 2004 Highschool, CBSE, India. |75.4%

SKILLS Worked in: Familiar with:

C Spice Matlab

Perl C++.

WORK EXPERIENCE

Trainee Engineer at “Si2Chip Technologies Pvt Ltd.” (Jul 2014 – Jul 2015)

Associate Design Engineer at “Si2Chip Technologies Pvt Ltd.” (Aug 2015 –

Present)

PROJECTS UNDERTAKEN

Single bank SRAM Memory

Margins

Characterization of memory:

Access Time

Cycle Time

Setup & Hold

Power, Leakage

Signal flow.

Trend Analysis with different instances, PVT.

Migration of multibank memory architecture to 45nm.

Enabling redundancy in Single bank SRAM

Developed single bit redundancy.

Basic functionality test of modified architecture.

SRAM Bitcell

Design and Characterization of 6T Bitcell

Optimizing transistor sizing

Analyzed Iread, Bump, SNM, Write time etc.

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Characterization and Analysis of Sense Amplifier for SRAM

Calculation of Sense Offset

Analysis of resolution Time

Characterization of Flip Flop

Enabling set reset functionality

Set up and Hold time calculation with waveform.

Designing of shift register and calculation of different timing arcs

(slack, setup and Hold, Frequency, delay paths).

Basic MOS simulations &Standard Cells

Designing and Characterization of basic gates, transmission gate,

tristate inverter, ring oscillator.

M.Tech (Thesis) Recognition of Emotions from Human Speech

In this classification of emotions like happy, anger, sad etc, will be done

using suitable features like pitch, formant, MFCC. MATLAB is the tool

being used.

M.Tech (Course/Project):

Practical implementations of Machine Learning, Soft Computing and

Image Processing. Software - C, Matlab.

Iris (flower) data-set classification using Bayes classifier, Discriminant

analysis, K Means and Fuzzy C Means.

Mathematical function optimization using Genetic algorithm.

Classification/Clustering/Segmentation in Satellite images.

Face Recognition using PCA, LDA and ANN.

Prepaid Energy Meter (B.Tech).

Industrial Training at Bharat Electronics Limited, Ghaziabad.

AWARDS and ACHIEVEMENTS

Published paper “Classification of Emotions from Speech Using Implicit features” in

ICIIS 2014, ISBN : 978-1-4799-6499-4.

Qualified “National Science Olympiad” with 78% in 2005.

Awarded Gold Medal from the Governor in graduation.

PERSONAL PROFILE

Father’s Name Date of Birth

Nationality Sex

Hobbies Languages Known

Mr. Jai Prakash Srivastava 5

th September 1988

Indian

Male

Cricket, Carrom Hindi, English.

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Key Strengths DECLARATION

Ability to think positively, solving issues sticking to the basics.

Consistent learner, enthusiastic towards learning new things and

technologies.

Like to take initiative in doing new things.

Enjoy any work that I do, try to get the best result out of it .

I hereby declare that all the information provided by me in this curriculum vitae is factual and correct to the best of my knowledge and belief.

Place : Bangalore, India

MOHIT SRIVASTAVA