Model-Based Design For Power Electronic · PDF fileModel-Based Design For Power Electronic...

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Model-Based Design For Power Electronic Systems (Jean Bélanger CEO OPAL-RT) EICON 2013, Vienna 1 Sept 6, 2013 Using Dyno, Analog Benches, RCP and HIL Simultion to develop and test power electronic controls used in drives, uGrids and HVDC Applications

Transcript of Model-Based Design For Power Electronic · PDF fileModel-Based Design For Power Electronic...

Model-Based Design

For Power Electronic Systems

(Jean Bélanger CEO OPAL-RT)

EICON 2013, Vienna

1 Sept 6, 2013

Using Dyno, Analog Benches, RCP and HIL Simultion to

develop and test power electronic controls used in drives,

uGrids and HVDC Applications

Opal-RT Technologies in Brief

Established in 1997

• H.Q. in Montreal, QC, Canada

• Over 100 Employees

Creators of RT-LAB Software

25% of turnover reinvested in R&D

More than 500 customers worldwide

Power Systems

Power Electronics

Automotive

Aerospace

Rapid Control Prototyping

(RCP)

RT-LAB Real-Time Platform

MATLAB/Simulink

& EMTP-RV Integration

Opal-RT in Brief

2012-

01-16

V

3 2

Global & Local Presence

HQ – Montréal, QC,

Canada

Corporate Office

Subsidiary & Distributor

Opal-RT in Brief

2012-

01-16

V

3 3

OPAL-RT Europe OPAL-RT India

OPAL-RT USA OPAL-RT Australia (2014)

Japan, China, Korea, Taiwan, Brazil

OPAL-RT China

Home/content

斗山

葛洲坝换流站

华中等值机

练塘换流站

图2.仿真等值系统

福建等值机

福建等值母线

温州方岩

兰亭

瓶窑

天一

北仑港

王店

乔司

秦山

秦山电厂

石牌

车坊

青浦 金山

石二厂

杨行

石二厂

黄渡

武南

江都

东善桥

肥西

繁昌

扬二厂

上河 盐城 泰兴 三官殿

任庄

三堡

东明

阳城

阳城电厂

平圩

洛河

颖州

平圩电厂

洛河电厂

南桥换流站

发电机或等值机

变压器

变电站或换流站交流母线

负荷

500kV交流线

500kV直流线

换流阀组

三峡右岸换流站

华中等值机

三峡左岸换流站

华中等值机

北仑港电厂

Model-Based Design

Power Grids, Automotive and Aerospace

Hardware in-the-loop Testing

Desktop Simulation

Coding

RCP with Virtual Plant

Validation and

Commissioning Test

REAL

SYSTEM

FACTS

HVDC

SVC

MMC

Wind farms

PVs, uGRID

Digital grid

models

have been

validated

over the last

25 years

Typical time step of 50

microseconds can easily

be achieved with

standard computers

Scaled-down Analog

Simulators where very

expensive and are now

replaced by digital

simulators

PLANT

Controller

PLANT

Home/content

Traditional Model-Based Design

For Fast Power Electronic controllers

Rapid Control Prototyping Hardware in-the-loop Testing

Desktop Simulation

Coding

Most power electronic systems

Are still designed with physical benches

• Fast

power

electronic systems are

difficult to simulate with

conventional processors

due to small time steps

• Lack of trust

• Prototypes for low-

power converters and

motors are not so

expensive to build

Home/content

Model-Based Design

Traditional Fast Power Electronic controller design

Problems:

• Risk of project delays

• The lab/dyno are not always available

• Actual motors not always available

soon enough

• Risk of damage

• Some tests are impractical to do

• Scaling – losses

• Scalability :

• Cost increases dramatically for high-

power and complex systems

• Security and operational problems

Advantages

• Trust: look like real systems

• Close to reality

• Easier to make demonstrations and papers

• Physical / no equation

Hardware in-the-loop Testing

Rapid Control Prototyping

Home/content

Modern Model-Based Design – More desktop … less lab test

HIL Testing

Full Validation Test

RCP with analog plant

RCP with Virtual Plant

Validation

Validation

High-fidelity validated real-time

plant models Enable better design

and test coverage at engineer desk

Laboratory tests could be used

more for validation

and final acceptance tests

Home/content

Advancements to increase accuracy

of fast power electronic system real-time simulation

Decrease time step

• 7 us time step can now be achieved with

standard processors

• 200 to 800 nanoseconds can be achieved

with FPGAs

• Continuous improvement for processor

manufactures

• New processor technologies are being

developed

• Continuous improvement by national

labs, universities, utilities

manufacturers and simulation tools

suppliers

Better scalability

• Multicore processors

• Multi FPGA systems

• Fast communication links

Better Solvers

• ARTEMIS Order-5 solver

• SSN to eliminate artificial delays

• Time-stamping or firing pulses and

real-time interpolation

Better models

• Finite-element based motor models

(JMAG, Infolytica and Maxwell)

• Transformer saturations with hysteresis

Hardware

Math

DC Bus Circuit Model included FPGA-Based HILS

• The DC bus in front of the inverter is included in the FPGA model

• The DC bus circuit includes:

– Inductance, and

– Capacitance

– etc

JMAG Users Conference

2011

9

Motor

RT-LAB

eDRIVEsim Motor HIL Simulator

Finite Element-based Motor Model

22

November

2013

IPST 2009, Kyoto - Japan 10

Stator Outer

Diameter [mm]

112

Rotor Outer

Diameter [mm]

55

Poles 4

Slots 24 Cross-section of IPM machine

In many cases,

motor current and torque distortion

caused by saturation effects and rotor

construction cannot be neglected.

Finite Element-based models enable

simulation of these distortions.

HIL System with the capability to execute

these models in Real-Time enables testing of

control algorithms designed to cancel these

effects

JMAG-3: PMSM Model: Comparison of FEM, JMAG-RT & dq Ideal Models

Courtesy of Japan Research

Institute, Limited

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.00 0.02 0.04 0.06 0.08 0.10

Time[s]

Torq

ue[N

m]

JMAG-RT

FEA (JMAG)

Ld, Lq

22 November

2013

11 IPST 2009, Kyoto -

Japan

12

Bost and PV Converters

Vgrid

A

B

C

a

b

c

Three-Phase Breaker

A

B

C

A

B

C

Resistance: RiInductance: Li

A

B

C

A

B

C

Three-PhaseSeries RL

Resistance: RiInductance: Li

A

B

C

A

B

C

Three-PhaseResistance

Resistance: Rgrid

A

B

C

A

B

C

Three-PhaseParallel RL

Inductance : LgridResistance : Rdamp_Lgrid

A

B

C

A

B

C

Three-PhaseInductance

Inductance: La

Capacitance:DClink_CResistance:DClink_R

+

-

PV Subsystem

DeltaCapacitance : Cf

g

A

B

C

+

-

g

A

B

C

+

-

2-level IGBT/Diode

CPU :

40us FPGA 590ns CPU :

Ts = 40us

PVs and Grids

Zig Zag Converter

(click on circuits for details)

CPU

Ts = 25us

FPGA 590ns

FPGA 170 ns

VIRTEX 6 FPGA

eHS Nodal Solver

13

High-Power Converters (click on circuits for details)

High-speed diode rectifier

Matrix Converter 3-Level NPC Converter and FEA PMSM Motor

590 nanos

on VIRTEX 6 590 nanos

on VIRTEX 6

335 nanos

170 nanos

What is real-time simulation and HIL Type of simulation tools vs circuit plications Challenges and solutions - transmission system Additional challenges for distribution and micro-grids

Opal-RT Technologies Challenges and Solutions for Real-Time Simulation of Intelligent Power Systems

Outline

22 November 2013 14

Home/content

OP4500 – High-Performance Architecture

The power electronic market required the highest performance simulators and RCP systems

but at the lowest cost

Home/content

OP4500 – 4-CPU High-Performance Architecture – Multi-rate

≈ 2 μs

Analog Outputs Digital Inputs

FPGA

CPU

Actual Controller Hardware Or Prototype Controller

Firing Pulses

Re

al-T

ime

Sim

ula

tor

0.25 μs model step

10 μs to 100 μs model step

≈ 20-30 μs

Complex grid and mechanical models and controllers

communication systems

Very Low Latency IO Interface

Small time step For fast Power

Electronic

Larger time step

For grid and mechanical subsystems

OP4500 – 4-CPU HIL Systems

OP4500 RCP Prototype Controler

FPGA/Multicore CPU Architecture for HIL and RCP Systems

IO Interface

4 Intel CPU & KINTEX-7

Home/content

OP5600– 12-CPU High-Performance Architecture – Multi-rate

≈ 2 μs

Analog Outputs Digital Inputs

FPGA

CPU

Actual Controller Hardware Or Prototype Controller

Firing Pulses

Re

al-T

ime

Sim

ula

tor

0.25 μs model step

10 μs to 100 μs model step

≈ 20-30 μs

Complex grid and mechanical models and controllers

communication systems

Very Low Latency IO Interface

Small time step For fast Power

Electronic

Larger time step

For grid and mechanical subsystems

OP5600 – 12-CPU HIL Systems

OP4500 RCP Prototype Controller

FPGA/Multicore CPU Architecture for HIL and RCP Systems

IO Interface

SPARTAN 3, VIRTEX 6, VIRTEX 7

4 Intel CPU KINTEX 7

OPAL-RT RCP and HIL Real-Time Simulator Hardware PLateforms

OP7000

OP5600

OP7020

OP4500

OPAL-RT Real-Time Simulator Main Specifications

Simulator OP4500 OP5600 OP5607

OP7000 OP7020

Size (19’’) 2U (89 mm) 4U (178 mm) 6U (267 mm) 2U (89 mm)

Type Compact entry-level

system with CPU, FPGA and I/O

High-end system with CPUs, FPGA, I/Os and

monitoring panel

High-end system with FPGAs, I/Os and

monitoring panel

FPGA-based simulator with 16 SFP optical

fiber

Target PC 4 CPU cores 4 to 12 CPU cores External target computer

FPGA Kintex 7 325T Spartan 3

Virtex 6 (OP5600) Virtex 7 (OP5607)

Virtex 6

Virtex 7

FPGA count 1 1 Up to 4 1

Analog I/O count With conditioning

32

Up to 128 Up to 128 No analog I/O 16 SFP optical fiber

interfaces Digital I/O count 4/5V to 30V, opto

64 Up to 256 Up to 256

Home/content

Distributed Multi-User Power Electronic Lab

OP4500

OP4500 EXT CNTR

EXT CNTR

Bench 1

Bench 2

Bench 3

Bench 4

Bench 5 5-Gbits optical fiber pair

4 INTEL CPU Cores and One KINTEX-7 325T per OP4500 unit

OP5607 (VIRTEX 7)

Standard PCs 12, 24 cores or 32 cores)

PCI Express 4x

Several projects can be perfomed simultaneously

All simulators can be interconnected for large projects

Bench 6

OP4500

OP4500

OP4500

OP4500

OP4500

21

MMC Simulator

Large Integrated Simulators

Can manage 3000 standard I/O chanels within 25 microseconds Can simulate 1500 MMC cells with detail models withing 500 nanoseconds (Virtex 7)

Large Integration Virtual Test Benches

Applications vs. Simulator Performance Requirements

20 KHz 50 us

40 kHz 25 us

20

Nu

mb

er o

f C

PU

Slow Dynamics

Medium to Fast Dynamics & Transients Very Fast Transients Ultra- fast Transients

100

100 kHz 10 us

1 MHz 1us

250 kHz 5 us

10 MHz 100 ns

10 kHz 100 us

1 kHz 1 ms

100 Hz 10ms

8

4 Power Electronic and Mechatronic Systems Mechatronics

Power Grids

Very fast

and low-latency

power electronics

Ship, Trains, Industries

2 Automobiles

Space

1

Model Sampling Rate and Time Step Requirement (when OPAL-RT interpolation algorithm is used)

22 November 2013 22

Large Integration Virtual Test Benches

Applications vs. Simulator Performance Requirements

20 KHz 50 us

40 kHz 25 us

20

Nu

mb

er o

f C

PU

Slow Dynamics

Medium to Fast Dynamics & Transients Very Fast Transients Ultra- fast Transients

100

100 kHz 10 us

1 MHz 1us

250 kHz 5 us

10 MHz 100 ns

10 kHz 100 us

1 kHz 1 ms

100 Hz 10ms

Large Power Grids, HVDC, FACTS

Smart Grids, distributed Generation, Renewable Energy

<Multi-domain Real-Time Simulation>

斗山

葛洲坝换流站

华中等值机

练塘换流站

图2.仿真等值系统

福建等值机

福建等值母线

温州方岩

兰亭

瓶窑

天一

北仑港

王店

乔司

秦山

秦山电厂

石牌

车坊

青浦 金山

石二厂

杨行

石二厂

黄渡

武南

江都

东善桥

肥西

繁昌

扬二厂

上河 盐城 泰兴 三官殿

任庄

三堡

东明

阳城

阳城电厂

平圩

洛河

颖州

平圩电厂

洛河电厂

南桥换流站

发电机或等值机

变压器

变电站或换流站交流母线

负荷

500kV交流线

500kV直流线

换流阀组

三峡右岸换流站

华中等值机

三峡左岸换流站

华中等值机

北仑港电厂

Large Integration

Virtual Test Benches

8

4 Power Electronic and Mechatronic Systems Mechatronics

Power Grids

Very fast

and low-latency

power electronics

Ship, Trains, Industries

2 Automobiles

Space

1

Model Sampling Rate and Time Step Requirement (when OPAL-RT interpolation algorithm is used)

22 November 2013 23

ePowerGRIDsim Product Family Overview N

um

be

r o

f N

od

es

20

100

1000

10,000

100,000

20,000

500

Speed/Period of Phenomena

1s 10ms 50us 20us 100ns 20ns 1us

Electromagnetic Transient (EMT) Simulation for system and equipment design, control and protection system HIL testing

eMEGAsim EMT 7 to 100 us time step

250 3-ph busses, 12 CPU, 50 us) SIMULINK/SPS/ARTEMIS

Parallel State-Space solver

10

Power Electronic Simulation on FPGA

eHS Nodal Solver 100 ns to 1 us time step

10 ns resolution 50 nodes/FPGA

I/O Management

eFPGAsim

Hypersim – EMT 25 to 100 us time step

2500 3-ph busses, 120 cpu, 50 us) Parallel Nodal solver

ePowerGRIDsim Product Family Overview N

um

be

r o

f N

od

es

20

100

1000

10,000

100,000

20,000

500

Speed/Period of Phenomena

1s 10ms 50us 20us 100ns 20ns 1us

Electromagnetic Transient (EMT) Simulation System and equipment design, control and protection system HIL testing

eMEGAsim EMT 7 to 100 us time step

250 3-ph busses, 12 CPU, 50 us) SIMULINK/SPS/ARTEMIS

Parallel State-Space solver

10

Power Electronic Simulation on FPGA

eHS Nodal Solver 100 ns to 1 us

time step 10 ns resolution 50 nodes/FPGA

I/O Management

eFPGAsim

22 November 2013 25

Hypersim – EMT 25 to 100 us time step

2500 3-ph busses, 120 cpu, 50 us) Parallel Nodal solver

ePowerGRID Simulator Product Family N

um

be

r o

f N

od

es

20

100

1000

10,000

100,000

20,000

500

Speed/Period of Phenomena

1s 10ms 50us 20us 100ns 20ns 1us

Electromagnetic Transient (EMT) Simulation System and equipment design, control and protection system HIL testing

eMEGAsim EMT 7 to 100 us time step

250 3-ph busses, 12 CPU, 50 us) SIMULINK/SPS/ARTEMIS

Parallel State-Space solver

10

Power Electronic Simulation on FPGA

eHS Nodal Solver 100 ns to 1 us

time step 10 ns resolution 50 nodes/FPGA

I/O Management

eFPGAsim

Phasor (rms) or fundamental frequency simulation for analysis of electromechanical oscillations and slow phenomena

ePHASORsim 10 t0 20 ms

time step

22 November 2013 26

Hypersim – EMT 25 to 100 us time step

2500 3-ph busses, 120 cpu, 50 us) Parallel Nodal solver

ePowerGRID and eDRIVEsim Simulator Product Family N

um

be

r o

f N

od

es

20

100

1000

10,000

100,000

20,000

500

Speed/Period of Phenomena

1s 10ms 50us 20us 100ns 20ns 1us

Electromagnetic Transient (EMT) Simulation System and equipment design, control and protection system HIL testing

eMEGAsim EMT 7 to 100 us time step

250 3-ph busses, 12 CPU, 50 us) SIMULINK/SPS/ARTEMIS

Parallel State-Space solver

10

Power Electronic Simulation on FPGA

eHS Nodal Solver 100 ns to 1 us

time step 10 ns resolution 50 nodes/FPGA

I/O Management

eFPGAsim

Phasor (rms) or fundamental frequency simulation for analysis of electromechanical oscillations and slow phenomena

ePHASORsim 10 t0 20 ms

time step

22 November 2013 27

eDRIVEsim EMT 7 to 100 us time step

VSC, Multi-Drive, AC Fed Drives

OPAL-RT Real-Time HIL Simulators for All Applications

Algorithms

Physical models Power systems

Stateflow charts

Code

Real-Time Computer

OPAL-RT Real-Time HIL Simulators for All Applications

Conclusions • RCP and HIL with Virtual Plants are standard in automotive, aerospace and

power grids

• But using HIL with virtual plants for fast power electronic systems is not yet standard; analog benches are still in use

• simulation speed and accuracy must be increased

• Simulation on FPGA chips is one very effective solution to reach time step as low as 200 nanoseconds

• But FPGA-based simulator • must be combined with powerful multi-domain simulation tools to

simulate slower subsystems on standard CPUs • Must include easy-to-use graphical interfaces to eliminate complex FPGA

programming

• OPAL-RT objective is to provide complete and high-performance solutions