MICROPROCESSORS AND - · PDF file2.2 Computer and its Organization 17 ... Intel 8085...
Transcript of MICROPROCESSORS AND - · PDF file2.2 Computer and its Organization 17 ... Intel 8085...
MICROPROCESSORS ANDMICROCONTROLLERS
Architecture, Programming and System Design8085, 8086, 8051, 8096
SECOND EDITION
Krishna KantDean (Academic)
Jaypee Institute of Information TechnologyNoida
Delhi-1100922014
MICROPROCESSORS AND MICROCONTROLLERSArchitecture, Programming and System Design 8085, 8086, 8051, 8096, Second EditionKrishna Kant
© 2014 by PHI Learning Private Limited, Delhi. All rights reserved. No part of this book maybe reproduced in any form, by mimeograph or any other means, without permission in writing fromthe publisher.
ISBN-978-81-203-4853-0
The export rights of this book are vested solely with the publisher.
Thirteenth Printing (Second Edition) … … January, 2014
Published by Asoke K. Ghosh, PHI Learning Private Limited, Rimjhim House, 111, PatparganjIndustrial Estate, Delhi-110092 and Printed by Rajkamal Electric Press, Plot No. 2, Phase IV,HSIDC, Kundli-131028, Sonepat, Haryana.
To
Solid Pillars of My LifeWife Dr. Madhu Chhanda
Our Son Prashant Rishiand Our Daughter Neha Shikha
CONTENTS
Preface xvii
Preface to the First Edition xix
Acknowledgements xxiii
1. System Design Using Microprocessor 1–161.1 Introduction 11.2 System Design 2
1.2.1 Feasibility Study 21.2.2 Random Logic vs. Microprocessor 31.2.3 System Specification 51.2.4 Initial Design 61.2.5 Hardware Design 61.2.6 Software Design 61.2.7 Test and Debug 111.2.8 Integration 111.2.9 Documentation 11
1.3 Development Tools 111.3.1 Microcomputer Kit 121.3.2 Dedicated Microprocessor Development System 121.3.3 Universal Microprocessor Development System 151.3.4 Simulators 15
1.4 Conclusion 15
Exercises 16Further Reading 16
2. What a Microprocessor Is 17–742.1 Introduction 172.2 Computer and its Organization 17
2.2.1 Input System 182.2.2 Output System 18
v
vi Contents
2.2.3 Arithmetic and Logic Unit (ALU) 182.2.4 Memory 192.2.5 Control System 202.2.6 Instruction Execution 212.2.7 Clock 222.2.8 Instruction Format 222.2.9 Addressing Modes 232.2.10 Instruction Set 27
2.3 Programming System 292.3.1 Machine Language Program 292.3.2 Assembly Language Program 312.3.3 Assembler Directives 312.3.4 Compilers 332.3.5 Operating Systems 34
2.4 What is Microprocessor? 342.5 Address Bus, Data Bus, and Control Bus 352.6 Tristate Bus 362.7 Clock Generation 372.8 Connecting Microprocessor to I/O Devices 38
2.8.1 I/O Mapped I/O Interface 382.8.2 Memory Mapped I/O Interface 39
2.9 Data Transfer Schemes 402.9.1 Parallel Data Transfer 412.9.2 Serial Data Transfer 44
2.10 Architectural Advancements of Microprocessors 452.10.1 Pipelining 452.10.2 Cache Memory 472.10.3 Memory Management 502.10.4 Virtual Memory System 51
2.11 Evolution of Microprocessors 542.11.1 8-Bit Microprocessors 552.11.2 16-Bit Microprocessors 572.11.3 32-Bit Microprocessors 612.11.4 Bit-slice Processor 652.11.5 The Transputer 652.11.6 Microcomputers and Microcontrollers 66
2.12 Conclusion 73
Exercises 73Further Reading 74
3. Intel 8085 Microprocessor—Hardware Architecture 75–983.1 Introduction 753.2 Hardware Architecture 75
3.2.1 The 8085 Clock 753.2.2 Programmable Registers 773.2.3 Address and Data Buses 783.2.4 Memory Interfacing 79
Contents vii
3.2.5 Interrupt System 823.2.6 Direct Memory Access 853.2.7 Serial Input–Output 853.2.8 The 8085 Activity Status Information 853.2.9 The 8085 Reset 86
3.3 The 8085 Pin Out 863.3.1 The 8085 Signals 87
3.4 Instruction Execution 893.5 Direct Memory Access Timing Diagram 933.6 External Interrupts Timing Diagram 953.7 Conclusion 96
Exercises 97Further Reading 98
4. Intel 8085 Microprocessor—Instruction Set andProgramming 99–1284.1 Introduction 994.2 Program Status Word 1004.3 Operand Types 1014.4 Instructions Format 1014.5 Addressing Modes 1014.6 Instruction Set 104
4.6.1 Symbols and Abbreviations 1044.6.2 Data Transfer Instructions 105
Exercises 1074.6.3 Arithmetic Instructions 108
Exercises 1124.6.4 Logical Instructions 112
Exercises 1174.6.5 Branch Instructions 117
Exercises 1224.6.6 Stack I/O and Machine Control Instructions 123
4.7 Conclusion 126
Exercises 127Further Reading 128
5. Intel 8086—Hardware Architecture 129–1985.1 Introduction 1295.2 Architecture 130
5.2.1 Bus Interface Unit (BIU) 1315.2.2 Execution Unit 131
5.3 Pin Description 1405.4 External Memory Addressing 146
viii Contents
5.5 Bus Cycles 1505.5.1 Memory or I/O Read for Minimum Mode 1505.5.2 Memory or I/O Write for Minimum Mode 152
5.6 Some Important Companion Chips 1545.6.1 Clock Generator Intel 8284A 1545.6.2 Bus Demultiplexing and Latch Chip (8282, 74LS373) 1595.6.3 Bidirectional Transceivers (8286, 74LS245) 1625.6.4 Bus Controller Intel 8288 163
5.7 Maximum Mode Bus Cycle 1655.7.1 Memory Read Bus Cycle 1655.7.2 Memory Write Bus Cycle 166
5.8 Intel 8086 System Configurations 1685.9 Memory Interfacing 1705.10 Minimum Mode System Configuration 1835.11 Maximum Mode System Configuration 1835.12 Interrupt Processing 183
5.12.1 Software Interrupts 1875.12.2 Single Step Interrupt 1885.12.3 Non-Maskable Interrupt 1895.12.4 Maskable Interrupt 1905.12.5 Interrupt Priorities 191
5.13 Direct Memory Access 1915.14 Halt State 1945.15 Wait for Test State 1955.16 Comparison between the 8086 and the 8088 1955.17 Compatibility between the 8088, the 8086, the 80186 and
the 80286 Processors 1965.18 Conclusion 196
Exercises 196Further Reading 198
6. Intel 8086 Microprocessor—Instruction Set andProgramming 199–2966.1 Introduction 1996.2 Programmer’s Model of Intel 8086 1996.3 Operand Types 2016.4 Operand Addressing 202
6.4.1 Register Addressing Mode 2036.4.2 Immediate Addressing Mode 2036.4.3 Direct Memory Addressing Mode 2036.4.4 Register Indirect Addressing Mode 2056.4.5 Base Plus Index Register Addressing Mode 2076.4.6 Register Relative Addressing Mode 2096.4.7 Base Plus Index Register Relative Addressing Mode 2116.4.8 String Addressing Mode 2146.4.9 Stack Addressing Mode 215
Contents ix
6.5 The 8086 Assembler Directives 2176.5.1 Directives for Constant and Variable Definition 2186.5.2 Program Location Control Directives 2196.5.3 Segment Declaration Directives 2206.5.4 Procedure and Macro-related Directives 2216.5.5 Other Directives 222
6.6 Assembly Program Format 2236.6.1 Full Segment Version 2246.6.2 Model Version 225
6.7 DOS Function Calls 2266.8 Instruction Set 2286.9 Data Transfer Group 229Exercises 2406.10 Arithmetic Group 241Exercises 2536.11 Logical Group 253Exercises 2636.12 Control Transfer Group 264
6.12.1 Unconditional Branch 2646.12.2 Conditional Branch 270
Exercises 2816.13 Miscellaneous Instruction Groups 2826.14 Modular Programming 2846.15 Macro Programming 288
6.15.1 Difference between Procedure and Macro 2896.15.2 Functioning of Macro 2906.15.3 Macro with Local Label 292
6.16 Delay by Software 2936.17 Conclusion 295
Exercises 295Further Reading 296
7. Microprocessor—Peripheral Interfacing 297–4287.1 Introduction 2977.2 Generation of I/O Ports 298Exercises 3017.3 Programmable Peripheral Interface (PPI)–—Intel 8255 301
7.3.1 Mode 0—Basic Input/Output 3027.3.2 Mode 1—Strobed Input/Output 3027.3.3 Mode 2—Strobed Bidirectional Bus 3037.3.4 Configuring the 8255 3037.3.5 Interfacing the 8255 304
Exercises 3117.4 Sample-and-Hold Circuit and Multiplexer 311Exercises 316
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