Microprocessor System Design Programmable Interrupt Controller.

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Microprocessor System Design Programmable Interrupt Controller

description

What is Interrupt

Transcript of Microprocessor System Design Programmable Interrupt Controller.

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Microprocessor System DesignProgrammable Interrupt Controller

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Outline

• Interrupts in PC

• Interrupts and calls

• 8259 – PIC

• Programming 8259

• Interfacing 8259 in PC

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What is Interrupt

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8086/88 Interrupts

• 256 Interrupts.

• Types 00 ……. FF.

• Type is provided in a specified timing.

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Interrupt Vector Table

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Answering an Interrupt

• Save status– FR, IP, CS

• Service the interrupt– Interrupt service routing (ISR) or Interrupt handler– Based on Interrupt vector number– From Interrupt vector table– Four bytes for every interrupt: CS:IP

• Return to original position by IRET

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Difference with Call

1. CALL FAR can jump to any location (1M range)

2. Hardware interrupts can come at any time.3. Interrupts are maskable.4. After CALL only CS:IP is saved5. End of routine: RETF vs. IRET.

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Interrupt Categories

• Hardware interrupts:– Only 3 pin, but how 256 interrupt?– INTR (in), NMI (in), and INTA (out)– INTR can be masked by CLI / STI– Active high.

» 80x86 finished instruction.» Push FR, CS, IP

– NMI: INT 02.• Software interrupts

– INT nn– Example: INT 21H (DOS functions)

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Interrupt and Flags

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Predefined Interrupts

• INT 00 (divide error)• INT 01 (single step)

– Set Trap flag (how?)– PUSHF, POP AX, …– Trace in debug

• INT 02 (NMI)• INT 03 (breakpoint)• INT 04 (signed number overflow)

– INT) instruction» Examine Interrupt vector table.» Examine INT 12H (size of conventional RAM in AX)

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8259

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Control Word (initialization)

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ICW1, ICW2

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ICW3, ICW4

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Example

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Masking and Prioritization

• OCW (operation command word)

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Programming OCWs

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OCW3

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8259 in PC XT

ICW1: 13HICW2: 08HICW3: 09H

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Interrupt Sources in PC

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Sources of NMI

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8259s in AT

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IRQ9 Instead of IRQ2

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Interrupts (Summary)

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Edge Triggered and Interrupt Sharing

• Level triggered mode: IRQ line should be brought down before EOI.

• Edge triggered mode: noise on IRQ lines might cause false interrupts.

• New computer and busses.– Level triggered.– Interrupt sharing.