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Microelectronics Devices

Yao-Joe Yang

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Outline

• Basic semiconductor physics• Semiconductor devices

– Resistors– Capacitors– P-N diodes– BJT/MOSFET

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Type of Solid Materials

• Solid materials may be classified as follows:– Amorphous

• no ordered atomic arrangement– Polycrystalline

• short range atomic order usually in small crystalline grains (10 Å - few µm)

– Crystalline• long range, ordered, atomic arrangement, repeating unit cell

• All important semiconductor devices are based on crystalline materials (Si especially) because of their reproducible and predictable electrical properties

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Amorphous Structure

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Polycrystalline Structure

Grain

Grain Boundary

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Single Crystal Structure

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What Are Semiconductors?

• Group IV and Group III-V compounds– Silicon(Si), Germanium(Ge), Gallium arsenide (GaAs)– Covalent bond, no free electrons– their energy gaps (~ 1 eV) are not too high

• free electrons are generated under light and thermal agitation

– after electrons escape, “holes” are formed and can be treated as “positive” electrons

– these electrons and holes provides certain electrical conductivity

– the conductivity becomes higher as temperature increases

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Terminology

• Intrinsic semiconductor: undoped semiconductor– electrical properties are native to the material

• extrinsic semiconductor: doped semiconductor– electrical properties controlled by the added impurity

• donor– impurity atom that increases the electron concentration– group V

• acceptor– impurity atom that increases the hole concentration – group III

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Terminology

• n-type material:– semiconductor containing more electrons than holes in thermal

equilibrium

• p-type material:– semiconductor containing more holes than electrons in thermal

equilibrium

• majority carrier:– in n-type material: electrons– in p-type material: holes

• minority carrier:– in n-type material: holes– in p-type material: electrons

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Intrinsic Silicon

• Perfect covalent bond• Some bonds will be free at temperature T, create

free electrons and holes• concentration of free electrons/hole is a function

of temperature

• law of mass action

3/605.02/316109.3 −−×= cmeTn kTeVi

2innp =

310105.1)300( −×= cmKni

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Properties of Crystalline Silicon

• Crystal structure:– diamond or double FCC– 5 × 1022 cm-3 (density = 2.33)

• Cubic structure– 3 material constants– E: 132 - 188 Gpa– ν: 0.07 - 0.28

• Energy gap: 1.1 eV – valance band to conduction band– Dielectric constant: 11.7

• Resistivity of pure silicon at RT = 2.3×105 Ω.cm

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Crystalline Silicon

• Other mechanical properties– expansion coefficient 2.6µm/mK– melting point 1412 °C– fracture toughness ~ 1MPa√m– brittle-ductile transition point ~ 550 °C

• Strength strongly depends on surface quality• Poly silicon has similar elastic constant and mechanical

properties as crystalline silicon. However, residual strength, toughness, and electrical properties are quite different

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Extrinsic Semiconductors

• In all important electronic devices, dopant are purposely added to control the electronic properties

• n-type semiconductor– add phosphorus or arsenic to provide excess electron

carriers

• p-type semiconductor– add boron, gallium, or indium into silicon to provide

additional vacancies or holes

• The mass-action law is still valid 2innp =

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Doping

• All semiconductor devices are fabricated LOCALLY introducing controlled number of n- and p-type dopant

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Semiconductor Conductivity

• The conductivity((Ω.cm)-1) is determined by the mobility and concentration of both electrons and holes

• where µ is the mobility, for silicon– µn = 1350 cm2/V.s– µp = 480 cm2/V.s– q = 1.609 ×10-19 C– temperature decreases, conductivity increases

pqnq pn µ+µ=σ

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Resistivity Vs. Doping Concentration

• Resistivity = 1/conductivity

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Semiconductor Device Overview

• VLSI are consisted by many transistors, capacitors, diodes, and resistors. However, the transistor fabrication can cover the other three

• One need to know the basic definition, working principle, and fabrication routes for these basic elements

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Resistors

• A resistor can be defined as a device in which the applied electric potential and measured current exhibit a certain relationship, i.e., V = f(I)

• For linear device, we have V = RI, where R is called the resistance of the resistor

• Consider a resistor with length L and cross-sectional dimension W and d, R can be expressed as

WL

dWdLR ρ

=ρ=L

Wd

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Diodes

• A diode is a device made of p-n junction • Can be used for rectification• Mathematical model of diodes at forward bias

– η~ 2 for silicon

11600

)1( /

TV

eII

T

VVSD

TD

=

−= η

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p-n Junction

• Forward bias– reduce the junction barrier and eliminate the depletion zone

• Reverse bias– enhance the junction barrier and increase the depletion zone

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Capacitors

• Capacitor is a device in which the charge and electric potential can be defined, i.e., V = f(Q).

• In linear element, we can express the above relationship as Q=CV. Where C is the capacitance of the capacitor.

• For parallel plate, – C = εA/d. – Where ε is the dielectric constant of dielectric, A is the

overlapped area and d is the separation of two parallel plates.

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Transistors

• Transistors are widely used for switching and amplification – replace vacuum tubes

• Two major transistors– Bipolar Junction Transistor (BJT)

• collector, emitter, base• current controlled

– Field Effect Transistor (FET)• source, drain, gate• voltage controlled

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Bipolar Junction Transistors (BJT)

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Field Effect Transistors (FET)

• FET is the most popular transistor at this moment

• incorporate with MOS process

• Can be divided into two catalog– MOSFET

• depletion• enhancement

– JFET

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Symbols of FET

• FETs are unipolar devices• for switch operation, usually we use NMOS or CMOS

technology to further reduce power consumption and increase the device density

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CMOS IC

p-Si USGn-SiBalk Si

Polysilicon

STI

n+ Source/Drain p+ Source/DrainGate Oxide

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FSG

Metal 4 Copper

Passivation 1, USGPassivation 2, nitride

Lead-tin alloy bump

FSG

CopperMetal 2

FSG

FSG

CopperMetal 3

FSG

P-epiP-wafer

N-wellP-welln+STI p+ p+USGn+

PSG TungstenFSG

Cu Cu

Tantalum barrier layer

Nitride etch stop layer

Nitride seal layer

M 1

Tungsten local Interconnection

Tungsten plug

PMD nitride barrier layer

T/TiN barrier & adhesion layer

Tantalum barrier layer

CMOS Chip with 4 Metal Layers

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From Basic Elements to a IC Chips

• Analog– basic devices (transistors, resistors…) to OPAMP– OPAMP to analog circuit– The designer may start from basic devices

• Digital– basic devices to basic logic elements, e.g., NAND gate– from basic logic element to logic devices, e.g., Flip-

Flop– from logic device to logic circuit

• e.g., register, memory, adder, ….

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Fab Cost

• Fab cost is very high, > $1B for 8” fab• Clean room• Equipment, usually > $1M per tool• Materials, high purity, ultra high purity• Facilities• People, training and pay

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Wafer Yield

total

goodW Wafers

WafersY =

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Die Yield

total

goodD Dies

DiesY =

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Packaging Yield

total

goodC Chips

ChipsY =

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Overall Yield

YT = YW×YD×YC

Overall Yield determines whether a fab is making profit or losing money