Microelectronic Circuits

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Microelectronic Circuits Slide 1 Microelectronic Circuits Instructor: Prof. Kwan-ho You http://optima.skku.ac.kr/courses.htm E-mail: [email protected] Textbook: “Microelectronic Circuits” Author: Sedra & Smith Press: Oxford press, 5th edition SungKyunKwan University

Transcript of Microelectronic Circuits

Page 1: Microelectronic Circuits

Microelectronic Circuits Slide 1'

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Microelectronic Circuits

• Instructor: Prof. Kwan-ho You

• http://optima.skku.ac.kr/courses.htm

• E-mail: [email protected]

• Textbook: “Microelectronic Circuits”

• Author: Sedra & Smith

• Press: Oxford press, 5th edition

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Overview Slide 2'

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Overview

• List of chapters to be covered in this semester.

1. Chapter 6: Single-Stage Integrated Circuit Amp.

2. Chapter 7: Differential & Multistage Amp.

3. Chapter 8: Feedback

4. Chapter 9: OP-Amp & Data-Converter Circuits.

5. Chapter 10: Digital CMOS Logic Circuits

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Ch.6 Single-Stage Integrated Circuit Amp.

6.2 Comparison of the MOSFET & BJT

♣ Table 6.3 on page 550, 551.

6.3 IC Biasing

• Current sources, current mirrors, & current steeringcircuits will be covered.

• Biasing in IC design is based on the use ofconstant-current sources.

• On an IC chip with a number of amp stages, a constantdc current (=reference current) is generated at onelocation and is then replicated at various otherlocations for biasing the various amp stages through aprocess known as current steering.

⊙ 6.3.1 Basic MOSFET Current Source

• The circuit of a simple MOS constant-current source.♣ Fig. 6.4 on page 563.

• The drain of Q1 is shorted to its gate, thereby forcing itto operate in the saturation mode with

ID1 =12k′

n

(W

L

)1

(VGS − Vtn)2

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ID1 = IREF =VDD − VGS

R

• The output current IO of the current source will be

IO = ID2 =12k′

n

(W

L

)2

(VGS − Vtn)2

IO

IREF=

(W/L)2(W/L)1

• Effect of VO on IO

• To ensure that Q2 is saturated,

VO ≥ VGS − Vt

♣ Fig. 6.6 on page 564.

• The output resistance Ro,

Ro ≡ ∆VO

∆IO= ro2 =

VA2

IO

VA2 is the Early voltage of Q2.

⊙ 6.3.2 MOS Current-Steering Circuits

• Current mirrors can be used to implement thecurrent-steering function.

• A simple current-steering circuit.♣ Fig. 6.7 on page 566.

• Transistors Q1, Q2, and Q3 form a two-output current

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mirror.

I2 = IREF(W/L)2(W/L)1

I3 = IREF(W/L)3(W/L)1

• To ensure operation in the saturation region,

VD2, VD3 ≥ −VSS + VGS1 − Vtn

• Current I3 is fed to the input side of a current mirrorformed by PMOS transistors Q4 and Q5.

I5 = I4(W/L)5(W/L)4

where I4=I3. To keep Q5 in saturation,

VD5 ≤ VDD − |VOV 5|

⊙ 6.3.3 BJT Circuits

• The basic BJT current mirror.♣ Fig. 6.8 on page 567.

• Two important differences from MOS mirror.

• (1) the nonzero base current of BJT causes an error inthe current transfer ratio of the bipolar mirror. (2) thecurrent transfer ratio is determined by the relativeareas of the emitter-base junctions of Q1 and Q2.

• Let us first consider the case when β is suffciently high

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so that we can neglect the base current.

IO = IREF

• To obtain a current transfer ratio other than unity, saym, the area of the EBJ of Q2 is m times that of Q1.

IO = mIREF

• The current transfer ratio is

IO

IREF=

IS2

IS1=

Area of EBJ of Q2

Area of EBJ of Q1

• Next we consider the effect of finite transistor β on thecurrent transfer ratio.♣ Fig. 6.9 on page 568.

IREF = IC + 2IC/β = IC

(1 +

)IO

IREF=

IC

IC

(1 + 2

β

) =1

1 + 2β

• BJT mirror has a finite output resistance Ro,

Ro ≡ ∆VO

∆IO= ro2 =

VA2

IO

where VA2 and ro2 are the Early voltage and the outputresistance of Q2.

• A Simple Current Source

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♣ Fig. 6.10 on page 569.

IREF =VCC − VBE

R

IO =IREF

1 + (2/β)

(1 +

VO − VBE

VA

)• Output resistance of this current source is ro of A2

Ro = r02 ≈ VA

IO≈ VA

IREF

• Current Steering♣ Fig. 6.11 on page 570.

• Q3 will supply a constant current I equal to IREF .

• Two transistors, Q5 and Q6 are connected in parallel,and the combination forms a mirror with Q1. ThusI3 = 2IREF .

• Constant current I2 equals to IREF .

• Finally, to generate a current three times IREF , threetransistors, Q7, Q8 and Q9, each of which is matched toQ2, are connected in parallel.

6.4 High-Frequency Response

• The general form of the frequency response.♣ Fig. 6.12 on page 572.

• The gain remains constant at its midband value AM

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down to zero frequency (dc).

• The gain falls off at the high-frequency end due to theinternal capacitances of the transistor.

⊙ 6.4.1 High-Frequency Gain Function

• The amp. gain, taking into account the internaltransistor capacitances, can be expressed as

A(s) = AMFH(s)

FH(s) =(1 + s/ωZ1)(1 + s/ωZ2) · · · (1 + s/ωZn)(1 + s/ωP1)(1 + s/ωP2) · · · (1 + s/ωPn)

⊙ 6.4.2 Determining the 3-dB Frequency fH

• ωP1 is of much lower frequency than any of the otherpoles, then this pole will have the greatest effect on thevalue of the amplifier ωH .

• The amp. is said to have a dominant-pole frequency.

FH(s) ≈ 11 + s/ωP1

Then the determination of ωH is greatly simplified:

ωH ≈ ωP1

• A dominant pole exists if the lowest-frequency pole is atleast two octaves (a factor of 4) away from the nearestpole or zero.

• If a dominant pole does not exist, the 3-dB frequency

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ωH can be determined from a plot of |FH(jω)|.

FH(s) =(1 + s/ωZ1)(1 + s/ωZ2)(1 + s/ωP1)(1 + s/ωP2)

• By definition, at ω = ωH , |FH |2 = 12 ;

ωH ≈ 1/

√1

ω2P1

+1

ω2P2

− 2ω2

Z1

− 2ω2

Z2

• This relationship can be extended to any number ofpoles and zeros as

ωH ≈ 1/

√(1

ω2P1

+1

ω2P2

· · ·)− 2

(1

ω2Z1

+1

ω2Z2

+ · · ·)

⊙ 6.4.3 Using Open-Circuit Time Constants for theApproximate Determination of fH

• If the poles and zeros of the amp. transfer function canbe determined easily, then we can determine fH usingthe techniques above.

• However, it is not a simple matter to determine thepoles and zeros by quick hand analysis.

• Consider the function FH(s)

FH(s) =1 + a1s + a2s

2 + · · · + ansn

1 + b1s + b2s2 + · · · + bnsn

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The coefficient b1 is given by

b1 =1

ωP1+

1ωP2

+ · · · + 1ωPn

• The value of b1 can be obtained by considering thevarious capacitances in the high-frequency equivalentcircuit one at a time while reducing all othercapacitances to zero.

• The value of b1 is computed by summing the individualtime constants, called open-circuit time constants,

b1 =n∑

i=1

CiRio

• If one of the poles, say P1, is dominant, the upper 3-dBfrequency will be approximately equal to ωP1,

ωH ≈ 1b1

=1∑

i CiRio

• EX. 6.6 Figure 6.14(a) shows the high-frequencyequivalent circuit of a common-source FET amplifier.♣ Fig. 6.14(a) on page 577.Capacitors Cgs and Cgd are the FET internalcapacitances. For Rsig = 100kΩ, Rin = 420kΩ,Cgd = Cgd = 1pF , gm = 4mA/V , and R′

L = 3.33kΩ.Find the midband voltage gain, AM = Vo/Vsig and theupper 3-dB frequency, fH .Sol. The midband voltage gain is determined by

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assuming that the capacitors in the MOSFET modelare perfect open circuits.

AM ≡ Vo

Vsig= − Rin

Rin + Rsig(gmR′

L)

= − 420420 + 100

× 4 × 3.33 = −10.8V/V

We shall determine ωH using the method ofopen-circuit time constants. The resistance Rgs seen byCgs is found by setting Cgd = 0 and short-circuiting thesignal generator Vsig

Rgs = Rin//R = 420kΩ//100kΩ = 80.8kΩ

The open-circuit time constant of Cgs is

τgs ≡ CgsRgs = 1 × 10−12 × 80.8 × 103 = 80.8ns

The resistance Rgd seen by Cgd=0 and short-circuitingVsig.We apply a test current Ix, writing a node equation atG gives.

Ix = − Vgs

Rin− Vgs

Rsig

Vgs = −IxR′

Where R′ = Rin//Rsig.

Ix = gmVgs +Vgs + Vx

R′L

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Rgd ≡ Vx

Ix= R′ + R′

L + gmR′LR′ = 1.16MΩ

Open-circuit time constant of Cgd is

τ ≡ CgdRgd

= 1 × 10−12 × 1.16 × 106 = 1160ns

Upper 3-dB frequency ωH can now be determined from

ωH ≈ 1τgs + τgd

≈ 1(80.8 + 1160) × 10−9

= 806 krad/s

fH =ωH

2π= 128.3kHz

• The method of open-circuit time constants has animportant advantage in that it tells the circuit designerwhich of the various capacitances is significant indetermining the amplifier frequency response.

⊙ 6.4.4 Miller’s Theorem♣ Fig. 6.15(a) on page 579.

• The voltage at node 2 is related to that at node 1 by

V2 = KV1

• Miller’s theorem states that impedance Z can bereplaced by two impedances: Z1 connected bw. node 1

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and ground and Z2 connected bw. node 2 and ground,

Z1 = Z/(1 − K)

Z2 = Z/

(1 − 1

K

)The proof of Miller’s theorem is

I1 =V1

Z1= I =

(V1 − KV1

Z

)I2 =

0 − V2

Z2=

0 − KV1

Z2= I =

V1 − KV1

Z

• Ex. 6.7 An ideal voltage amp. having a gain of -100V/V with an impedance Z connected bw. its outputand input terminals. Find the Miller equivalent circuitwhen Z is (a) a 1-M Ω resistance, and (b) a 1-pFcapacitance. In each case, use the equivalent circuit todetermine Vo/Vsig.♣ Fig. 6.16(a) on page 580.(Sol.)(a) For Z = 1MΩ,

Z1 =Z

1 − K=

1000kΩ1 + 100

= 9.9kΩ

Z2 =Z

1 − 1K

=1MΩ

1 + 1100

= 0.99MΩ

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The voltage gain can be

Vo

Vsig=

Vo

Vi

Vi

Vsig= −100 × Z1

Z1 + Rsig= −49.7V/V

(b) For Z as a 1-pF capacitance

Z1 =Z

1 − K=

1/sC

1 + 100= 1/s(101C)

Z2 =Z

1 − 1K

=1

1.011

sC=

1s(1.01C)

Vo

Vsig=

Vo

Vi

Vi

Vsig= −100

1/sC1

1/(sC1) + Rsig

• The multiplication of a feedback capacitance by (1−K)is referred to as Miller multiplication or Miller effect.

6.5 CS & CE Amp. with Active Loads

⊙ 6.5.1 Common-Source Circuit

• Most basic IC MOS amp.♣ Fig. 6.17(a) on page 583.

• The current-source load can be implemented using aPMOS transistor and is therefore called an active load.

• We shall assume that the MOSFET is biased to operatein the saturation region.

⊙ 6.5.2 CMOS Implementation of theCommon-Source Amp.

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• A CMOS circuit implementation of the common-sourceamp.♣ Fig. 6.18(a) on page 584.

• We shall assume that Q2 and Q3 are matched.

• Q2 behaves as a current source when it operates insaturation.

ro2 =|VA2|IREF

The current-source load is not ideal but has a finiteoutput resistance equal to the transistor ro.

• Transfer characteristic♣ Fig. 6.18(d) on page 584.

• In region III both the amplifying transistor Q1 and theload transister Q2 are operating in saturation.

Av = −(gm1ro1)ro2

ro2 + ro1= −gm1(ro1||ro2)

6.6 High-Frequency Response of the CS and CE amp.

• High-frequency response of the active-loadedcommon-source and common-emitter amp.

• High-frequency equivalent circuit of the common-sourceamp.♣ Fig. 6.20 on page 589.

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• The load capacitance CL represents the totalcapacitance bw. drain (or collector) and ground.

⊙ Analysis using Miller’s Theorem

• Approximate equivalent circuit obtained for the CScase.♣ Fig. 6.21 on page 589.

• The amp. has a dominant pole formed by Rsig and Cin.

Vo

Vsig≈ AM

1 + sωH

AM = −gmR′L

fH =1

2πCinRsig

Cin = Cgs + Cgd(1 + gmR′L)

⊙ 6.6.2 Analysis using Open-Circuit Time Constants

• (1) The resistance seen by Cgs, Rgs = Rsig.

• (2) The resistance seen by CL, RCL= R′

L

• (3) The resistance seen by Cgd can be found byanalyzing the circuit in Fig. 6.22(b) with the result that♣ Fig. 6.22(b) on page 590.

Rgd = Rsig(1 + gmR′L) + R′

L

• Thus the effective time-constant b1 or τH can be

τH = CgsRgs + CgdRgd + CLRCL

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• The 3-dB frequency fH is

fH ≈ 12πτH

⊙ 6.6.4 Adapting the formula for the Case of theCE Amp.♣ Fig. 6.25 on page 596.

V ′sig = Vsig

Rsig + rx + rπ

R′sig = rπ||(Rsig + rx)

AM = − rπ

Rsig + rx + rπ(gmR′

L)

Cin = Cπ + Cµ(1 + gmR′L)

fH ≈ 12πCinR′

sig

• Using the method of open-circuit time constants

τH = CπRπ + CµRµ + CLCCL

= CπR′sig + Cµ[(1 + gmR′

L)R′sig + R′

L] + CLR′L

fH ≈ 12πτH

6.7 CG & CB Amp. with Active Loads

⊙ 6.7.1 Common-Gate Amp.

• The basic IC MOS common-gate amp.♣ Fig. 6.27(a) on page 601.

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• We assume that the MOSFET is operating in thesaturation region.

• The Body Effect

• Since the substrate (=body) is not connected to thesource, the body effect plays a role in the operation ofthe common-gate amp.

• Just as a signal voltage vgs bw. the gate and the sourcegives rise to a drain current signal gmvgs, a signalvoltage vbs bw. the body and the source gives rise to adrain current signal gmbvbs.

• Thus the drain signal current becomes(gmvgs + gmbvbs); gmb = χgm, χ = 0.1 to 0.2.

• Since both the gate and the body terminals areconnected to ground, vbs = vgs, and the signal currentin the drain becomes (gm + gmb)vgs.

• Input Resistance

• To determine the input resistance Rin, express ii interms of vi.♣ Fig. 6.27(c) on page 601.

• The source current i = (gm + gmb)vi and the currentthrough ro, iro,

ii = (gm + gmb)vi + iro

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iro =vi − vo

ro=

vi − iiRL

ro

ii =(

gm + gmb +1ro

)vi/

(1 +

RL

ro

)• The input resistance Rin can be found as

Rin ≡ vi

ii=

ro + RL

1 + (gm + gmb)ro

• Observe that for ro = ∞, Rin reduces to 1/(gm + gmb).

• Operation with RL = ∞

• Since io = 0, ii must also be zero; the current i in thesource terminal, i = (gm + gmb)vi, simply flows via thedrain through ro and back to the source node.

Ri = ∞

• To determine the open-circuit voltage gain Avo,

vo = iro + vi

= (gm + gmb)rovi + vi

Avo = 1 + (gm + gmb)ro

• The gain of the CG circuit is positive. Unlike the CSamp., the CG amp. is noninverting.

• Voltage Gain

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• We use that io = ii and express vo as

vo = ioRL = iiRL

vi = iiRin

• The voltage gain Av is

Av =vo

vi=

RL

Rin

• Output Resistance

• Two different output resistances: Ro, which is theoutput resistance when vi is set to zero, and Rout,which is the output resistance when vsig is set to zero.♣ Fig. 6.28 on page 605.

Ro = ro

• From the Fig. 6.28(b), a test voltage vx is applied atthe output.

v = ixRs

vx = [ix + (gm + gmb)v]ro + v

• Hence Rout ≡ vx/ix,

Rout = ro + [1 + (gm + gmb)ro]Rs

• The expressions for Rout is very useful results that wewill employ frequently throughout the rest of this book.

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• These formulas give the output resistance not only ofthe CG amp. but also of a CS amp. with a resistanceRs in the emitter.

• Another interpretation of the formula for Rout is

Rout = Rs + [1 + (gm + gmb)Rs]ro

• High-Frequency Response

• CG amp. with the MOSFET internal capacitances Cgs

and Cgd indicated.♣ Fig. 6.31(a) on page 607.

• None of the capacitances undergoes the Millermultiplication effect.

• CG circuit can be designed to have a much widerbandwidth than that of the CS circuit.

• If ro can be neglected, we immediately observe thatthere are two poles: one at the input side with afrequency fP1,

fP1 =1

2πCgs

(Rs|| 1

gm+gmb

)• The other at the output side with a frequency fP2,

fP2 =1

2π(Cgd + CL)RL

• fP2 is usually lower than fP1; thus fP2 can be

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dominant.

• Both fP1 and fP2 are usually much higher than thefrequency of the dominant input pole in the CS stage.

• When ro has to be taken into account,

Rgs = Rs||Rin

Rgd = RL||Rout

fH =1

2π[CgsRgs + (Cgd + CL)Rgd]

⊙ 6.7.2 The Common-Base Amp.

• The basic circuit for the active-loaded common-baseamp.♣ Fig. 6.33 on page 610

• From figure 6.33(b)

io = ii − vi/rπ

• The input resistance at the emitter Rin

Rin =ro + RL

1 + ro

re+ RL

(β+1)re

• With a slight approximation,

Rin ≈ rero + RL

ro + RL/(β + 1)

• Note that setting ro = ∞ yields Rin = re. Also,forRL = 0, Rin = re.

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• For RL/(β + 1) << ro,

Rin ≈ re +RL

Ao

where Ao is the intrinsic gain gmro.

• The output resistance including the source resistanceRe can be found by analysis of the circuit♣ Fig. 6.34 on page 612.

Rout = ro + (1 + gmro)R′e

where R′e = Re||rπ.

• Another useful form for Rout can be

Rout = R′e + (1 + gmR′

e)ro

6.8 Cascode Amp.

• By placing a common-gate (common-base) amp. stagein cascade with a common-source (common-emitter)amp. stage. ⇒ cascode configuration.

• We combine the high input resistance and largetransconductance achieved in a common-source(common-emitter) amp. with the current-bufferingproperty and the superior high-frequency response ofthe common-gate (common-base) circuit.

⊙ 6.8.1 The MOS Cascode

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• MOS cascode amp.♣ Fig. 6.36 on page 615.

• Q1 is connected in the common-source configurationand provides its output to the input terminal (source)of Q2.

• Small-Signal Analysis♣ Fig. 6.36(b)

Rin2 =1

gm2 + gmb2+

RL

Avo2

Avo2 = 1 + (gm2 + gmb2)ro2

Rd1 = ro1||[

1gm2 + gmb2

+RL

Avo2

]Rout = ro2 + Avo2ro1

vi = vsig

vo1

vi= −gm1ro1 = −A01

vo = Avo2vo1

Avo = −A01Avo2

⊙ 6.8.2 Frequency Response of the MOS Cascode

• Cascode amp. with all transistor internal capacitancesindicated.♣ Fig. 6.38 on page 618.

• Determining the 3-dB frequency fH is to employ theopen-circuit time-constants method.

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1. Capacitance Cgs1 sees a resistance Rsig.

2. Capacitance Cgd1 sees a resistance Rgd1, which canbe obtained by adapting the formula in Eq. (6.56) to

Rgd1 = (1 + gm1Rd1)Rsig + Rd1

where Rd1, the total resistance at D1, is given byEq. (6.124).

3. Capacitance (Cdb1 + Cgs2) sees a resistance Rd1.

4. Capacitance (CL + Cgd2) sees a resistance(RL||Rout).

τH = Cgs1Rsig + Cgd1[(1 + gm1Rd1)Rsig + Rd1]

+(Cdb1 + Cgs2)Rd1 + (CL + Cgd2)(RL||Rout)

fH ≈ 12πτH

⊙ 6.8.3 The BJT Cascode

• BJT cascode amp.♣ Fig. 6.40 on page 623.

• The BJT cascode has an input resistance of rπ1 .

• The output resistance is found as Rout = β2ro2.

• From the circuit in Fig. 6.40(c), the voltage gain Avo is

Avo = −βAo

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6.9 CS & CE Amp. with Source (Emitter) Degeneration

⊙ 6.9.1 CS Amp. with a Source Resistance

• An active-loaded amp. with a source resistance Rs.♣ Fig. 6.47 on page 629.

• To determine the output resistance Rout, we reduce vi

to zero and using Eq. (6.101),

Rout = ro + [1 + (gm + gmb)ro]Rs

• The open-circuit voltage gain can be found from thecircuit in Fig. 6.47(c).

vo = −iro = −gmrovgs = −gmrovi

Avo = −gmro = −Ao

• The amp. output equivalent circuit can be found asshown in Fig. 6.47(d).

• The voltage gain Av is

Av = −AvoRL

RL + Rout

• If RL is kep unchanged, Av will decrease, which is theprice paid for the performance improvements obtainedwhen Rs is introduced.

• Frequency Response

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• Another advantage of source degeneration is the abilityto broaden the amp. bandwidth.

• The amp. with internal capacitance Cgs and Cgd

indicated.♣ Fig. 6.48 on page 632.

• The method of open-circuit time constants can beemployed to obtain an estimate of the 3-dB frequencyfH .

• Rgd, which is the resistance seen by Cgd can bedetermined by simply adapting the formula in Eq.(6.56) to the case with source degeneration as follows:

Rgd = Rsig(1 + GmR′L) + R′

L

R′L = RL||Rout

RCL= RL||Rout = R′

L

• The formula for Rgs is the most difficult to derive,using the hybrid-π model,

Rgs ≈ Rsig + Rs

1 + (gm + gmb)Rs

(ro

ro+RL

)τH = CgsRgs + CgdRgd + CLRCL

fH =1

2πτH

⊙ 6.9.2 CE Amp. with an Emitter Resistance

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• An active-loaded CE amp. with an emitter resistanceRe.♣ Fig. 6.49 on page 633.

• We can express the ouput voltage vo as

vo =[(1 − α)i − vi − ire

Re

]RL

Alternatively, we can express vo as

vo = (vi − ire) − ro

[i − vi − ire

Re

]• Equating these two expressions of vo yields an equation

in vi and i,

Rin =vi

i/(β + 1)

= (β + 1)re + (β + 1)Re

ro + RL

β+1

ro + RL + Re

6.10 The Source & Emitter Followers

⊙ 6.10.1 Source Follower

• IC source follower biased by a constant-current source I.♣ Fig. 6.50 on page 636.

• This is usually implemented using an NMOS currentmirror.

• The low-frequency small-signal model of the sourcefollower.

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♣ Fig. 6.50 (b), (c) on page 636.

R′L = RL||ro||

1gmb

vo = gmvgsR′L

vgs = vi − vo

Av ≡ vo

vi=

gmR′L

1 + gmR′L

• To obtain the open-circuit voltage gain, we set RL to∞.

Avo =gmro

1 + (gm + gmb)ro

⊙ 6.10.2 Frequency Response of the Source Follower

• A major advantage of the source follower is its excellenthigh-frequency response.

• This comes about because none of the internalcapacitances suffers from Miller effect.

• High-frequency equivalent circuit of a source follower.♣ Fig. 6.51 on page 638.

• To find the poles, we will find the resistance seen byeach of three capacitances Cgd, Cgs, and CL and thencompute the time constant associated with each.

• (1) With Vsig set to zero and Cgs and CL assumed to

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be open circuited,

Rgd = Rsig

• (2) The resistance Rgs seen by Cgs can be determinedby analysis of the circuit in Fig. 6.51(c) to obtain,

Rgs =Rsig + R′

L

1 + gmR′L

• (3) CL interacts with RL||Ro

RCL= RL||Ro = RL||ro||1/gm||1/gmb

• The high-frequency is limited as

fH =1

2πτH= 1/2π(CgdRsig + CgsRgs + CLRCL

)

6.11 Some Useful Transistor Pairings

⊙ 6.11.1 CD-CS, CC-CE, and CD-CE Configuration

• By cascading a common-drain (source-follower)transistor Q1 with a common-source transistor Q2.♣ Fig. 6.53 on page 641.

• Its bandwidth is much wider than that obtained in aCS amp.

⊙ 6.11.2 Darlington Configuration (CC-CC)

• Darlington configuration.♣ Fig. 6.55 on page 645.

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• Darlington pair can be thought of as a compositetransistor with β = β1β2.

• It can be used to implement a high-performance voltagefollower.

6.12 Current-Mirror Circuits with Improved Performance

• Constant-current source is used both in biasing and asactive load.

⊙ 6.12.1 Cascode MOS Mirrors

• Bias cascode current mirror.♣ Fig. 6.58 on page 649.

• The output resistance Ro is (using Eq. (6.101)),

Ro = ro3 + [1 + (gm3 + gmb3)ro3]ro2

≈ gmb3ro3ro2

⊙ 6.12.2 A Bipolar Mirror with Base-CurrentCompensation

• A bipolar current mirror♣ Fig. 6.59 on page 650.

IREF = IC

[1 +

2β(β + 1)

]IO = IC

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The current transfer ratio of the mirror is

IO

RREF=

11 + 2/(β2 + β)

≈ 11 + 2/β2

which means that the error due to finite β has beenreduced from 2/β in the simple mirror to 2/β2.

⊙ 6.12.3 The Wilson Current Mirror

• Wilson mirror.♣ Fig. 6.60 on page 651.

IO

IREF≈ 1

1 + 2/β2

⊙ 6.12.4 The Wilson MOS Mirror

• MOS version of the Wilson mirror.♣ Fig. 6.61 on page 653.

⊙ 6.12.5 The Widlar Current Source

• Widlar current source.♣ Fig. 6.62 on page 654.

• Resistor RE is included in the emitter lead of Q2.

• Neglecting base currents we can write as

VBE1 = VT ln(

IREF

IS

)

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VBE2 = VT ln(

IO

IS

)VBE1 − VBE2 = VT ln

(IREF

IO

)VBE1 = VBE2 + IORE

IORE = VT ln(

IREF

IO

)• Ex. 6.14 Fig. 6.63 shows two circuits for generating a

constant current IO = 10µA which operate from a 10-Vsupply. Determine the values of the required resistorsassuming that VBE is 0.7V at a current of 1 mA andneglecting the effect of finite β.♣ Fig. 6.63 on page 655.(a) Choose a value for R1 to result in IREF = 10µA.

VBE1 = 0.7 + VT ln(

10µA

1mA

)= 0.58V

R1 =10 − 0.58

0.01= 942kΩ

(b) First decide on a suitable value for IREF . If weselect IREF = 1mA, then VBE1 = 0.7V and R2 is givenby

R2 =10 − 0.7

1= 9.3kΩ

10 × 10−6R3 = 0.025 ln(

1mA

10µA

)⇒ R3 = 11.5kΩ

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