metal gas detec robo

METAL DETECTION AND GAS LEAK FINDING ROBOT 2013

Chapter 3

HARDWARE DESCRIPTION

3.1 Microcontroller

Figure 3.1.1 AT89S52 Microcontroller with Driver Circuit

.

When we have to learn about a new computer we have to familiarize about the machine

capability we are using, and we can do it by studying the internal hardware design (devices

Architecture), and also to know about the size, number and the Size of the registers.

A microcontroller is a single chip that contains the Processor (the CPU), non-volatile

memory for the program (ROM or flash), volatile memory for input and output (RAM), a

clock and an I/O control unit. Also called a "computer on a chip," billions of microcontroller

1


units (MCUs) are embedded each year in a myriad of products from toys to appliances to

automobiles. For example, a single vehicle can use 70 or more microcontrollers.

3.1.1 Advantages of Microcontroller Microcontrollers are widely used in today’s control systems for the following reasons: • Design and Simulation – Because you are programming with software, detailed simulations may be performed in advance to assure correctness of code and system performance. • Flexibility – Ability to reprogram using Flash, EEPROM or EPROM allows straightforward changes in the control law used.

• High Integration – Most microcontrollers are essentially single chip computers with on-chip processing, memory, and I/O. Some contain peripherals for serial communication and reading analog signals (with an analog-to-digital converter or ADC). This differentiates a microcontroller from a microprocessor. Microprocessors require that this functionality be provided by added components.

• Cost – Cost savings come from several locations. Development costs are greatly decreased because of the design/flexibility advantages mentioned previously. Because so many components are included on one IC, board area and component savings are often evident as well.

• Easy to Use – Just program and go! While in the past, programming has often involved tedious assembly code, today C compilers are available for most microcontrollers. Microcontrollers often only require a single 5V supply as well which makes them easier to power and use.

3.1.2 AT89s52 Microcontroller

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes

of in-system programmable Flash memory. The device is manufactured using Atmel’s high-

density nonvolatile memory technology and is compatible with the industry-standard 80C51

instruction set and pin out. The on-chip Flash allows the program memory to be

reprogrammed in-system or by a conventional nonvolatile memory programmer. By

combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip,

the Atmel AT89S52 is a powerful microcontroller, which provides a highly flexible and cost-

effective solution to many, embedded control applications. The AT89S52 provides the

following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog

timer, two data pointers, three 16-bit timer/counters, a Six-vector two-level interrupt

architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the

2


AT89S52 is designed with static logic for operation down to zero frequency and supports two

software selectable power saving modes. The Idle Mode stops the CPU while allowing the

RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-

down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip

functions until the next interrupt.

3.1.2.1 Features of AT89s52

• Compatible with MCS®-51 Products

• 8K Bytes of In-System Programmable (ISP) Flash Memory

– Endurance: 10,000 Write/Erase Cycles

• 4.0V to 5.5V Operating Range

• Fully Static Operation: 0 Hz to 33 MHz

• Three-level Program Memory Lock

• 256 x 8-bit Internal RAM

• 32 Programmable I/O Lines

• Three 16-bit Timer/Counters

• Eight Interrupt Sources

• Full Duplex UART Serial Channel

• Low-power Idle and Power-down Modes

• Interrupt Recovery from Power-down Mode

• Watchdog Timer

• Dual Data Pointer

• Power-off Flag

• Fast Programming Time

• Flexible ISP Programming (Byte and Page Mode)

• Green (Pb/Halide-free) Packaging Option

3


3.1.2.2 Block diagram

Figure 3.1.2 Block Diagram Of AT89S52

4


3.1.2.3 Pin diagram

Figure 3.1.3 Pin Diagram For AT89S52

5

A

T

8

9

S

5

2


3.1.2.3.1 Pin Description

VCC Supply Voltage

GND Ground

Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin

can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be

used as high-impedance inputs. Port 0 can also be configured to be the

multiplexed low-order address/data bus during accesses to external program and

data memory. In this mode, P0 has internal pull-ups.Port 0 also receives the code

bytes during Flash programming and outputs the code bytes during Program

verification. External pull-ups are required during program verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output

buffers can Sink/source four TTL inputs. When 1s are written to Port 1 pins,

they are pulled high by the internal Pull-ups and can be used as inputs. As

inputs,Port1 pins that are externally being pulled low will source current

because of the internal pull-ups.In addition, P1.0 and P1.1 can be configured to

be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2

trigger input (P1.1/T2EX), respectively, as shown in the following table.

Port pin AlterNet function

P1.0 T2(external count input to timer/counter2),clock out

P1.1 T2EX(Timer/counter2 capture trigger direction control)

P1.5 MOSI(used for in-system programming)

P1.6 MISO(used for in-system programming)

P1.7 SCK(used for in-system programming)

Port 1 also receives the low-order address bytes during Flash programming and

verification.

6


Port 2Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output

buffers can Sink/source four TTL inputs. When 1s are written to Port 2 pins, they

are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2

pins that are externally being pulled low will source current because of the internal

pull-ups. Port 2 emits the high-order address byte during fetches from external

program memory and during accesses to external data memory that uses 16-bit

addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-

ups when emitting 1s. During accesses to external data memory that uses 8-bit

addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function

Register. Port 2 also receives the high-order address bits and some control signals

during Flash programming and verification.

Port3

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output

buffers can Sink/source four TTL inputs. When 1s are written to Port 3 pins, they

are pulled high by the internal pull-up sand can be used as inputs. As inputs,

Port 3 pins that are externally being pulled Low will source current because of the

pull-ups.

Port 3 receives some control signals for Flash programming and verification. Port 3

also serves the functions of various special features of the AT89S52, as shown in

the following table.

Port pin Alternate function

P3.0 RXD(serial input port)

P3.1 TXD(serial output port)

P3.2 INTO (external interrupt 0)

P3.3 INT1 (external interrupt 1)

P3.4 T0 (timer 0 external input)

P3.5 T01(timer 01external input)

P3.6 WR(external data memory write storable)

P3.7 RD(external data memory read storable)

7


RST

Reset input. A high on this pin for two machine cycles while the oscillator is running

resets the device. This pin drives high for 98 oscillator periods after the Watchdog

times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this

feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.

ALE/PROG

Address Latch Enable (ALE) is an output pulse for latching the low byte of the

address during accesses to external memory. This pin is also the program pulse input

(PROG) during Flash programming.

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency

and may be used for external timing or clocking purposes. Note, however, that one

ALE pulse is skipped during each access to external data memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With

the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the

pin is weakly pulled high. Setting the ALE-disable bit has no effect if the

microcontroller is in external execution mode.

PSEN

Program Store Enable (PSEN) is the read strobe to external program memory. When

the AT89S52 is executing code from external program memory, PSEN is activated

twice each machine cycle, except that two PSEN activations are skipped during each

access to external data memory.

EA/VPPExternal Access Enable: EA must be strapped to GND in order to enable the device to

fetch code from external program memory locations starting at 0000H up to FFFFH.

Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.

EA should be strapped to Vcc for internal program executions.

8


This pin also receives the 12-volt programming enable voltage (Vpp) during Flash

programming.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating

circuit.

XTAL2

Output from the inverting oscillator amplifier.

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier

that can be Configured for use as an on-chip oscillator, as shown in Figure 3.1.4. Either a

quartz crystal or Ceramic resonator may be used. To drive the device from an external clock

source, XTAL2 Should be left unconnected while XTAL1 is driven, as shown in Figure 3.1.5

There are no requirements on the duty cycle of the external clock signal, since the input to

the internal clocking Circuitry is through a divide-by-two flip-flop, but minimum and

maximum voltage high and low Time specifications must be observed.

Figure 3.1.4 Figure 3.1.5.

C1, C2 = 30 pF ± 10 pF for External Clock Drive Configuration

Crystals = 40 pF ± 10 pF for

Ceramic Resonators

9


3.1.2.4 Memory Organization

MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K

bytes each of external Program and Data Memory can be addressed.

Program Memory - If the EA pin is connected to GND, all program fetches are directed to

external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses

0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H

through FFFFH are to external memory.

Data Memory - The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes

occupy a parallel address space to the Special Function Registers. This means that the upper

128 bytes have the same addresses as the SFR space but are physically separate from SFR

space. When an instruction accesses an internal location above address 7FH, the address

mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of

RAM or the SFR space. Instructions which use direct addressing access the SFR space. For

example, the following direct addressing instruction accesses the SFR at location 0A0H

(which is P2).

MOV 0A0H, #data Instructions that use indirect addressing access the upper 128 bytes of

RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H,

accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H). MOV

@R0, #data Note that stack operations are examples of indirect addressing, so the upper 128

bytes of data RAM are available as stack space.

Watchdog Timer (One-time Enabled with Reset-out) The WDT is intended as a recovery

method in situations where the CPU may be subjected to software upsets. The WDT consists

of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted

to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in

sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will

increment every machine cycle while the oscillator is running. The WDT timeout period is

dependent on the external clock frequency. There is no way to disable the WDT except

through reset (either hardware reset or WDT overflow reset). When WDT over-flows, it will

drive an output RESET HIGH pulse at the RST pin.

10


3.1.2.5 Registers

In the CPU, registers are used to store information temporarily. That information could be a byte of data to be processed, or an address pointing to the data to be fetched. In the 8051 there is only one data type: 8 bits. With an 8- bit data type, any data larger than 8 bits has to be broken into 8-bit chunks before it is processed.

The most commonly used registers of the 8051 are A(accumulator), B, R0, R1, R2, R3, R4, R5, R6, R7, DPTR (data pointer) and PC (program counter). All the above registers are 8-bit registers except DPTR and the program counter. The accumulator A is used for all arithmetic and logic instructions.

Figure 3.1.6 8 bit and 16 bit register examples.

Program Counter and Data Pointer

The program counter is a 16- bit register and it points to the address of the next instruction to be executed. As the CPU fetches op-code from the program ROM, the program counter is incremented to point to the next instruction. Since the PC is 16 bit wide, it can access

11


program addresses 0000 to FFFFH, a total of 64K bytes of code. However, not all the members of the 8051 have the entire 64K bytes of on-chip ROM installed.

The DPTR register is made up of two 8-bit registers, DPH and DPL, which are used to furnish memory addresses for internal and external data access. The DPTR is under the control of program instructions and can be specified by its name, DPTR. DPTR does not have a single internal address; DPH and DPL are assigned an address each.

Flag bits and the PSW Register

Like any other microprocessor, the 8051 have a flag register to indicate arithmetic conditions such as the carry bit. The flag register in the 8051 is called the program status word (PSW) register.

The program status word (PSW) register is an 8-bit register. It is also referred as the flag register. Although the PSW register is 8-bit wide, only 6 bits of it are used by the microcontroller. The two unused bits are user definable flags. Four of the flags are conditional flags, meaning they indicate some conditions that resulted after an instruction was executed. These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow). The bits of the PSW register are shown below:

CY PSW.7 Carry flag

AC PSW.6 Auxiliary carry flag

-- PSW.5 Available to the user for general purpose

RS1 PSW.6 Register bank selector bit 1

RS0 PSW.3 Register bank selector bit 0

OV PSW.2 Overflow flag

F0 PSW.1 User definable bit

P PSW.0 Parity flag

CY (The Carry Flag)

This flag is set whenever there is a carry out from the d7 bit. This flag bit is affected after an 8-bit addition or subtraction. It can also be set to 1 or 0 directly by an instruction such as “SETB C” and “CLR C” where “SETB C” stands for set bit carry and “CLR C” for clear carry.

12


AC (The Auxiliary Carry Flag)

If there is carry from D3 to D4 during an ADD or SUB operation, this bit is set: otherwise cleared. This flag is used by instructions that perform BCD arithmetic.

P (The Parity Flag)

The parity flag reflects the number of 1s in the accumulator register only. If the register A contains an odd number of 1s, then P=1. Therefore, P=0 if Ahas an even number of 1s.

OV (The Overflow Flag)

This flag is set whenever the result of a signed number operation is too large, causing the high order bit to overflow into the sign bit. In general the carry flags is used to detect errors in unsigned arithmetic operations.

Special function register

A map of the on-chip memory area called the Special Function Register (SFR) space is listed

in following table

13


14


3.1.2.6 Programming the Flash – Parallel Mode

The AT89S52 is shipped with the on-chip Flash memory array ready to be programmed. The

programming interface needs a high-voltage (12-volt) program enable signal and is

compatible with conventional third-party Flash or EPROM programmers. The AT89S52

code memory array is programmed byte-by-byte.

Programming Algorithm: Before programming the AT89S52, the address, data, and

control signals should be set up according to the “Flash Programming Modes” . To program

the AT89S52, take the following steps:

1. Input the desired memory location on the address lines.

2. Input the appropriate data byte on the data lines.

3. Activate the correct combination of control signals.

4. Raise EA/VPP to 12V.

5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-

write cycle is self-timed and typically takes no more than 50 μs. Repeat steps 1 through 5,

changing the address and data for the entire array or until the end of the object file is reached.

Data Polling: The AT89S52 features Data Polling to indicate the end of a byte write cycle.

During a write cycle, an attempted read of the last byte written will result in the complement

of the written data on P0.7. Once the write cycle has been completed, true data is valid on all

outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle

has been initiated.

Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY

output signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY.

P3.0 is pulled high again when programming is done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed

code data can be read back via the address and data lines for verification. The status of the

individual lock bits can be verified directly by reading them back.

Signature Bytes: The signature bytes are read by the same procedure as a nor-mal

verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to

a logic low. The values returned are as follows. (000H) = 1EH indicates manufactured by

Atmel (100H) = 52H indicates AT89S52 (200H) = 06H

Chip Erase: In the parallel programming mode, a chip erase operation is initiated by using

the proper combination of control signals and by pulsing ALE/PROG low for a duration of

200 ns - 500 ns. In the serial programming mode, a chip erase operation is initiated by

15


issuing the Chip Erase instruction. In this mode, chip erase is self-timed and takes about 500

ms. During chip erase, a serial read from any address location will return 00H at the data

output.

Figure 3.1.7 Flash Programming and Verification Waveforms – Parallel Mode

Programming the Flash – Serial Mode

The Code memory array can be programmed using the serial ISP interface while RST is

pulled to VCC. The serial interface consists of pins SCK, MOSI (input) and MISO (output).

After RST is set high, the Programming Enable instruction needs to be executed first before

other operations can be executed. Before a reprogramming sequence can occur, a Chip Erase

operation is required. The Chip Erase operation turns the content of every memory location

in the Code array into FFH. Either an external system clock can be supplied at pin XTAL1 or

a crystal needs to be connected across pins XTAL1 and XTAL2. The maximum serial clock

(SCK) frequency should be less than 1/16 of the crystal frequency. With a 33 MHz oscillator

clock, the maximum SCK frequency is 2 MHz

Serial Programming Algorithm

To program and verify the AT89S52 in the serial programming mode, the following

sequence is recommended: 1. Power-up sequence: a. Apply power between VCC and GND

16


pins. b. Set RST pin to “H”. If a crystal is not connected across pins XTAL1 and XTAL2,

apply a 3 MHz to 33 MHz clock to XTAL1 pin and wait for at least 10 milliseconds.

2. Enable serial programming by sending the Programming Enable serial instruction to pin

MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than

the CPU clock at XTAL1 divided by 16.

3. The Code array is programmed one byte at a time in either the Byte or Page mode. The

write cycle is self-timed and typically takes less than 0.5 ms at 5V.

4. Any memory location can be verified by using the Read instruction which returns the

content at the selected address at serial output MISO/P1.6.

5. At the end of a programming session, RST can be set low to commence normal device

operation. Power-off sequence (if needed):

1. Set XTAL1 to “L” (if a crystal is not used).

2. Set RST to “L”.

3. Turn VCC power off.

Data Polling: The Data Polling feature is also available in the serial mode. In this mode,

during a write cycle an attempted read of the last byte written will result in the complement

of the MSB of the serial output byte on MISO.

Figure 3.1.8 Serial Programming Waveforms

17


3.2 Max-232 Level converter

MAX232 is compatible with RS-232 standard, and consists of dual transceiver. Each receiver converts TIA/EIA-232-E levels into 5V TTL/CMOS levels. Each driver converts TTL/COMSLevels into TIA/EIA-232-E levels. The MAX232 is characterized for operation from -40°C to +85°C for all packages. MAX232 is purposed for application in high-performance information processing systems and control devices of wide application.

Figure 3.2.1 Max-232 IC

3.2.1 FEATURES

Input voltage levels are compatible with standard СMOS levels

Output voltage levels are compatible with EIA/TIA-232-E levels

Single Supply voltage: 5V

Low input current: 0.1µA at ТA= 25 °С

Output current: 24mA

Latching current not less than 450mA at ТA= 25°С

The transmitter outputs and receiver inputs are protected to ±15kV Air ESD

18


3.2.2 PIN DISCRIPTION

3.2.3 MAX-232 Interfaced With MCU

MAX232 (+5V -> +-12V converter)

Serial port male 9 pin connector (SER)

19


Figure 3.2.2 Interfacing of MAX-232 IC

Absolute maximum ratting

3.3 Motor Driver Circuit

L293D is a dual H-Bridge motor driver. So with one IC, two DC motors can be interfaced

which can be controlled in both clockwise and counter clockwise directions and its direction

of motion can also be fixed. The four I/O’s can be used to connect up to four DC motors.

L293D has output current of 600mA and peak output current of 1.2A per channel. Moreover

for the protection of the circuit from back EMF, output diodes are included within the IC.

The output supply (VCC2) has a wide range from 4.5V to 36V, which has made L293D a

best choice for DC motor driver. The name "H Bridge" is derived from the actual shape of

the switching circuit which controls the motion of the motor. It is also known as "Full

Bridge"

By using two motors the robot can be moved in any direction. This Steering mechanism of

the robot is called differential drive.

20


Figure 3.3.1 .Pin diagram Figure 3.3.2 block diagram of lm293

21


3.4 DTMF Decoder

The MT-8870 is a DTMF Receiver that integrates both band split filter and decoder functions into a single 18-pin DIP or SOIC package. It is manufactured using CMOS process technology. The MT-8870 offers low power consumption (35 mW max) and precise data handling.

22


Figure 3.4.1 Pin configuration of MT-8870

Its filter section uses switched capacitor technology for both the high and low

group filters and for dial tone rejection. Its decoder uses digital counting techniques

to detect and decode all 16 DTMF tone pairs into a 4-bit code. External component

count is minimized by provision of an on-chip differential input amplifier, clock

generator, and latched tri-state interface bus. Minimal external components required

includes a low-cost 3.579545 MHz color burst crystal, a timing resistor, and a timing

capacitor.

The filter section is used for separation of the low-group and high group tones and

it is achieved by applying the DTMF signal to the inputs of two sixth order switched

capacitor band pass filters, the bandwidths of which corresponds to the low and high

group frequencies. The filter section also incorporates notches at 350 and 440 Hz for

exceptional dial tone rejection. Each filter output is followed by a single order

switched capacitor filter section which smoothes the signals prior to limiting. Limiting

is performed by high-gain comparators which are provided with hysteresis to prevent

detection of unwanted low-level signals. The outputs of the comparators provide full

rail logic swings at the frequencies of the incoming DTMF signals.

Following the filter section is a decoder employing digital counting techniques to

determine the frequencies of the incoming tones and to verify that they correspond tothe standard DTMF frequencies.

DTMF Tone

The DTMF technique outputs distinct representation of 16 common alphanumeric characters (0-9, A-D, *, #) on the telephone. The lowest frequency used is 697Hz and the highest frequency used is 1633Hz, as shown in Table 1.

Table 3.4.1: DTMF Keypad.

23


FREQUENCY 1209

HZ

1336

HZ

1477

HZ

1633

HZ

697 Hz 1 2 3 A

770 Hz 4 5 6 B

852 Hz 7 8 9 C

941 Hz * 0 # D

The DTMF keypad is arranged such that each row will have its own unique tone

frequency and also each column will have its own unique tone frequency. Above is a

representation of the typical DTMF keypad and the associated row/column

frequencies. By pressing a key, for example 5, will generate a dual tone consisting of

770 Hz for the low group and 1336 Hz for the high group.

Table 3.4.2: Digits vs. input data vs. tone output frequency (serial mode)

Digit D4 D3 D2 D1 D0 Tone Output Frequency (Hz)1 0 0 0 0 1 697 + 1209

2 0 0 0 1 0 697+ 13363 0 0 0 1 1 697+ 14774 0 0 1 0 0 770 + 12095 0 0 1 0 1 770+ 13366 0 0 1 1 0 770+ 14777 0 0 1 1 1 852+ 12098 0 1 0 0 0 852+ 13369 0 1 0 0 1 852 +14770 0 1 0 1 0 941 +1336

* 0 1 0 1 1 941 +1209 # 0 1 1 0 0 941 +1477

A 0 1 1 0 1 697 +1633

24


B 0 1 1 1 0 770 +1633C 0 1 1 1 1 852 +1633D 0 0 0 0 0 941+1633— 1 0 0 0 0 697— 1 0 0 0 1 770— 1 0 0 1 0 852— 1 0 0 1 1 941— 1 0 1 0 0 1209— 1 0 1 0 1 1336— 1 0 1 1 0 1477— 1 0 1 1 1 1633

DTMF 1 1 1 1 1 —

*Notes: The codes not listed in Table 3.4.1 are not used D4 is MSB

3.5 Gas sensor

3.5.1 Introduction

Figure 3.5.1 Basic Gas Sensor

Gas sensor has recently attracted much attention due to increasing demand of

environmental monitoring and other gas detecting applications. Among different types of

gas sensor, thin film gas sensor has been much of interest because of microelectronic

batch- fabricated compatibility, reproducibility, and ability to form multilayer device

structures. In this work, thin film based gas sensing circuit is designed for immediate

applications of CO detection for environmental monitoring. Ion assisted deposition (IAD)

process offers several advantages for gas sensor fabrication, including reactive deposition

for gas-sensitive metal- oxide material optimization and improved thin film adhesion for

better device reliability. The metal oxide layer was deposited on alumina or glass

25


substrates. The sensors were tested with reducing gases, in the temperature range between

200oC and 350 oC and the electrical change in gas sensor is detected.

Gas sensors interact with a gas to initiate the measurement of its concentration.

The gas sensor then provides output to a gas instrument to display the measurements.

Common gases measured by gas sensors include ammonia, aerosols, arsine, bromine,

carbon dioxide, carbon monoxide, chlorine, chlorine dioxide, Diborane, dust, fluorine,

germane, halocarbons or refrigerants, hydrocarbons, hydrogen, hydrogen chloride,

hydrogen cyanide, hydrogen fluoride, hydrogen selenide, hydrogen sulfide, mercury vapor,

nitrogen dioxide, nitrogen oxides, nitric oxide, organic solvents, oxygen, ozone, phosphine,

silane, sulfur dioxide, and water vapor. Important measurement specifications to consider

when looking for gas sensors include the response time, the distance, and the flow rate.

The response time is the amount of time required from the initial contact with the

gas to the sensors processing of the signal. Distance is the maximum distance from the

leak or gas source that the sensor can detect gases. The flow rate is the necessary flow rate

of air or gas across the gas sensor to produce signal. Gas sensors can output a

measurement of the gases detected in a number of ways. These include percent LEL,

percent volume, trace, leakage, consumption, density, and signature or spectra. The lower

explosive limit (LEL) or lower flammable limit (LFL) of a combustible gas is defined as

the smallest amount of the gas that will support a self-propagating flame when mixed

with air (or oxygen) and ignited. In gas-detection systems, the amount of gas present is

specified in terms of % LEL: 0% LEL being a combustible gas-free atmosphere and

100% LEL being an atmosphere in which the gas is at its lower flammable limit. The

relationship between % LEL and % by volume differs from gas to gas. Also called

volume percent or percent by volume, percent volume is typically only used for

mixtures of liquids. Percent by volume is simply the volume of the solute divided by the

sum of the volumes of the other components multiplied by 100%. Trace gas sensors

given in units of concentration: ppm. Leakage is given as a flow rate like ml/min.

Consumption may also be called respiration given in units of ml/L/hr. Density

measurements are given in units of density: mg/m^3. A signature or spectra measurement

is a spectral signature of the gases present; the output is often a chromatogram.

Common outputs from gas sensors include analog voltage, pulse signals, analog currents

26


and switch or relays. Operating parameters to consider for gas sensors include operating

temperature and operating humidity.

Figure 3.5.2 Gas Sensor Circuit

Gas sensor has 6 pin as shown below, and how to connect to circuit is shown above. There is no polarity in gas sensors because these consist of heating coil

Working: Gas sensor output voltage changes as it detect gas, for example at no Gas it produces 1.2 Volt and when it detects Gas its voltage output changes to 3 volt. So by using op-amp as comparator we detect weather gas is present or not.

CIRCUIT DIAGRAM

27


Figure 3.5.4 Circuit Diagram Of A Gas Sensor With Driver CircuitFEATURES

High sensitivity to LPG, natural gas , town gas Small sensitivity to alcohol, smoke. Fast response . Stable and long life Simple drive circuit

APPLICATIONS OF GAS SENSORS

They are used in gas leakage detecting equipments in family and Industry, are suitable for detecting of LPG, natural gas, town gas, avoid the noise of alcohol and cooking fumes and cigarette smoke.

(i) Gas Leak Protection: - These are areas of industry where the possibility of flammable

gas build-up is small, but the consequences of a gas escape could be catastrophic. These

tend to be industries which by their nature have large volumes of gases piped around the

works:

28


• Engineering companies

• Metal working plants

• Research laboratories

(ii) Confined Space Entry The most prominent application for portable gas detection instruments. The instrument

is used to check the atmosphere of sewers, tanks and other vessels prior to entry

for maintenance purposes. These instruments invariably are 'multi-gas'. They have 3 or

even 4 sensors included in the package. Large volumes of these instruments are purchased

by:

• Public utilities - especially water and telecoms

• Chemical and petrochemical - for entry into vessels

• Cabling contractors

• Piling contractors

• Tunnelling contractors

• Civil engineers

• Landfill operators

(iii) Hazardous Area: Working Areas of industry where the build-up of flammable gas

or vapour is an ever present danger. These instruments are very often the same

multi-gas instruments used for confined space entry, but there are areas where single gas

monitors ('explosimeters') are used. Typical industrial sectors here are:

• Chemical and petrochemical industries

• Oil/gas exploration

• Mining

Note: Use cigarette Lighter for getting LPG gas

SPECIFICATIONS

A. Standard work conditionSymbol Parameter name Technical condition R

emarksVc Circuit voltage 5V±0.1

AC OR DCVH

Heating voltage 5V±0.1

ACOR DCPL

Load resistance 20KΩ

29


RH

Heater resistance 31±10

Room TemPH

Heating consumption less than 800mw

B. Environment conditionSymbol Parameter name Technical condition R

emarksTao Using Tem -10℃-50℃Tas Storage Tem -20℃-70℃RH Related humidity less than 95%RhO2 Oxygen concentration 21%(standard

condition)Oxygenconcentration can affect

minimum value isover 2%

3.5 INDUCTIVE PROXIMITY SENSOR

Inductive proximity sensors operate under the electrical principle of inductance. Inductance

is the phenomenon where a fluctuating current, which by definition has a magnetic

component, induces an electromotive force (emf) in a target object. To amplify a device’s

inductance effect, a sensor manufacturer twists wire into a tight coil and runs a current

through it.

An inductive proximity sensor has four components; The coil, oscillator, detection circuit

and output circuit. The oscillator generates a fluctuating magnetic field the shape of a

doughnut around the winding of the coil that locates in the device’s sensing face.

When a metal object moves into the inductive proximity sensor’s field of detection, Eddy

circuits build up in the metallic object, magnetically push back, and finally reduce the

30


Inductive sensor’s own oscillation field. The sensor’s detection circuit monitors the

oscillator’s strength and triggers an output from the output circuitry when the oscillator

becomes reduced to a sufficient level.

The inductive proximity sensor work by setting up a high frequency field. If a target

nears the field will it induce eddy current. These currents consume power because of

resistance, so energy in the field is lost, and the signal amplitude decreases. The detector

examines field magnitude to determine when it has decreased enough to switch. An inductive

sensor is able to detect the presence of some metallic materials. This type of sensor consists

of four stages.

1 Oscillator Stage

2 Demodulator Stage

3 Trigger Stage

4 Output Stage

31


Oscillator stage

The oscillator consist of capacitor that stores energy in its electrical field and an

inductor that stores energy in magnetic field.

Demodulator stage

As the current flows back and forth between the capacitor and the coil, a sine

wave is produced, which is amplified and fed to the demodulator stage.

Trigger stage

The DC voltage from the demodulator is fed into the scmitt trigger. A primary function of

this trigger is to produce two different voltages that transition from one to the other very

rapidly.

Output stage

The primary function of the output stage is to provide a sensor output signal that is sufficient

enough for the load to which it is connected. Also, two of the output terminals are used for

the power supply connections for the sensor.

32


Advantages of inductive detection

1 No physical contact with the object to be detected, thus avoiding wear and enabling fragile or freshly painted objects to be detected.

2 High operating rates.

3 Fast response.

4 Excellent resistance to industrial environments (robust products, fully encapsulated in resin).

6 Solid state technology : no moving parts, therefore service life of sensor independent of the number of operating cycles.

Give Applications

Give Rating,led,metal case(cylindrical),wired cable,tightening torque

33


3.6 GLOBAL SYSTEM FOR MOBILE COMMUNICATION (GSM)-

DEFINITION-

Global System for Mobile Communication (GSM) is a globally accepted standard 1982 to create a common European mobile telephone standard that would formulate specifications for a pan-European mobile cellular radio system operating at 900 MHz.

GSM-

Throughout the evolution of cellular telecommunications, various systems have been developed without the benefit of standardized specifications. This presented many problems directly related to compatibility, especially with the development of digital radio technology. The GSM standard is intended to address these problems.

From 1982 to 1985 discussions were held to decide between building an analog or digital system. After multiple field tests, a digital system was adopted for GSM. The next task was to decide between a narrow or broadband solution. In May 1987, the narrowband time division multiple access (TDMA) solution was chosen. A summary of GSM milestones is given in table below:

YEAR MILESTONES

1982 GSM formed 1986 Field test 1987 TDMA chosen as access method 1988 Memorandum of understanding signed 1989 Validation of GSM system 1990 Pre-operation system 1991 Commercial system start-up 1992 Coverage of larger cities/airports 1993 Coverage of main roads 1995 Coverage of rural areas

34


Fig.GSM system architecture with essential components.

SIM300-

PRODUCT CONCEPT-

Designed for global market, SIM 300 is a Tri-band GSM/GPRS engine that works on frequencies EGSM 900 MHz, DCS 1800 MHz and PCS 1900 MHz. SIM300 provides GPRS multi-slot class 10/class 8 (optional) capability and support the GPRS coding schemes CS-1, CS-2, CS-3 and CS-4.

With a tiny configuration of 40mm x 33mm x 2.85mm, SIM300 can fit almost all the space requirement in our application, such as smart phones.PDA phone and other mobile device.

The physical interface to the mobile application is made through a 60 pins board-to-board connector, which provides all hardware interfaces between the module and customer’s boards except the RF antenna interface.

The keypad and SPI LCD interface will give you the flexibility to develop customized applications.

Two serial ports can help us easily develop our applications. Two audio channels include two microphones inputs and two speaker

outputs. This can be easily configured by AT commands.

35


SIM300 provide RF antenna interface with two alternatives: antenna connector and antenna pad. The antenna connector is MURATA MM9329-2700. And customer’s antenna can be soldered to the antenna pad.

The SIM300 is designed with power saving technique, the current consumption to as low as 2.5mA in SLEEP mode.

Fig.PCB of SIM300.

36


Fig.PIN Configuration of SIM300.

37

metal gas detec robo

Documents

Transcript of metal gas detec robo