Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time...
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Transcript of Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time...
![Page 1: Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time Uses Flipflops Refreshing Circuitry is not required.](https://reader035.fdocuments.in/reader035/viewer/2022072010/56649dd05503460f94ac5454/html5/thumbnails/1.jpg)
Memory Organization
Module IV
![Page 2: Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time Uses Flipflops Refreshing Circuitry is not required.](https://reader035.fdocuments.in/reader035/viewer/2022072010/56649dd05503460f94ac5454/html5/thumbnails/2.jpg)
SRAM vs DRAM
SRAM• Less memory cells per unit
area• Less Access time• Uses Flipflops• Refreshing Circuitry is not
required• Costly• Used for cache memory
DRAM• More memory cells per unit
area• More Access time• Uses Capacitors• Refreshing Circuitry is
required• Less Costly• Used for main memory
![Page 3: Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time Uses Flipflops Refreshing Circuitry is not required.](https://reader035.fdocuments.in/reader035/viewer/2022072010/56649dd05503460f94ac5454/html5/thumbnails/3.jpg)
ROM• It contains a permanent pattern of data that cannot
be changed. • It is non-volatile (no power is required)• It is possible to only read from ROM• Application of ROMs : – Microprogramming– Library subroutines– System programs– Function tables
• Adv: Data or program is permanent in main memory
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Types of ROM
• ROM - Read Only Memory.• PROM - Programmable Read Only Memory.• EPROM - Erasable Programmable Read Only
Memory.• EEPROM - Electrically Erasable Programmable
Read Only Memory.• Flash EEPROM
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ROM• ROM is created with data actually wired into
chip during fabrication.• This presents two problems:– Data insertion includes a large fixed cost– There is no room or error. If one bit is wrong, the
whole batch of ROMs must be thrown out.
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PROM
• It is non-volatile and wrote only once.• The writing process is performed electrically
and may be performed later than during fabrication.
• Special equipment is required for the writing or “programming” process.
• It provide flexibility and convenience.
![Page 7: Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time Uses Flipflops Refreshing Circuitry is not required.](https://reader035.fdocuments.in/reader035/viewer/2022072010/56649dd05503460f94ac5454/html5/thumbnails/7.jpg)
EPROM• It is read and written electrically.• Before a write operation, all storage cells is erased• Erasure is performed by shining an intense
ultraviolet light through a window designed into the chip
• This can be performed repeatedly• Each erasure can take upto 20 minutes• EPROM can be altered multiple times • EPROM is more expensive than PROM• Adv: multiple update capability.
![Page 8: Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time Uses Flipflops Refreshing Circuitry is not required.](https://reader035.fdocuments.in/reader035/viewer/2022072010/56649dd05503460f94ac5454/html5/thumbnails/8.jpg)
EEPROM
• It can be written into at any time without erasing prior contents.
• Write operation takes longer time than read.• Adv:– nonvolatility – flexibility of being updatable – Uses ordinary bus control, address, and data lines.
• Disadv:– More expensive– Less dense (fewer bits per chip)
![Page 9: Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time Uses Flipflops Refreshing Circuitry is not required.](https://reader035.fdocuments.in/reader035/viewer/2022072010/56649dd05503460f94ac5454/html5/thumbnails/9.jpg)
Flash EEPROM• Named so since it can be reprogrammed fast.• It uses electrical erasing technology• Entire memory can be erased in few seconds• It is possible to erase blocks of memory rather
than entire chip. • It does not provide byte-level erasure.• Adv: It uses only one transistor per bit and
hence high density
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Memory Hierarchy• To implement memory systems, the following
relationships hold:• Faster access time, greater cost per bit• Greater capacity, smaller cost per bit• Greater capacity, slower access time
• Dilemma: Designer would prefer large-capacity memory but to improve performance he needs to use faster low capacity memories.
• Way out : Do not rely on a single memory type but to employ a memory hierarchy
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Memory Hierarchy
![Page 12: Memory Organization Module IV. SRAM vs DRAM SRAM Less memory cells per unit area Less Access time Uses Flipflops Refreshing Circuitry is not required.](https://reader035.fdocuments.in/reader035/viewer/2022072010/56649dd05503460f94ac5454/html5/thumbnails/12.jpg)
Memory Hierarchy
• As one goes down the hierarchy:a. Decreasing cost per bitb. Increasing capacityc. Increasing access timed. Decreasing frequency of access of the memory
by the processor• Thus, smaller, more expensive, faster
memories are supplemented by larger, cheaper, slower memories.
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Virtual Memory• It allows the execution of processes that are not
completely in memory• It abstracts main memory into an extremely large
storage, separating logical memory from physical memory.
• It frees programmers from the concerns of memory limitations.
• It allows processes to share files easily.• It is not easy to implement and decrease
performance if it is used carelessly.
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Virtual Memory
• Virtual memory involves the separation of logical memory as perceived by users from physical memory.
• This separation allows an extremely large virtual memory for programmers when only a smaller physical memory is available
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Virtual Memory