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Operating Systems Martin O Hanlon
Memory Management
In a multiprogramming computer the operating system resides in part of memory and the
rest is used by multiple processes.
The task of subdividing the memory not used by the operating system among the various
processes is called memory management.
Memory management requirements
Relocation - programs not loaded into a fied point in memory but may reside in
various areas.
!rotection - each process should be protected against un"anted interference by other
processes either accidentally or intentionally. #ll memory references generated by a
process must be checked at run time to ensure that they only reference memory that
has been allocated to that process.
Sharing $ !rotection mechanisms must be fleible enough to allo" a number of
processes to access the same area of memory. %or eample if a number of processes
are eecuting the same program& it is advantageous to allo" each program to accessthe same copy of the program.
'ogical Organisation $ !rograms are normally organised into modules some of "hich
are non modifiable and some of "hich contain data that may be modified. Ho" doesthe operating system organise R#M "hich is a linear address space to reflect this
logical structure.
!hysical Organisation $ (omputer memory is organises into a least t"o levels ) main
memory and secondary memory. The task of moving information bet"een the t"o
levels of memory should be the systems responsibility *not the programmers+.
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Relocation
Ho" a program is loaded from disk.
fig,
The first step in the creation of an active process is to load a program into main memory and
create a process image& as sho"n above. The actual program itself may consist of a number of
compiled or assembled modules that are linked together to resolve any references bet"een
modules *see %ig belo"+.
The 'oader places the program in memory. It may do so in three "ays)
#bsolute 'oading
Relocatable loading
ynamic run-time loading
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%ig
#bsolute 'oading)
#n absolute loader re/uires that a given module is al"ays loaded into the same location inmemory. Therefore any references in the program must correspond eactly to the actual memory
location "hen the program is loaded.
The assignment of specific address values to memory references "ithin a program can be done
either by the programmer or at compile or assembly time. There are several disadvantages to the
former approach. %irstly every programmer "ould have to kno" eactly ho" programs are loaded
into main memory. Secondly& if any modifications are made to the program that involved
insertions or deletions in the body of the program& then all addresses "ould have to be altered. %or
this reason it is preferable to allo" memory references "ithin programs to be epressedsymbolically *see %ig0 belo"+. and have those symbolic references resolved at compilation or
assembly. This is illustrated belo" every reference to an instruction or item of data is initially
represented by a symbol. In preparing the module for input to an absolute loader& the assembler or
compiler "ill convert all these references to specific address. The absolute loader "ill then load
the program at the addresses specified.
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%ig0
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Relocatable loader)
# huge disadvantage of binding references to specific addresses prior to loading is that the
resulting load module can only be places in one region of main memory. #nd as normally memoryis shared bet"een a number of processes it is undesirable to state in advance into "hich region of
memory a particular module should be loaded. It "ould be better to make that decision at run time.
3hat "e need is a module that can be loaded into any part of available memory.
To satisfy this re/uirement& the assember4compiler produces not actual main memory addresses
* absolute addresses+ but addresses that are relative to some kno"n point such as the start of theprogram. This is sho"n above in %ig0. The start of the load module is assigned the relative address
1 and all other memory references "ithin the module are epressed relative to the beginning of the
module.3ith all the references epressed in relative format it is /uite easy for the loader to place the
module in the desired location. If the module in to be loaded beginning at location & then the
loader must simply add to each memory reference as it loads the module into memory. To assist
in this task& the load module must include information that tells the loader "here the address
references are and ho" they are to be interpreted & usually relative to the program origin but also
possibly relative to some other point in the program such as current location.
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ynamic Run Time 'oader)
The relocatble loader is an obvious advance over absolute loaders ho"ever in a multiprogramming
environment it is still inade/uate. In a multiprogramming environment there is often a need tos"ap process images in and out of main memory to maimise the use of the processor *or some
other operational reason+. To implement this it "ill be necessary to reload the process in differentmemory locations *depending "hat is available at the time+. Thus a program once loaded may be
s"apped out and reloaded at a different location. This "ould not be possible "ith the relocatable
loader "here memory references are bound to absolute at initial load time.
The solution to this is to defer the calculation of an absolute address until it is actually needed at
run time. Ho" this "orks is that the load module is brought into main memory "ith all the
memory references in relative form as in c+ *%ig0+ above. It is not until an instruction is actuallyeecuted that the absolute address is calculated. To ensure that this conversion of addresses takes
place as fast as possible it is done by special processor hard"are *Memory Management 6nit+.
ynamic address calculation provides complete fleibility. # program can be loaded into any
region of main memory and logical addresses converted to physical addresses on the fly.
%ig2 belo" sho"s ho" the address translation is achieved. 3hen a process is assigned to the
Running state& a special register called the base register is loaded "ith the starting address inmain memory of the process. # bounds register "hich indicates the ending location of the
program is also used. uring the course of program eecution& relative addresses are encountered.These include the contents of instruction registers& instruction addresses that occur in branch and
call instructions and data addresses that occur in load and store instructions. 7ach such relative
address goes through t"o steps of manipulation by the processor. %irst the value in the base
address is added to the relative address to produce an absolute address. Second& the resulting
address is compared to the value in the bounds register. If the address is "ithin bounds then the
instruction eecution proceeds. Other"ise an interrupt indicating an error is generated.
This scheme allo"s programs to be s"apped in and out of memory during eecution and also
provides a measure of protection $ each process image is isolated by the contents of the base andbounds register and is safe from un"anted access by other processes.
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Single User, Single process System
In this system $ only one user is present and one process is running at any time. Memory
management is easy $ memory is divided into t"o parts $ one for the Op system and one
for the program currently being eecuted.
Fixed Partitioning
Main memory divided into a number of fied si9e partitions $ partitions may be the all
the same si9e or une/ual si9e partitions.
Internal %ragmentation
%ied :umber of processes in memory
(ontiguous memory
:o 'onger used
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Op System
6ser
!rogram
!artition 0 211k
!artition 011k
!artition , 11k
#l"ays present in
Memory
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Dynamic Partitioning
!artitions are created dynamically and each process is loaded into a partition of
eactly the same si9e as the process.7ternal fragmentation
!eriodic compaction of memory space needed
!lacement algorithms)
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Placement algorithms
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The above diagram sho"s an eample of memory configuration after a number
of placement and s"apping-out operations. The last operation "as allocating a ,2
Mb process to an used Mb block. The left side sho"s ho" a ,8 Mb re/uestmight be satisfied.
Paging
Introduced to alleviate problem of fragmentation.
Memory is divided into page !ramesall of e/ual si9e.
The logical address space divided into pages of e/ual si9e.
The memory manager determines
,. The number of pages in the program
. 'ocates enough empty page frames to facilitate0. 'oads all of the pages into memory& pages need not be contiguous.
# number of tables need to be maintained for this system to operate)
,. 'ob Table- for each ?ob holds the si9e of the ?ob& the memory
location of the !age table.
. Page Table$ %or each active ?ob the !age & page %rame memory
address
0. Memory Map table$ for each page %rame its location and "hether
free or busy.
(ogical )ddress Is a reference to a memory location independent of the currentassignment of data to memory $ a translation must be made to a physical address before
memory access can be achieved. *Mov Reg,8192+
Physical )ddress Is an actual location in main memory
Page addressing
Memory address translation takes place at run time. Reading a "ord from
memory involves translating a virtual or logical address& consisting of a pagenumber and offset& into an actual physical address& consisting of a frame number
and offset. This process "ill make use of the !age Table entries.
'ogical address !hysical address
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!age :o Offset %rame :o Offset
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If the system used ,8 bits then it could utilise memory in this fashion)
,5 ,1 1
!age no isplacement
"ith this set up the system "ould have 0 pages *5 + each "ith 12=
bytes * ,,+
7ample If a logical address of 11,1,11111,1,1,1 "as encountered this "ill
represent offset 2 on page 5. The !age table "ould be accessed to see the
Mappingof page 5.
logical address
!hysical address !age Table
Static paging)
:o eternal fragmentation
%ied si9e pages
Internal fragmentation $ only on last page
:on- contiguous memory *page table+
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11,1, 11111,1,1,1
11,1, 11111,1,1
1,,,,
11,1,
1111,
111,,
,1,,,
,1,,, 11111,1,1
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!aging
'ets say memory is only ,12 bytes @ ,1 address locations.
# page frame si9e is 58 byte = .
'ogical address 11&1111&1111
page1
11&,,,,&,,,,
1,&1111&1111
page,
1,&,,,,&,,,,
,1&1111&1111
page
,1&,,,,&,,,,
,,&1111&1111
page0
,,&,,,,&,,,,
!age Table
1,
,,
11
,1
"here is logical address 11&1111&111,1
"here is ,,&1111&,,,,
1111&1111
frame1
,,,,&,,,,
1111&1111
1111&11,1
frame,
,,,,&,,,,
1111&,,,,
frame
frame0
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Segmentation *static+
The concept of segmentation is based on the common practice by programmers of
structuring their programs in modules-logical groupings of code. 3ith segmented
memory allocation& each ?ob is divided into several segments of different si9es& one for
each module "hich contains pieces that perform related functions. # subroutine is an
eample of one such logical group. This is fundamentally different from a paging
scheme& "hich divides the ?ob into several pages all of the same si9e each of "hich often
contains pieces from more than one program module.
# second important difference is that main memory is no longer divided into page
frames because the si9e of each segment is different - some are large and some are small.
Therefore& as "ith the dynamic partitions & memory is allocated in a dynamic manner.
3hen a program is compiled or assembled& the segments are set up according to the
programAs structural modules. 7ach segment is numbered and a Segment Map Table
*SMT+ is generated for each ?ob - it contains the segment numbers& their lengths& and
*"hen each is loaded into memory+ its location in memory.
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The system maintains three tables)
,. The ?ob table *as "ith static paging+
. The segment Map table list details about each ?ob *one for each ?ob+0. Memory Map Table *as before+.
'ike paging& the instructions "ithin each segment are ordered se/uentially& but thesegments need not be contiguous in memory. 3e only need to kno" "here each segment
is stored. The contents of the segments themselves are contiguous *in this scheme+. To
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access a specific location "ithin a segment "e can perform an operation similar to the
one used "ith paged memory management. The only difference is that "e "ork "ith
segments instead of pages.
The addressing scheme re/uires the segment number and the displacement "ithin that
segment& and& because the segments are of different si9es& the displacement must be
verified to make sure it isnAt outside of the segmentAs range.
# segmented address reference re/uires the follo"ing steps)
,. etract the segment number and the displacement from the logical address
. use the segment number to inde the segment table& to obtain the segment baseaddress and length.
0. check that the offset is not greater than the given lengthB if so an invalid address issignaled.
2. generate the re/uired physical address by adding the offset to the base address.
Main !oints)
The benefits of segmentation include modularity of programs and sharing and protection.
There is a maimum segment si9e that the programmer must be a"are of.
:o internal fragmentation
6ne/ual si9ed segments
:on $contiguous memory.
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page table present in memory *! bit+
"hether the page has been modified or not * M bit+
if the page has been referenced recently * R bit+
irtual-(ogical address
Page Table ntry
Page Fault
3hen a program tries to use a page "hich is not memory& a page fault occurs.
This is one of the reasons for a process to be suspended for I4O.
#lgorithm
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(ocality o! Re!erence
3ell structured programs obey the principle of locality of reference.3hat this means is
that the address references generated by a process tend to cluster "ithin narro" ranges
"hich are likely to be contained in a fe" pages. The implications of this is that the needs
of a process over a period of time can be satisfied by having a small number of residentpages *not necessarily ad?acent+. This situation leads to a relatively small number of page
faults. The set of pages that a process is currently using& at this stage is called its or/ingset. If the entire "orking set is in memory& the process "ill run "ithout incurring many
page faults until it moves into another eecution phase. #t different stages of the
processes eecution there "ill be different "orking sets in memory.
If the available memory is to small to hold the "orking set& the process "ill run slo"ly as
it incurs many page faults. It is possible that a situation can arise "here a page s"apped
out of memory can be needed almost immediately $ this can lead to a condition called
thrashing& "here the processor spends most of its time s"apping pages rather than
eecuting instructions.
In a multiprogramming system process are often moved to disk to let other processes
have a turn on the (!6. 3hen the process is again scheduled for running a /uestionarises as to "hat pages to bring into memory. Many systems try to keep track of the
"orking set of each process& in order that all the pages belonging to the set can be
brought in their entirety. This eliminates the numerous costly page faults that "ould
occur.
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Multi%(e0el Page Table Moti0ation$
The problem "ith page tables "as that they could take up too much memory to store them.
(onsider a process on a system "ith a 0 bit virtual address spaceF
It "ill be laid out as follo"s in its virtual space)
The program al"ays starts at virtual address 1.
The heap al"ays starts on then first page boundary after the end of the program.
The stack al"ays starts at the 2 D< mark and "orks its "ay do"n.
So ho big is the gap in most programs1
#t is huge.
2o many 3/b pages are being used in the abo0e process1
1( M) * ( +b 1( - 22/ * ( - 21/ 0. - 2 1/ $appro (-21/ (M)&
4hat does that say about most o! the 556page table entries !or this process1
!hey 'ill be empty.
So do e need to /eep the empty page table entries in memory1
3o, they 'ill never be used so 'hy %eep them in memory. 4ets 5ust %eep the one6s 'e need.
Multi%(e0el Page Table 7mplementation$
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# multi-level page table system *on a 1 bit system "ith 2kb pages+ "orks as follo"s)
The Cirtual address is no" divided slightly differently.
There are t"o page table indees
The first page inde is used to inde the outer page table.
7ach entry in the outer page table can possibly point to a second level page table.
The present bit in the outer page table is used to indicate if there is a second level page table forthis entry.
The second page inde is used to inde the second level page table pointed to by the outer page
table.
The entry of the second level page table might contain the page frame number of the desired page.
If the present bit of the second level page table indicates the presence or absence of a page in the
physical memory.
If the present bit is a , then the page frame number is contained in the entry.
If the present bit is a 1 then a page fault occurs and the virtual page must be brought into the
physical memory.
In a 0 bit system the virtual address might be broken up as follo"s)
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4hat si8e are the pages in this system1
!hey 'ould be (+b because the offset has 12 bits.
4hat is the si8e o! each second le0el page table1
7ach second level page table 'ill have 1/2( entries because the second #nde is 1/ bits.#f each entry is ( bytes as 'e assumed previously that ma%es each table (%b.
interesting that the second level page tables are eactly the same si9e as a page.
is it a coincidence or "as it done on purposeG
4hat is the si8e o! the outer page table.
!he same sie for the same reasons.
2o much memory is represented by each entry in a second le0el page table1
7ach entry points to a single page that is (%b.
2o much memory does each second le0el page table represent1
7ach table points to up to 1/2( pages of (%b each so ( M).2o many entries in the outer page table ould be used in the example process
!rom page 91
!he program is 8 M) so it needs 2 entries, the heap is ( M) so that is another entry and
the stac% is 2 M) 'hich needs a full entry.
4hat about the second le0el page table !or the outer page table entry !or the stac/,
is it !ull1
3o it 'ill be half empty.
So by using a level page table& for our eample& "e only need to keep 5 sub-tables in
memory.
The outer page table.
2 inner page tables.
Therefore& "hile this eample "ould have re/uired 2 M< of page table space for a single
level page table it only re/uires 1 < "hen a level page table is used.
4hat is the maximum amount o! memory that the to le0el page table could ta/e
up1
( +b more than the single level page table. #f every second level page table is full thenthere 'ill be ( M) 'orth of second level page tables and one outer page table.
So in that "orst case scenario the t"o level page table doesnAt help.
'uckily programs that are that large are very rare so most of the time using a t"o levelpage table is very helpful.
It is also possible to use 0 or more level page tables.
The :ther Problem 4ith Page Tables$
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So paging solved the problem of not being able to run enough processes at a given time
or not being able to run really large processes.
Multi-level page tables solved the problem of the page table taking up too much memory.
'etAs consider the follo"ing instruction on a machine that doesnAt use any virtual
memory)
'O#
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Memory accesses take time.
# single level page table makes the machine t"ice as slo" as it "ould be "ithout the
virtual memory.
# t"o level page table makes the machine three times as slo" as it "ould be "ithout the
virtual memory.
This is a big problem and no one ould use M i! it couldn;t be !ixed.
Translation (oo/%)side "u!!ers$
The follo"ing sho" the use of a translation look-aside buffer.
The Translation 'ook-#side
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The left column of the associative memory is the key value. It holds the virtual page number.
The right column is the value of the associated memory cell and holds the physical page frame that
contains the virtual page.
3hen the associative memory is presented "ith a key value it looks at all of the cells in the
memory simultaneously for the key value.
If the key value is found the value in the associated memory cell is output.
3hen a memory re/uest is made the page indices are sent simultaneously to the page translationsystem *could be a single level or a multi-level paging system+ and to the Translation 'ook-#side
buffer *T'14,1 rule of thumb.
# process spends >1J of its time in ,1J of its code.
It is not clear that that also holds for a programAs data. *
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4hat does that do !or us as !ar as the T(" goes1
Well, given that about 9/> of the references 'ill be to 1/> of the pages 'e
'ould do very 'ell 'ith the !4) if it could hold those 1/> of the pages that are
used most often.
,1J of ,111 is ,11 so "e canAt /uite hold all ,11 page translations in the T'
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.
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Page Si8e
The page si9e of a system has a significant impact on overall performance.
Internal fragmentation $ smaller page si9e less internal fragmentation less internal
fragmentation better use of main memory.
Smaller page si9e $ more pages per process& larger page tables. In multiprogrammingenvironments this means page tables may be in virtual memory $ this may mean a double
page fault one to bring in re/uired portion of page table one to bring the re/uired process
page.
The graph belo" sho"s the effect on page faults of t"o variables one the page si9e and the second
the number of frames allocated to a process.
The leftmost graph sho"s that as page si9e increases that number of page fault
correspondingly increase. This is because the principle of locality of reference is
"eakened. 7ventually as the page si9e approaches the si9e of the process the faults begin
to decrease.
On the right the graph sho"s that for fied page si9e the faults decrease as the number of
pages in memory gro"s. Thus& a soft"are policy *the amount of memory to allocated toeach process+ affects a hard"are design decision *page si9e+.
Of course the actual si9e of physical si9e of memory is important. More memory should
reduce page faults. Ho"ever as main memory is gro"ing the address space used by
applications is also gro"ing reducing performance and modern programming techni/ues
such as Ob?ect-Oriented programming *"hich encourages the use of many small program
and data modules "ith references scattered over a large number of ob?ects+ reduce the
locality of reference "ithin a process.
# small page si9e reduces internal fragmentation.
# large page si9e reduces the number of pages needed& thereby reducing the
si9e of the page table *page table takes up less memory+.
# large page si9e reduces the overhead in s"apping pages in or out. In
addition to the processing time re/uired to a handle a page fault &
transferring , blocks of data from disk is almost t"ice as long as
transferring , block .
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# smaller page si9e& "ith its finer resolution& is better able to target the
processEs locality of references. This reduces the amount of unused
information copied back and forth bet"een memory and s"apping storage.
It also reduces the amount of unused information stored in main memory&making more memory available for useful purposes.
Page Replacement
3hen a page fault occurs and all frames are occupied a decision must be made as to "hat
page to s"ap out. The page replacement algorithmis used to choose "hat page should
be s"apped.
:ote that if there is no !ree !ramea busy one must be s"apped out and the ne" ones"apped in. This means a double transfer $ "hich takes time. Ho"ever if "e can find a
busy page that has not been modified since it "as loaded to disk then it does not need to
be "ritten back out. The modi!ied bitin the page table entry indicates "hether a page
has been modified or not. Thus the I4O overhead is cut by half if the page is unmodified.
Page Replacement )lgorithm
:ptimal ReplacementThe best policy is one "hich s"aps out a page that "ill not beused for the longest period of time. This "ill give the lo"est possible page fault rate for a
fied number of frames.
(onsider the follo"ing string of pages "hich are to be processed.
;&1&,&&1&0&1&2&&0&1&0&&,&&1&,&;&1&,
If "e assume an address space of three frames& the pattern of page faults is sho"n belo".
1 pages to be processed
; 1 , 1 0 1 2 0 1 0 , 1 , ; 1 ,
!age %rames
Optimal page replacement
6nfortunately the optimum scheme is impossible to implement as "e need to kno" in advance "hat pages"ill be demanded. Ho"ever it can be used as a standard to ?udge other schemes by.
First in First out
%i%o uses the oldest page first . 3e do not need to kno" ho" long it has been in memory if the pages are
placed in a %I%I /ueue. This is easy to implement but suffers from being to simple and does not al"ays give
good results.
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(east Recently Used
#n alternative scheme is to replace 'east recently 6sed pages. It replaces the page that has not
been used for the longest period of time.
To see ho" this "orks "e use the same string ; 1 , 1 0 1 2 as before.
#ssume that page 2 is re/uested. #t this stage& pages 1&&0 are in memory.
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#nother approimation of 'R6 is called aging. #ging is achieved by a adding an etra byte to a
page table entry. 3hen a page is accessed& the hard"are sets the most significant bit in the
reference byte. !eriodically& as "ith &RU above& the contents of this byte is ad?usted by shifting
all the bits right. # page "ith the lo"est value in its reference byte is selected for removal. #s "ith
:R6& the operating system may pick any page from among all the pages "ith the lo"est value.
Over the years designers have tried to implement algorithms that approimate to the performance
of 'R6 but "ithout the overheads. Many of these are referred to as the cloc/ policy.
The simplest form of clock policy re/uires the association of an additional bit "ith each frame&
referred to as the reference bit. 3hen a page is first loaded into a frame in memory& the reference
bit for that frame is set to ,. 3hen the page is subse/uently referenced *after the reference that
generated the page fault+& its reference bit is set to ,. %or , the page replacement algorithm& the set
of frames that are candidates for replacement is considered to be a circular buffer& "ith "hich a
pointer is associated. 3hen a page is replaced& the pointer is set to indicate the net frame in the
buffer. 3hen it comes time to replace a page& the operating system scans the buffer to find a frame
"ith a use bit set to 9ero. 7ach time it encounters a frame "ith a use bit of ,& it resets that bit to9ero. If any of the frames in the buffer have a use bit of 9ero at the beginning of this process& the
first such frame encountered is chosen for replacement. If all of the frames have a use bit of ,&
then the pointer "ill make one complete cycle through the buffer& set ting all the use bits to 9ero&
and stop at its original position& replacing the page in that frame. 3e can see that this policy is
similar to %I%O& ecept that& in the clock policy& any frame "ith a use bit of , is passed over by the
algorithm. The policy is referred to as a clock policy because "e can visuali9e the page frames as
laid out in a circle. # number of operating systems have employed some variation of this simple
clock policy *for eample& Multics+.
The figure belo" provides an eample of the simple clock policy mechanism. # circular buffer of
n? , main memory frames is available for page replacement. Kust prior to the replacement of a
page from the buffer "ith incoming page ;;& the net frame pointer points at frame & "hich
contains page 25. The clock policy is no" eecuted. , in frame 0 is not replacedB its use bit is set to 9ero and the pointer advances. In
the net frame& frame 2& the use bit is set to O. Therefore& page 558 is replaced "ith page ;;. The
use bit is set to , for this frame and the pointer advances to frame 5& completing the page
replacement procedure.
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irtual Segmented systems
In simple segmented systems previously considered& all the segments of an active process "ereresident in real memory. In a virtual segmented scheme& the segments of a process are loaded
independently and hence may be stored in any available memory positions or may not be inmemory at all
Cirtual segmented systems have certain advantages)
facilitates the handling of gro"ing data structures. 3ith segmented virtual memory&
the data structure can be assigned its o"n segment and the O! system "ill epand
and shrink the segment as needed.
It lends itself to protection and sharing.
logical structure of the process is reflected in the physical structure "hich reinforces
the principle of locality.
The segmented address translation process sho"n belo"& is similar to the simple segmentation scheme&
ecept that& firstly& the segment table entry& usually called asegment descriptor, must no" have a number
of additional bits *see belo"+ and secondly& the logical address is no" a virtual address typically much
larger than the real address. The diagram also sho"s the presence of asegment table register "hich points
to the start of the segment table for he current process. The segmentation virtual address consists of t"o
components& $s, d+. The value indees the segment table for the appropriate descriptor& "hile the d value
gives the displacement "ithin the segment. The typical contents of a segment descriptor are listed belo")
base address of segment
segment limitB ie si9e of segment& used to detect addressing errors.
segment in memory bitB indicates "hether segment is currently in real memory
segment used bitB indicates "hether segment has been accessed since previous reset of this bit. 6sed to monitor usage of segment.
protection bitsB specify read& "rite and eecution access of segment.
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#ddress translation in a paged segmented system combines the translations of the individual
paging and segmentation systems. # memory reference is specified by a three element value such
as)
*s&p, d&
'here@ s is the segment numberp is the page "ithin this segment
d is the displacement "ithin this page
The figure belo" sho"s the complete translation process. The segment number& S& is used as an
inde to a segment table& as before. The segment descriptor& among other things& contains a pointer
to a page table for that segmentB note that each segment is treated as an independent address space&
each "ith its o"n page table. The page number&p, is used to inde this page table "hich translates
the virtual page numberp to a physical page number. The displacement d is then used to locate the
eact address "ithin this physical page frame.
# paged-segmented system is clearly /uite comple& but provides a po"erful environment for
modem computers& giving the programmer control over process structure "hile efficiently
managing memory space. #mong current systems using such a scheme are Microsoft 3indo"s&
OS4 and I
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Segmentation lends itself to the implementation ofprotection and sharing policies. To
achieve sharing& it is possible for a segment to be references in the segment tables ofmore than one process. This mechanism is available in a paging system. Ho"ever& in thiscase the page structure of programs and data is not visible to the programmer& making thespecification of protection and sharing more difficult to implement
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irtual memory ad0antages
# ?obEs si9e is no longer restricted to the si9e of main memory *or the free space
"ithin main memory+.
Memory is used more efficiently because the only sections of a ?ob stored in memoryare those needed immediately "hile those not needed remain in secondary storage.
It allo"s unlimited amounts of multiprogramming.
It eliminates eternal fragmentation and minimi9es internal fragmentation by
combined segmentation and paging.
It allo"s for sharing of code and data
These far out"eigh the disadvantages)
Increased hard"are costs
Increased overheads for handling paging interrupts.
Increased soft"are compleity to prevent thrashing.