MEMORY & I/O ADDRESSING

8051

Program Memory

Stores program to be executed

Implemented by EPROM

Further divided into on chip (internal )- 4KB and external- 64 KB

Memory Addressing

• ROM ( READ ONLYMEMORY )• 8051 can address 4K bytes on chip

memory – map range 0000 TO 0FFFh• IT can address 64 KB external memory map range – 0000 TO FFFFh• Memory map of internal and external

program overlaps• The internal and external ROM

distinguished by PSEN’ signal• ROM less version of 8051 – PSEN’ used to

access external memory

PROGRAM MEMORY - ROM

ROM - program

• EXTERNAL RAM• 8051 supports 64KB external data

memory- range – 0000 to FFFFh• Accessed by DPTR• 8051 generates RD’, WR’ during

external access .• CS’ can be derived from address lines

DATA MEMORY - RAM

•

ONCHIP (INTERNAL) RAM

ONCHIP RAM

SFR

RANGE:80h TO FFh

Direct Addressing

only

Direct & Indirect

addressing

RANGE :00h TO 7Fh

128 BYTES RAM BLOCK

RAM

INTERNAL RAM

Registers

0706050403020100

R7R6R5R4R3R2R1R0

0F

08

17

10

1F

18

Bank 3

Bank 2

Bank 1

Bank 0

Four Register BanksEach bank has R0-R7Selectable by psw.2,3

Bit Addressable Memory20h – 2Fh (16 locations X 8-bits = 128 bits)

7F 78

1A

10

0F 08

07 06 05 04 03 02 01 00

27

26

25

24

23

22

21

20

2F

2E

2D

2C

2B

2A

29

28

Bit addressing:mov C, 1Ahormov C, 23h.2

Special Function Registers

DATA registers

CONTROL registersTimersSerial portsInterrupt systemAnalog to Digital converterDigital to Analog converterEtc.

Addresses 80h – FFh

Direct Addressing used to access SPRs

I/O ADDRESSING

I/O INTERFACING

• External i/o devices are interfaced as memory mapped i/o devices

• Devices treated as external memory locations and consume external memory address

• The address of external program and data memory may overlap