MCP6L91/1R/2/4 10 MHz, 850 uA Op Amps Data...

MCP6L91/1R/2/410 MHz, 850 µA Op Amps

Features:• Available in SOT-23-5 Package• Gain Bandwidth Product: 10 MHz (typical)• Rail-to-Rail Input/Output• Supply Voltage: 2.4V to 6.0V• Supply Current: IQ = 0.85 mA/Amplifier (typical)• Extended Temperature Range: -40°C to +125°C• Available in Single, Dual and Quad Packages

Typical Applications:• Portable Equipment• Photodiode Amplifier• Analog Filters• Notebooks and PDAs• Battery-Powered Systems

Design Aids:• SPICE Macro Model• FilterLab® Software• Microchip Advanced Part Selector (MAPS)• Analog Demonstration and Evaluation Boards• Application Notes

Typical Application

Description:The Microchip Technology Inc. MCP6L91/1R/2/4 familyof operational amplifiers (op amps) provides widebandwidth for the current. The input bias currents andvoltage ranges make it easier to fit into manyapplications.

This family has a 10 MHz Gain Bandwidth Product(GBWP) and a low 850 µA per amplifier quiescentcurrent. These op amps operate on supply voltagesbetween 2.4V and 6.0V, with rail-to-rail input and outputswing. They are available in the extended temperaturerange.

Package Types

Low-pass Filter

R1

VIN VOUT

R23.01 k 6.81 k

MCP6L91

C1120 nF

R39.31 k

C327 nF

C212 nF

MCP6L91SOT-23-5

MCP6L92SOIC, MSOP

VIN+

VSS

VIN–

1

2

3

5

4

VDDVOUT

VINA+VINA–

VSS

1234

8765

VOUTA VDD

VOUTB

VINB–VINB+

MCP6L94SOIC, TSSOP

VINA+VINA–

VDD

1234

14131211

VOUTA VOUTD

VIND–

VIND+VSS

VINB+ 5 10 VINC+MCP6L91RSOT-23-5

VIN+

VDD

VIN–

1

2

3

5

4

VSSVOUT

VINB– 6 9 VINC–

VOUTB 7 8 VOUTC

MCP6L91SOIC, MSOP

VIN+VIN–

VSS

1234

8765

NC NC

VDD

VOUTNC

2009-2011 Microchip Technology Inc. DS22141B-page 1

MCP6L91/1R/2/4
NOTES:
DS22141B-page 2 2009-2011 Microchip Technology Inc.

MCP6L91/1R/2/4

1.0 ELECTRICAL CHARACTERISTICS

1.1 Absolute Maximum Ratings †VDD – VSS .......................................................................7.0VCurrent at Input Pins ....................................................±2 mAAnalog Inputs (VIN+, VIN–) †† ....... VSS – 1.0V to VDD + 1.0VAll Inputs and Outputs ................... VSS – 0.3V to VDD + 0.3VDifference Input Voltage ...................................... |VDD – VSS|Output Short Circuit Current ................................ContinuousCurrent at Output and Supply Pins ............................±30 mAStorage Temperature ...................................-65°C to +150°CMax. Junction Temperature ........................................ +150°CESD protection on all pins (HBM, MM) 4 kV, 400V

† Notice: Stresses above those listed under “AbsoluteMaximum Ratings” may cause permanent damage to thedevice. This is a stress rating only and functional operation ofthe device at those or any other conditions above thoseindicated in the operational listings of this specification is notimplied. Exposure to maximum rating conditions for extendedperiods may affect device reliability.†† See Section 4.1.2 “Input Voltage and Current Limits”.

1.2 Specifications

TABLE 1-1: DC ELECTRICAL SPECIFICATIONSElectrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VSS, VOUT VDD/2, VL = VDD/2 and RL = 10 k to VL (refer to Figure 1-1).

Parameters Sym Min(Note 1) Typ Max

(Note 1) Units Conditions

Input OffsetInput Offset Voltage VOS -4 ±1 +4 mVInput Offset Voltage Drift VOS/TA — ±1.3 — µV/°C TA= -40°C to+125°CPower Supply Rejection Ratio PSRR — 89 — dBInput Current and ImpedanceInput Bias Current IB — 1 — pA

Across Temperature IB — 50 — pA TA= +85°CAcross Temperature IB — 2000 — pA TA= +125°C

Input Offset Current IOS — ±1 — pACommon Mode Input Impedance ZCM — 1013||6 — ||pFDifferential Input Impedance ZDIFF — 1013||3 — ||pFCommon ModeCommon Mode Input Voltage Range VCMR -0.3 — 5.3 VCommon Mode Rejection Ratio CMRR — 91 — dB VCM = -0.3V to 5.3VOpen Loop GainDC Open Loop Gain (large signal) AOL — 105 — dB VOUT = 0.2V to 4.8VOutputMaximum Output Voltage Swing VOL — — 0.020 V G = +2, 0.5V Input Overdrive

VOH 4.980 — — V G = +2, 0.5V Input OverdriveOutput Short Circuit Current ISC — ±25 — mAPower SupplySupply Voltage VDD 2.4 — 6.0 VQuiescent Current per Amplifier IQ 0.35 0.85 1.35 mA IO = 0Note 1: For design guidance only; not tested.


MCP6L91/1R/2/4

1.3 Test CircuitThe circuit used for most DC and AC tests is shown inFigure 1-1. This circuit can independently set VCM andVOUT; see Equation 1-1. Note that VCM is not thecircuit’s common mode voltage ((VP + VM)/2), and thatVOST includes VOS plus the effects (on the input offseterror, VOST) of temperature, CMRR, PSRR and AOL.

EQUATION 1-1:

FIGURE 1-1: AC and DC Test Circuit for Most Specifications.

TABLE 1-2: AC ELECTRICAL SPECIFICATIONSElectrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT VDD/2, VL = VDD/2, RL = 10 k to VL and CL = 60 pF (refer to Figure 1-1).

Parameters Sym Min Typ Max Units ConditionsAC ResponseGain Bandwidth Product GBWP — 10 — MHzPhase Margin PM — 65 — ° G = +1Slew Rate SR — 7 — V/µsNoiseInput Noise Voltage Eni — 2.5 — µVP-P f = 0.1 Hz to 10 HzInput Noise Voltage Density eni — 9.4 — nV/Hz f = 10 kHzInput Noise Current Density ini — 3 — fA/Hz f = 1 kHz

TABLE 1-3: TEMPERATURE SPECIFICATIONSElectrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +2.4V to +6.0V, VSS = GND.

Parameters Sym Min Typ Max Units ConditionsTemperature RangesSpecified Temperature Range TA -40 — +125 °C

Operating Temperature Range TA -40 — +125 °C (Note 1)

Storage Temperature Range TA -65 — +150 °C

Thermal Package ResistancesThermal Resistance, 5L-SOT-23 JA — 256 — °C/WThermal Resistance, 8L-SOIC (150 mil) JA — 163 — °C/WThermal Resistance, 8L-MSOP JA — 206 — °C/WThermal Resistance, 14L-SOIC JA — 120 — °C/WThermal Resistance, 14L-TSSOP JA — 100 — °C/WNote 1: Operation must not cause TJ to exceed Maximum Junction Temperature specification (150°C).

GDM RF RG=

VCM VP VDD 2+ 2=

VOUT VDD 2 VP VM– VOST 1 GDM+ + +=

Where:

GDM = Differential Mode Gain (V/V)VCM = Op Amp’s Common Mode

Input Voltage(V)

VOST = Op Amp’s Total Input OffsetVoltage

(mV)

VOST VIN– VIN+–=

VDD

MCP6L9X

RG RF

VOUTVM

CB2

CLRL

VL

CB1

100 k100 k

RG RF

VDD/2VP

100 k100 k

60 pF10 k

1 µF100 nF

VIN–

VIN+

CF6.8 pF

CF6.8 pF


MCP6L91/1R/2/4

2.0 TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF.

FIGURE 2-1: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 2.4V.

FIGURE 2-2: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V.

FIGURE 2-3: Input Offset Voltage vs. Output Voltage.

FIGURE 2-4: Input Common Mode Range Voltage vs. Ambient Temperature.

FIGURE 2-5: CMRR, PSRR vs. Ambient Temperature.

FIGURE 2-6: CMRR, PSRR vs. Frequency.

Note: The graphs and tables provided following this note are a statistical summary based on a limited number ofsamples and are provided for informational purposes only. The performance characteristics listed hereinare not tested or guaranteed. In some graphs or tables, the data presented may be outside the specifiedoperating range (e.g., outside specified power supply range) and therefore outside the warranted range.

-1.0-0.8-0.6-0.4-0.20.00.20.40.60.81.0

-0.5 0.0

0.5

1.0

1.5

2.0

2.5

3.0

Common Mode Input Voltage (V)

Inpu

t Off

set V

olta

ge (m

V)

VDD = 2.4VRepresentative Part

-40°C+25°C+85°C+125°C

-1.0-0.8-0.6-0.4-0.20.00.20.40.60.81.0

-0.5 0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

Common Mode Input Voltage (V)

Inpu

t Offs

et V

olta

ge (m

V)

VDD = 5.5VRepresentative Part

+125°C+85°C+25°C-40°C

-0.5-0.4-0.3-0.2-0.10.00.10.20.30.40.5

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5Output Voltage (V)

Inpu

t Offs

et V

olta

ge (m

V) VDD = 1.8V

VDD = 5.5V

Representative Part

-0.5-0.4-0.3-0.2-0.10.00.10.20.30.40.5

-50 -25 0 25 50 75 100 125Ambient Temperature (°C)

Com

mon

Mod

e R

ange

(V)

VCMRH – VDD

VCMRL – VSS

One Wafer Lot

70

75

80

85

90

95

100


CM

RR

, PSR

R (d

B)

PSRR (VCM = VSS)

CMRR (VCM = VCMRL to VCMRH)

20

30

40

50

60

70

80

90

100

1.E+01 1.E+02 1.E+03 1.E+04 1.E+05Frequency (Hz)

CM

RR

, PSR

R (d

B)

PSRR+

CMRR

PSRR–

10 100 1k 10k 100k


MCP6L91/1R/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF.
FIGURE 2-7: Measured Input Current vs. Input Voltage (below VSS).

FIGURE 2-8: Open-Loop Gain, Phase vs. Frequency.

FIGURE 2-9: Input Noise Voltage Density vs. Frequency.

FIGURE 2-10: The MCP6L91/1R/2/4 Show No Phase Reversal.

FIGURE 2-11: Quiescent Current vs. Power Supply Voltage.

FIGURE 2-12: Output Short Circuit Current vs. Power Supply Voltage.

1.E-121.E-111.E-101.E-091.E-081.E-071.E-061.E-051.E-041.E-031.E-02

-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0Input Voltage (V)

Inpu

t Cur

rent

Mag

nitu

de (A

)

+125°C+85°C+25°C-40°C

10m1m

100µ10µ1µ

100n10n1n

100p10p

1p

-20

0

20

40

60

80

100

120

1.E+00

1.E+01

1.E+02

1.E+03

1.E+04

1.E+05

1.E+06

1.E+07

1.E+08Frequency (Hz)

Ope

n-Lo

op G

ain

(dB

)

-210

-180

-150

-120

-90

-60

-30

0

Ope

n-Lo

op P

hase

(°)

1 10 100 10k 100k 1M 100M

Phase

Gain

1k 10M

1

10

100

1,000

1.E-01 1.E+00

1.E+01

1.E+02

1.E+03

1.E+04

1.E+05Frequency (Hz)

Inpu

t Noi

se V

olta

ge D

ensi

ty

(nV/H

z)

0.1 101 100 10k1k 100k

-1

0

1

2

3

4

5

6

0.E+00 1.E-03 2.E-03 3.E-03 4.E-03 5.E-03 6.E-03 7.E-03 8.E-03 9.E-03 1.E-02

Time (1 ms/div)

Inpu

t, O

utpu

t Vol

tage

s (V

)

G = +2 V/VVIN

VOUT

0.00.10.20.30.40.50.60.70.80.91.01.11.2

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0Power Supply Voltage (V)

Qui

esce

nt C

urre

ntpe

r am

plifi

er (m

A)

+125°C+85°C+25°C-40°C

-40

-30

-20

-10

0

10

20

30

40

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5Power Supply Voltage (V)

Shor

t Circ

uit C

urre

nt (m

A)

-40°C+25°C+85°C

+125°C


MCP6L91/1R/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF.
FIGURE 2-13: Ratio of Output Voltage Headroom to Output Current vs. Output Current.

FIGURE 2-14: Small Signal, Noninverting Pulse Response.

FIGURE 2-15: Large Signal, Noninverting Pulse Response.

FIGURE 2-16: Slew Rate vs. Ambient Temperature.

FIGURE 2-17: Output Voltage Swing vs. Frequency.

0

5

10

15

20

25

30

1.E-04 1.E-03 1.E-02Output Current Magnitude (A)

Rat

io o

f Out

put H

eadr

oom

to O

utpu

t Cur

rent

(mV/

mA

)

100µ 10m1m

VDD – VOH

IOUT

VOL – VSS

-IOUT

-0.04

-0.03

-0.02

-0.01

0.00

0.01

0.02

0.03

0.04

0.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-06 2.E-06

Time (200 ns/div)

Out

put V

olta

ge (1

0 m

V/di

v)

G = +1 V/V

0.00.51.01.52.02.53.03.54.04.55.0

0.E+00 1.E-06 2.E-06 3.E-06 4.E-06 5.E-06 6.E-06 7.E-06 8.E-06 9.E-06 1.E-05

Time (1 µs/div)

Out

put V

olta

ge (V

)

G = +1 V/V

0123456789

101112


Slew

Rat

e (V

/µs)

VDD = 5.5V

VDD = 2.4V

Rising Edge

Falling Edge

0.1

1

10

1.E+04 1.E+05 1.E+06 1.E+07Frequency (Hz)

Out

put V

olta

ge S

win

g (V

P-P) VDD = 5.5V

10k 100k 1M 10M

VDD = 2.4V


MCP6L91/1R/2/4
NOTES:

MCP6L91/1R/2/4

3.0 PIN DESCRIPTIONSDescriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

3.1 Analog OutputsThe analog output pins (VOUT) are low-impedancevoltage sources.

3.2 Analog InputsThe noninverting and inverting inputs (VIN+, VIN–, …)are high-impedance CMOS inputs with low biascurrents.

3.3 Power Supply PinsThe positive power supply (VDD) is 2.4V to 6.0V higherthan the negative power supply (VSS). For normaloperation, the other pins are between VSS and VDD.

Typically, these parts are used in a single (positive)supply configuration. In this case, VSS is connected toground and VDD is connected to the supply. VDD willneed bypass capacitors.

MCP6L91 MCP6L91R MCP6L92 MCP6L94Symbol Description

SOT-23-5 MSOP-8, SOIC-8, SOT-23-5 MSOP-8,

SOIC-8,SOIC-14,

TSSOP-14

1 6 1 1 1 VOUT, VOUTA Output (op amp A)4 2 4 2 2 VIN–, VINA– Inverting Input (op amp A)3 3 3 3 3 VIN+, VINA+ Noninverting Input (op amp A)5 7 2 8 4 VDD Positive Power Supply— — — 5 5 VINB+ Noninverting Input (op amp B)— — — 6 6 VINB– Inverting Input (op amp B)— — — 7 7 VOUTB Output (op amp B)— — — — 8 VOUTC Output (op amp C)— — — — 9 VINC– Inverting Input (op amp C)— — — — 10 VINC+ Noninverting Input (op amp C)2 4 5 4 11 VSS Negative Power Supply— — — — 12 VIND+ Noninverting Input (op amp D)— — — — 13 VIND– Inverting Input (op amp D)— — — — 14 VOUTD Output (op amp D)— 1, 5, 8 — — — NC No Internal Connection


MCP6L91/1R/2/4
NOTES:

MCP6L91/1R/2/4

4.0 APPLICATION INFORMATIONThe MCP6L91/1R/2/4 family of op amps is manufac-tured using Microchip’s state of the art CMOS process.It is designed for low cost, low power and general pur-pose applications. The low supply voltage, lowquiescent current and wide bandwidth makes theMCP6L91/1R/2/4 ideal for battery-powered applica-tions.

4.1 Rail-to-Rail Inputs

4.1.1 PHASE REVERSALThe MCP6L91/1R/2/4 op amps are designed toprevent phase inversion when the input pins exceedthe supply voltages. Figure 2-10 shows an inputvoltage exceeding both supplies without any phasereversal.

4.1.2 INPUT VOLTAGE AND CURRENT LIMITS

In order to prevent damage and/or improper operationof these amplifiers, the circuit they are in must limit thecurrents (and voltages) at the input pins (seeSection 1.1 “Absolute Maximum Ratings †”).Figure 4-1 shows the recommended approach toprotecting these inputs. The internal ESD diodesprevent the input pins (VIN+ and VIN–) from going toofar below ground, and the resistors R1 and R2 limit thepossible current drawn out of the input pins. Diodes D1and D2 prevent the input pins (VIN+ and VIN–) fromgoing too far above VDD, and dump any currents ontoVDD.

FIGURE 4-1: Protecting the Analog Inputs.A significant amount of current can flow out of theinputs (through the ESD diodes) when the commonmode voltage (VCM) is below ground (VSS); seeFigure 2-7. Applications that are high-impedance mayneed to limit the usable voltage range.

4.1.3 NORMAL OPERATIONThe input stage of the MCP6L91/1R/2/4 op amps usetwo differential CMOS input stages in parallel. Oneoperates at low common mode input voltage (VCM),while the other operates at high VCM. With thistopology, and at room temperature, the deviceoperates with VCM up to 0.3V above VDD and 0.3Vbelow VSS (typical at 25°C).

The transition between the two input stages occurswhen VCM = VDD – 1.1V. For the best distortion andgain linearity, with noninverting gains, avoid this regionof operation.

4.2 Rail-to-Rail OutputThe output voltage range of the MCP6L91/1R/2/4 opamps is VDD – 20 mV (minimum) and VSS + 20 mV(maximum) when RL = 10 k is connected to VDD/2and VDD = 5.0V. Refer to Figure 2-13 for more informa-tion.

4.3 Capacitive LoadsDriving large capacitive loads can cause stabilityproblems for voltage feedback op amps. As the loadcapacitance increases, the feedback loop’s phasemargin decreases and the closed-loop bandwidth isreduced. This produces gain peaking in the frequencyresponse, with overshoot and ringing in the stepresponse.

When driving large capacitive loads with these opamps (e.g., > 100 pF when G = +1), a small seriesresistor at the output (RISO in Figure 4-2) improves thefeedback loop’s stability by making the output loadresistive at higher frequencies; the bandwidth willusually be decreased.

FIGURE 4-2: Output Resistor, RISO stabilizes large capacitive loads.Bench measurements are helpful in choosing RISO.Adjust RISO so that a small signal step response (seeFigure 2-14) has reasonable overshoot (e.g., 4%).

V1

MCP6L9XR1

VDD

D1

R1 >VSS – (minimum expected V1)

2 mA

R2 >VSS – (minimum expected V2)

2 mA

V2R2

D2

R3

RISOVOUT

CLMCP6L9X

RFRG

RN


MCP6L91/1R/2/4
4.4 Supply BypassWith this family of operational amplifiers, the powersupply pin (VDD for single supply) should have a localbypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mmfor good high-frequency performance. It also needs abulk capacitor (i.e., 1 µF or larger) within 100 mm toprovide large, slow currents. This bulk capacitor can beshared with other nearby analog parts.
4.5 Unused Op AmpsAn unused op amp in a quad package (e.g., MCP6L94)should be configured as shown in Figure 4-3. Thesecircuits prevent the output from toggling and causingcrosstalk. Circuit A sets the op amp at its minimumnoise gain. The resistor divider produces any desiredreference voltage within the output voltage range of theop amp; the op amp buffers that reference voltage.Circuit B uses the minimum number of componentsand operates as a comparator, but it may draw morecurrent.

FIGURE 4-3: Unused Op Amps.

4.6 PCB Surface LeakageIn applications where low input bias current is critical,printed circuit board (PCB) surface leakage effectsneed to be considered. Surface leakage is caused byhumidity, dust or other contamination on the board.Under low humidity conditions, a typical resistancebetween nearby traces is 1012. A 5V difference wouldcause 5 pA of current to flow; this is greater than thisfamily’s bias current at 25°C (1 pA, typical).

The easiest way to reduce surface leakage is to use aguard ring around sensitive pins (or traces). The guardring is biased at the same voltage as the sensitive pin.Figure 4-4 is an example of this type of layout.

FIGURE 4-4: Example Guard Ring Layout.1. Inverting Amplifiers (Figure 4-4) and Trans-

impedance Gain Amplifiers (convert current tovoltage, such as photo detectors).a) Connect the guard ring to the noninverting

input pin (VIN+); this biases the guard ringto the same reference voltage as the opamp’s input (e.g., VDD/2 or ground).

b) Connect the inverting pin (VIN–) to the inputwith a wire that does not touch the PCB sur-face.

2. Noninverting Gain and Unity-Gain Buffer.a) Connect the guard ring to the inverting input

pin (VIN–); this biases the guard ring to thecommon mode input voltage.

b) Connect the noninverting pin (VIN+) to theinput with a wire that does not touch thePCB surface.

4.7 Application Circuit

4.7.1 ACTIVE LOW-PASS FILTERThe MCP6L91/1R/2/4 op amp’s low input noise andgood output current drive make it possible to designlow noise filters. Reducing the resistors’ values alsoreduces the noise and increases the frequency atwhich parasitic capacitances affect the response.These trade-offs need to be considered when selectingcircuit elements.

Figure 4-5 shows a third-order Chebyshev filter with a1 kHz bandwidth, 0.2 dB ripple and a gain of +1 V/V.The component values were selected using Micro-chip’s FilterLab® software. Resistor R3 was reduced invalue by increasing C3 in FilterLab.

FIGURE 4-5: Chebyshev Filter.

VDD

VDD

¼ MCP6L94 (A) ¼ MCP6L94 (B)

R1

R2

VDD

VREF

VREF VDDR2

R1 R2+------------------=

Guard Ring VIN– VIN+

R1

VIN VOUT

R23.01 k 6.81 k

MCP6L91

C1120 nF

R39.31 k

C327 nF

C212 nF


MCP6L91/1R/2/4

5.0 DESIGN AIDSMicrochip provides the basic design aids needed forthe MCP6L91/1R/2/4 family of op amps.

5.1 SPICE Macro ModelThe latest SPICE macro model for the MCP6L91/1R/2/4op amp is available on the Microchip web site atwww.microchip.com. The model was written and testedin official Orcad (Cadence) owned PSPICE. For othersimulators, translation may be required.

The model covers a wide aspect of the op amp'selectrical specifications. Not only does the model covervoltage, current, and resistance of the op amp, but italso covers the temperature and noise effects on thebehavior of the op amp. The model has not beenverified outside of the specification range listed in theop amp data sheet. The model behaviors under theseconditions cannot be ensured to match the actual opamp performance.

Moreover, the model is intended to be an initial designtool. Bench testing is a very important part of anydesign and cannot be replaced with simulations. Also,simulation results using this macro model need to bevalidated by comparing them to the data sheet specifi-cations and characteristic curves.

5.2 FilterLab® SoftwareMicrochip’s FilterLab® software is an innovativesoftware tool that simplifies analog active filter (usingop amps) design. Available at no cost from the Micro-chip web site at www.microchip.com/filterlab, the Filter-Lab design tool provides full schematic diagrams of thefilter circuit with component values. It also outputs thefilter circuit in SPICE format, which can be used withthe macro model to simulate actual filter performance.

5.3 Microchip Advanced Part Selector (MAPS)

MAPS is a software tool that helps efficiently identifyMicrochip devices that fit a particular design require-ment. Available at no cost from the Microchip web siteat www.microchip.com/maps, the MAPS is an overallselection tool for Microchip’s product portfolio thatincludes Analog, Memory, MCUs and DSCs. Using thistool, a customer can define a filter to sort features for aparametric search of devices and export side-by-sidetechnical comparison reports. Helpful links are alsoprovided for data sheets, purchase and sampling ofMicrochip parts.

5.4 Analog Demonstration and Evaluation Boards

Microchip offers a broad spectrum of Analog Demon-stration and Evaluation Boards that are designed tohelp customers achieve faster time to market. For acomplete listing of these boards and their correspond-ing user’s guides and technical information, visit theMicrochip web site at www.microchip.com/analogtools.

Some boards that are especially useful are:

• MCP6XXX Amplifier Evaluation Board 1• MCP6XXX Amplifier Evaluation Board 2• MCP6XXX Amplifier Evaluation Board 3• MCP6XXX Amplifier Evaluation Board 4• Active Filter Demo Board Kit• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,

P/N SOIC8EV• 14-Pin SOIC/TSSOP/DIP Evaluation Board,

P/N SOIC14EV

5.5 Application NotesThe following Microchip Application Notes areavailable on the Microchip web site at www.microchip.com/appnotes and are recommended as supplementalreference resources.

• ADN003: “Select the Right Operational Amplifier for your Filtering Circuits”, DS21821

• AN722: “Operational Amplifier Topologies and DC Specifications”, DS00722

• AN723: “Operational Amplifier AC Specifications and Applications”, DS00723

• AN884: “Driving Capacitive Loads With Op Amps”, DS00884

• AN990: “Analog Sensor Conditioning Circuits – An Overview”, DS00990


MCP6L91/1R/2/4
NOTES:

MCP6L91/1R/2/4

6.0 PACKAGING INFORMATION

6.1 Package Marking Information

1 2 3

5 4

5-Lead SOT-23 (MCP6L91/1R) Example:

XXNN

1 2 3

5 4

UU25

Device Code

MCP6L91 UUNNMCP6L91R UVNN

Note: Applies to 5-Lead SOT-23.

Legend: XX...X Customer-specific informationY Year code (last digit of calendar year)YY Year code (last 2 digits of calendar year)WW Week code (week of January 1 is week ‘01’)NNN Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn)* This package is Pb-free. The Pb-free JEDEC designator ( )

can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it willbe carried over to the next line, thus limiting the number of availablecharacters for customer-specific information.

3e

3e

8-Lead MSOP (MCP6L92) Example:

XXXXXXYWWNNN

6L92E134256

8-Lead SOIC (150 mil) (MCP6L92) Example:

XXXXXXXXXXXXYYWW

NNN

MCP6L92ESN^^1134

2563e


MCP6L91/1R/2/4
Package Marking Information (Continued)
14-Lead TSSOP (MCP6L94) Example:

14-Lead SOIC (150 mil) (MCP6L94) Example:

XXXXXXXXXX

YYWWNNN

XXXXXXYYWW

NNN

XXXXXXXXXXMCP6L94

1134256

6L94EST1134256

E/SL^ 3̂e


MCP6L91/1R/2/4

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MCP6L91/1R/2/4

Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging


MCP6L91/1R/2/4

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5$�8 ��%�1�� 5 ;1�#�� =(�)�*6, ��9 ��# � : : ��! !�1��/�� /� �� ( ��;( ��(�#��!�%%� �� : ��(6, ��<�!#� " ��)�*��! !�1��/�� <�!#� "� ��)�*6, ��4 ��#� � ��)�*.��#�4 ��#� 4 �� =� ��;�.��#��# 4� ��(��"..��#�� > : ;>4 �!��/� � ��; : ��4 �!�<�!#� 8 �� : ��

D

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1 2e

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MCP6L91/1R/2/4



MCP6L91/1R/2/4

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MCP6L91/1R/2/4



MCP6L91/1R/2/4

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MCP6L91/1R/2/4



MCP6L91/1R/2/4
NOTES:

MCP6L91/1R/2/4

APPENDIX A: REVISION HISTORY

Revision B (September 2011)The following is the list of modifications:

1. Updated the value for the Current at Output andSupply Pins parameter in the Section 1.1“Absolute Maximum Ratings †”section.

2. Added Section 5.1 “SPICE Macro Model”.

Revision A (March 2009)• Original Release of this Document.


MCP6L91/1R/2/4
NOTES:

MCP6L91/1R/2/4

PRODUCT IDENTIFICATION SYSTEMTo order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Device: MCP6L91T: Single Op Amp (Tape and Reel)

(SOT-23, SOIC, MSOP)MCP6L91RT: Single Op Amp (Tape and Reel) (SOT-23)MCP6L92T: Dual Op Amp (Tape and Reel)

(SOIC, MSOP)MCP6L94T: Quad Op Amp (Tape and Reel)

(SOIC, TSSOP)

Temperature Range: E = -40°C to +125°C

Package: OT = Plastic Small Outline Transistor (SOT-23), 5-leadMS = Plastic MSOP, 8-leadSN = Plastic SOIC, (3.99 mm body), 8-leadSL = Plastic SOIC (3.99 mm body), 14-leadST = Plastic TSSOP (4.4mm body), 14-lead

PART NO. X /XX

PackageTemperatureRange

Device

Examples:a) MCP6L91T-E/OT: Tape and Reel,

Extended Temperature,5LD SOT-23 package

b) MCP6L91T-E/MS: Tape and Reel,Extended Temperature,8LD MSOP package.

c) MCP6L91T-E/SN: Tape and Reel,Extended Temperature,8LD SOIC package.

a) MCP6L91RT-E/OT: Tape and Reel,Extended Temperature,5LD SOT-23 package.

a) MCP6L92T-E/MS: Tape and Reel,Extended Temperature,8LD MSOP package.

b) MCP6L92T-E/SN: Tape and Reel,Extended Temperature,8LD SOIC package.

a) MCP6L94T-E/SL: Tape and Reel,Extended Temperature,14LD SOIC package.

b) MCP6L94T-E/ST: Tape and Reel,Extended Temperature,14LD TSSOP package.


MCP6L91/1R/2/4
NOTES:

Note the following details of the code protection feature on Microchip devices:• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding deviceapplications and the like is provided only for your convenienceand may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS ORIMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION,INCLUDING BUT NOT LIMITED TO ITS CONDITION,QUALITY, PERFORMANCE, MERCHANTABILITY ORFITNESS FOR PURPOSE. Microchip disclaims all liabilityarising from this information and its use. Use of Microchipdevices in life support and/or safety applications is entirely atthe buyer’s risk, and the buyer agrees to defend, indemnify andhold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use. No licenses areconveyed, implicitly or otherwise, under any Microchipintellectual property rights.

2009-2011 Microchip Technology Inc.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their respective companies.

© 2009-2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.

Printed on recycled paper.

ISBN: 978-1-61341-623-5

DS22141B-page 35

Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.


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