MCB design flaw

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MCB design flaw. Email(s) from Peter Moore - PowerPoint PPT Presentation

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  • MCB design flawEmail(s) from Peter Moore5/23/2006: I've discovered a small design error on the MCB .. Namely that the two front panel connectors labeled IN and OUT (which are to transport the system clock and synchronization flag between DHE boxes) uses a 'standard' firewire connector. Unfortunately the 'standard' firewire cable is crossed. This means that plugging in a COTS cable results in the sysclk appearing on the receiver sync flag jumper and the transmitted sync appearing on the receiver sysclk jumper :-) Temporary fix for this is to use wire to connect a slave MCB to the respective signals from the jumper positions. This is not ideal since it is more succeptable to interference and will indeed emit more interference. The alternative is to cutom build cables using COTS connectors - This would be the prefered way. 6/8/2006: Okay .. if we decide to build cables then I'll send a cable list. Otherwise the correction (for a possible future cut) would be the following: U35 Pin 3 => JP2 pin 1 (currently wired to JP3 pin 3) U35 Pin 4 => JP3 pin 3 (currently wired to JP2 pin 1) Move signal labels (ext_syn, ext_syncin, ext_clk, ext_clkin) accordingly.

  • UIUC wiring, Fall 2008We applied the temporary fix suggestion Wirewrap wire JP2-1 to JP2-3 JP2-1 to JP3-3 and remove R175

  • Add two wires JP2-1 to JP3-2 JP2-2 to JP3-3Remove jumper if present (JP3-1 to JP3-2)Note: access to JP2 may require removal of the Systran/SlinkMezzanine card

  • Remove R175

  • ForgivenessEmail from Peter,12/4/2008: The wire wrap solution will work fine .. We've implemented on some of the other crates without any appreciable difference in performance.

    Questions?Mike Haney m-haney@illinois.edu 217-244-6425