MC9S12G128 Controller Board User Guide · — Back-EMF signal sensing using an MCU ADC module —...
Transcript of MC9S12G128 Controller Board User Guide · — Back-EMF signal sensing using an MCU ADC module —...
MC9S12G128 Controller Board UserGuide
Document Number: MC9S12G128MCBUG1.0
08/2012
Freescale Semiconductor
Chapter 1 Introduction1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81.2 Board Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91.3 Board Jumper Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111.4 Board LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Chapter 2 Interface Description2.1 Power Supply J1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152.2 UNI3 Interface J31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152.3 MC33937A Interface J34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .172.4 Hall Sensor Interface JP1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182.5 LIN Connector J9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182.6 CAN Connector J5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182.7 USB Connector J36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192.8 Header JP2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192.9 Header J30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192.10 Headers J14, J15, J16, J17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Chapter 3 Design Consideration3.1 MC9S12G128 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .213.2 PWM /HS and LS Signal Split and Phase Dead Time Generation . . . . . . . . . . . . . . . . .233.3 Board Fault Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .243.4 Hall Sensor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Chapter 4 Electrical Characteristics
Chapter 5 Board Set-up Guide
Chapter 6 References
Chapter 7 Acronyms
Chapter 8 MC9S12G128 Controller Board Schematic
Freescale Semiconductor 3
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About This Book
This document describes the MC9S12G128 Controller Board design, which is targeted for development of motor control applications.
To locate any published updates for this document, refer to the world-wide web at: http://www.freescale.com/.
Revision History
Documentation
The MC9S12G128 documentation is available at the web site, http://www.freescale.com. as follows:
• Reference manuals — MC9S12G128 modules in detail
• Data sheets — information mainly on the device’s AC, DC, thermal characteristics and packages pin-out
• Product briefs — device overview
• Application notes — address specific design issues
Table i. Revision History Table
DateRevision
levelDescription
August 2012 1.0 Initial release
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Introduction
Chapter 1 IntroductionThe MC9S12G128 Controller Board is designed to a drive 3-phase BLDC motor, enabling implementation of motor control techniques:
• Sensorless:
— Back-EMF signal sensing using an MCU ADC module
— Back-EMF zero-cross signal monitoring
• Sensor based:
— Hall sensor signal monitoring
On-board UNI-3 interface enables control of the BLDC motor power stage.
The LIN and CAN communication interfaces connect the board to the other automotive network nodes.
The USB interface is targeted at FreeMASTER PC-based application control.
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Introduction
1.1 Features
The MC9S12G128 Controller Board features follows:
• MC9S12G128 microcontroller, 100 LQFP package
• BDM interface for MCU code download and debugging
• MC33905 System-basis chip (power supply, connectivity)
• Motor control interface:
— UNI-3
— MC33937A predriver
— Hall sensors
• Connectivity interface:
— LIN (MC33905)
— CAN (MC33905)
— USB interface
• LEDs:
— Power-on indicators
— Phase A, B, C PWM control signals
— Phase A, B, C zero-cross
— Hall sensor outputs
— Fault monitoring
— SBC safe mode
— User application
• Rotary encoder switch for an application control
• On-board PWM dead time generation
• MCU pins accessible via pin headers
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Introduction
1.2 Board Architecture
The MC9S12G128 Controller Board basic building blocks are depicted in Figure 1-1. The block color differentiates a block function:
• Blue - MCU and application software download and the debug interface
• Green - Motor control related hardware
• Red - Board power supply and connectivity
• Violet - Application control
Figure 1-1. MC9S12G128 Controller Board Block Diagram
The board is supplied by VBAT voltage in the range of 8 V to 18 V. The MCZ33905 provides 5 V to Hall interface. The MCU and on-board logic are supplied by either 3.3 V or 5 V, depending on the assembled SBC version. The board is populated with the 3.3 V SBC version by default.
The MCU generates one PWM signal for each phase. An additional on-board logic is used to split the PWM signals to control power stage top and bottom switches separately. A PWM dead time is inserted by additional hardware, if required.
The Fault logic triggers the DC bus undervoltage and DC bus overcurrent faults, and turns OFF the power stage top and bottom switches. The circuitry behaviour depends on the selected configuration. For more info, see Chapter 3.3, “Board Fault Management".
MC9S12G128
USBInterface
BDMInterface
RotaryEncoder
MCZ33905
+5V / +3V3Regulator
LINInterface
CANInterface
PWM /HS and LS Signal Split
&PWM Dead Time
Insertion FaultLogic
HallInterface
UNI-3Interface
MCZ33937Interface
VBAT
+5V
+3V3 / +5V
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Introduction
The user can control the application using the rotary switch, USB interface (RS232), CAN and LIN buses.
The BDM interface is present on-board to enable the download and debugging of the MCU code.
For the on-board block location, see Figure 1-2.
Figure 1-2. MC9S12G128 Controller Board Block Location
MCZ33905SBC
USBInterface
PWM Dead TimeCircuitry
Fault Logic
BDM
RotaryEncoderSwitch
UNI 3Interface
MCZ33937Interface
CAN LIN PowerSupply
PWM LEDs
Faultand
Hall/ZC LEDsHall
Interface
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Introduction
1.3 Board Jumper Configuration
See Table 1-1 and Figure 1-3 for proper jumper configuration.
Table 1-1. MC9S12G128 Board Configuration
Jumper Selector Function Connection
J3 SBCDebug Mode
SBC Debug mode (J4 not placed):- ON, placed- OFF, unplaced
Placed
J4 SBCFail-Safe Mode
SBC Normal mode (J3 not placed):- ON, placed- OFF, unplaced
Unplaced
J6, J7 CANTermination
CAN bus termination:- 120R, placed- without termination, unplaced
Placed
J8 LINMaster/Slave
LIN mode:- Master, placed- Slave, unplaced
Placed
J18 /RESET SBC and MCU /RESET pins connected:- connected, placed- unconnected, unplaced
Unplaced
J20, J22 PHASE A Dead Time Dead time ~2s generated by on-board HW:- ON, placed pins 1-2- OFF, placed pins 2-3
Placed, pins 1-2
J21, J23 PHASE C Dead Time Dead time ~2s generated by on-board HW:- ON, placed pins 1-2- OFF, placed pins 2-3
Placed, pins 1-2
J24, J25 PHASE B Dead Time Dead time ~2s generated by on-board HW:- ON, placed pins 1-2- OFF, placed pins 2-3
Placed, pins 1-2
J26 FAULTS Fault is processed by:- on-board HW, placed pins 1-2- MCU software (/IRQ), placed pins 2-3
Placed, pins 1-2
J27, J28 FAULTS In case of Fault, the power stage switched turned OFF by:- on-board HW, placed pins 1-2- power stage HW (EN pin), placed pins 2-3
Placed, pins 1-2
J29 FAULTS Overcurrent diagnostic input:- on-board comparator, placed pins 1-2- power stage MC33972 comparator, placed pins 2-3
Placed, pins 1-2
J32 HALL/ZC PHASE A BLDC sensor control based on:- Hall sensors, placed pins 1-2- Zero-cross, placed pins 2-3
Placed, pins 1-2
J33 HALL/ZC PHASE B BLDC sensor control based on:- Hall sensors, placed pins 1-2- Zero-cross, placed pins 2-3
Placed, pins 1-2
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Figure 1-3. MC9S12G128 Controller Board Jumper Position and Default Setting
J35 HALL/ZC PHASE C BLDC sensor control based on:- Hall sensors, placed pins 1-2- Zero-cross, placed pins 2-3
Placed, pins 1-2
Table 1-1. MC9S12G128 Board Configuration (continued)
Jumper Selector Function Connection
J3, J4MCZ33905
SBC
J20, J22Ph A DT
J18/RESET
J24, J25Ph B DT
J21, J23Ph C DT
J32, J33, J35Hall / Zero Cross
J26, J27, J28, J29Faults
Configuration
J6, J7CAN Termination
J8LIN Master/Slave
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Introduction
1.4 Board LEDs
The Table 1-2 displays the on-board LEDs. For on-board LED locations, see Figure 1-2.
Table 1-2. on-board LEDs
LED Signal Name Description
D3 +5V 5 V Hall power supply
D6 /SAFE MCZ33905 safe-pin state (ON - SBC in safe mode)
D7 +3V3 3.3 V board power supply
D11 - User LED1
D12 - User LED2
D21 AT Phase A top switch signal (ON - High Level)
D22 UV DC bus undervoltage fault (ON - Fault)
D23 BT Phase B top switch signal (ON - High Level)
D24 OC DC bus overcurrent fault (ON - Fault)
D25 CT Phase C top switch signal (ON - High Level)
D26 H0 / ZA Hall 0 / Zero-cross Phase A signal (ON - High Level)
D27 AB Phase A bottom switch signal (ON - High Level)
D28 H1 / ZB Hall 1 / Zero-cross Phase B signal (ON - High Level)
D29 BB Phase B bottom switch signal (ON - High Level)
D30 H2 / ZC Hall 2 / Zero-cross Phase C signal (ON - High Level)
D31 CB Phase C bottom switch signal (ON - High Level)
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Interface Description
Chapter 2 Interface DescriptionThe following chapters summarize the on-board connectors and header pin-outs, signal meanings and MCU pins assignments.
2.1 Power Supply J1
The MC9S12G128 Controller Board can be supplied either by using the 2.1 mm DC power plug J1 or the UNI-3 connector (J31, pin 19).
The controller board provides 5 V for a Hall interface and 3.3 V for on-board logic. Both voltages are generated by the MC33905 SBC. Proper operation is monitored by LEDs D3 for the 5V line and D7 for the 3.3V line (see Table 1-2).
The board is designed to operate in the voltage range from 8 V to 18 V. The board is protected against a reverse battery.
2.2 UNI3 Interface J31
The Unified Interface Version 3 (UNI-3) defines the interface between the MC9S12G128 Controller Board and the BLDC motor power stage.
The list of UNI-3 signal is as follows:
• Control signals:
— PWM phase A, B, C top and bottom switches control
— Brake signal control
— Power Factor Correction (PFC)
• Monitor signals
— DC-bus voltage
— DC-bus current
— Phase A, B, C current
— Zero-cross signals
— Back-EMF phase A, B, C
— Temperature monitoring
• Power Supply +12V
• Serial line - a bidirectional communication line between the Controller Board and Power Stage
The Table 2-1 defines the UNI-3 pin-out and pin assignment to the MCU.
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Interface Description
Table 2-1. UNI-3 Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 PWM_AT PWM3 Phase A top switch control (H -> Turn OFF) Digital output
3 PWM_AB PWM3 & PA0 Phase A bottom switch control (H -> Turn ON) Digital output
5 PWM_BT PWM5 Phase B top switch control (H -> Turn OFF) Digital output
7 PWM_BB PWM5 & PA1 Phase B bottom switch control (H -> Turn ON) Digital output
9 PWM_CT PWM7 Phase C top switch control (H -> Turn OFF) Digital output
11 PWM_CB PWM7 & PA2 Phase C bottom switch control (H -> Turn ON) Digital output
2, 4, 6, 8, 10 Shield- PWM signals shield
(grounded on the power stage side only)-
12,13 GND_D - Digital power supply ground -
14, 15 +5V DC - +5V digital power supply -
17, 18 AGND - Analog power supply ground -
19 +12/+15V DC - Analog power supply -
16,20, 23,24,25, 27, 28,37
NC-
Not connected-
21 VDCBUS PAD6 DC-bus voltage sensing, 0V – 3.3V Analog input
22 IDCBUS PAD1PAD3PAD5
DC-bus current sensing, 0V – 3.3V Analog input
26 TEMP PAD7 Analog temperature 0V – 3.3V Analog input
29 BRAKE_CONT PA5 DC-bus brake control Digital output
30 SERIAL - Serial interface Dig. bidirectional
31 PFC - Power factor correction PWM Digital output
32 PFCEN - Power factor correction enable Digital output
33 PFCZC - Power factor correction Zero-cross Digital input
34 ZCA KWP2 Phase A Back-EMF zero crossing Digital input
35 ZCB KWP4 Phase B Back-EMF zero crossing Digital input
36 ZCC KWP6 Phase C Back-EMF zero crossing Digital input
38 Back-EMF_A PAD0 Phase A Back-EMF voltage sensing Analog input
39 Back-EMF_B PAD2 Phase B Back-EMF voltage sensing Analog input
40 Back-EMF_C PAD4 Phase C Back-EMF voltage sensing Analog input
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Interface Description
2.3 MC33937A Interface J34
When using a Freescale 3-phase low voltage power stage [1.], the phase top and bottom switches are controlled by the MC33937A pre-driver. The device is configured by the SPI, see Table 2-2.
Table 2-2. MC33937 Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 NC - Not connected. -
2 NC - Not connected -
3 MC33937_EN PA4 Device enable Digital output
4 MC33937_OC - Over-current Digital input
5 MC33937_/RST PC4 Reset Digital output
6 MC33937_INT PC5 Interrupt Digital input
7 MC33937_SOUT MISO0 SPI Input data Digital input
8 MC33937_SCK SCK0 SPI clock Digital output
9 MC33937_CS /SS0 Chip-select Digital output
10 MC33937_SIN MOSI0 SPI output data Digital output
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Interface Description
2.4 Hall Sensor Interface JP1
When developing the sensor based BLDC application, the Hall sensors are used to determine the actual motor rotor sector.
Connect the motor Hall sensors outputs to JP1 following the instructions in Table 2-3. and watch the signal levels by on-board LEDs (Table 1-2, Table 1-1).
2.5 LIN Connector J9
The MC33905 LIN transceiver is used as an on-board LIN interface hardware. The LIN node can be configured to either the Master or Slave mode, see Table 1-1.
A Table 2-4 shows the LIN connector pin-out and pin assignment to the MCU.
2.6 CAN Connector J5
The system basis chip on the MC33905 CAN transceiver is used as the CAN hardware interface. The on-board jumpers J6, J7 enable node termination, impedance of 120R, see Table 1-1.
Table 2-5 shows the CAN connector pin-out and pin assignment to the MCU.
Table 2-3. HALL Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 +5Vdc - +5 V sensor supply voltage -
2 GND - Ground -
3 HALL0 KWP2 HALL0 sensor output Digital input
4 HALL1 KWP4 HALL1 sensor output Digital input
5 HALL2 KWP6 HALL 2 sensor output Digital input
6 NC - Not connected -
Table 2-4. LIN Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 GND - Ground -
2 GND - Ground -
3 VSUP - Power Supply -
4 LIN RXD1/TXD1 LIN bus Dig. bidirectional
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Interface Description
2.7 USB Connector J36
The USB line is used for board communication with the PC, when using e.g. the Freescale FreeMASTER tool to control the user application.
The interface uses a B type connector and is isolated from the board environment. See Table 2-6 for the pin description and pin assignment to the MCU.
2.8 Header JP2
Monitoring the PWM signal is possible using JP2. The Table 2-7 summarizes header pin-out.
Table 2-7. JP2 Signal Description
2.9 Header J30
Header J30 allows monitoring the MC33937A EN and OC pins, see Table 2-8.
Table 2-5. CAN Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 CANH RXCAN/TXCAN CAN bus H Diff. bidirectional
2 CANL RXCAN/TXCAN CAN bus L Diff. bidirectional
3 GND - Ground -
4 NC - Not connected -
Table 2-6. USB Signal Description
Interface Pin Signal Name MCU Signal Description Direction
1 VBUS - USB Power Supply -
2 D- RXD0/TXD0 Data – Dig. bidirectional
3 D+ RXD0/TXD0 Data + Dig. bidirectional
4 GNDB - USB Ground -
Interface Pin Signal Name MCU Signal Description Direction
1 PWM_AT PWM3 Phase A top switch control Digital output
2 PWM_AB PWM3 & PA0 Phase A bottom switch control Digital output
3 PWM_BT PWM5 Phase B top switch control Digital output
4 PWM_BB PWM5 & PA1 Phase B bottom switch control Digital output
5 PWM_CT PWM7 Phase C top switch control Digital output
6 PWM_CB PWM7 & PA2 Phase C bottom switch control Digital output
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Interface Description
Table 2-8. J30 Signal Description
2.10 Headers J14, J15, J16, J17
The MC9S12G128 MCU signals can be monitored using headers J14, J15, J16, J17, see board schematic.
Interface Pin Signal Name MCU Signal Description Direction
1 MC33937_OC - Over-current Digital input
2 MC33937_EN PA4 Device enable Digital output
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Design Consideration
Chapter 3 Design ConsiderationThis chapter provides an additional information on functional blocks of the MC9S12G128 controller board.
3.1 MC9S12G128 Features
The MC9S12G-Family is an automotive 16-bit microcontroller product line focused onlow-cost, high-performance and low pin-count [2.]. This family is intended to bridge between high-end 8-bit microcontrollers and high-performance 16-bit microcontrollers, such as the MC9S12XS-Family. The MC9S12G-Family is targeted at generic automotive applications requiring CAN or LIN/J2602 communication.The MC9S12G128 MCU 100 LQFP features follows (see Figure 3-1):
• CPU12V1 core
• Memory
— 128 KB of Flash memory
— 4096 bytes of EEPROM
— 8192 bytes of RAM
• Clock modules:
— External oscillator
— Internal 1MHz RC oscillator
— PLL
• Connectivity:
— MSCAN, 1 module
— SCI, 3modules
— SPI, 3modules
• 16-bit timer, 8 channels
• 8-bit PWM, that can be configured as either 8 channel 8-bit PWM or 4 channel 16-bit PWM.
• 10-bit ADC, 16 channels
• MCU Supply voltage from 3.13 V to 5.5 V
• Execution speed 50MHz
The MC9S12G128 Controller Board is designed to use MCU PWM3, PWM5, PWM7 channels as power stage phase A, phase B and phase C signals. The PWM1 channel is used primarily for proper timing of the power stage DC-bus current and BLDC motor Back-EMF ADC conversion.
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Figure 3-1. S12G Family Block Diagram
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Design Consideration
3.2 PWM /HS and LS Signal Split and Phase Dead Time Generation
The MC9S12G128 MCU PWM module generates one PWM signal per each phase. The power stage requires separate PWM signals for each phase top and bottom switch.
The Figure 3-2 shows how the PWM signals are generated for motor phase A. The other motor phases are controlled using the same logic circuitry.
The PWMA signal is split using the dual AND gate U3 into:
• PWMA_/HS signal:
— turn ON the power stage top switch, when reaches a low level
— turn OFF the power stage top switch, when reaches a high level
• PWMA_LS signal:
— turn ON the power stage bottom switch, when reaches a high level
— turn OFF the power stage bottom switch, when reaches a low level
In case of need to turn OFF the top and bottom switch simultaneously, the CTRLA signal is driven by MCU low level and PWMA signal is driven high level.
The RC cell and diode are present on-board to insert a dead time approximately 2 micro seconds into the phase PWM signal. Optionally this can be disabled using on-board jumpers, see Section 1.3, “Board Jumper Configuration.”
Figure 3-2. PWM Signal Split and Phase Dead Time Generation
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Design Consideration
3.3 Board Fault Management
The Faults can be processed either by MCU software or by an on-board hardware. The action depends on jumper configuration, see Figure 3-3. and Table 1-1 J26, J27, J28, J29.
There are two sources of Fault condition (U6 comparator output high level):
• /FLT_DET0 - fault is triggered whenever the signal level is below limit set by R57
• FLT_DET1 - fault is triggered whenever the signal level is above limit set by R69
The /FLT_DET0 can be used for the DC bus undervoltage fault detection. The FLT_DET1 is designed for the DC bus overcurrent detection.
The jumper J29 selects the source of overcurrent fault. Either the on-board comparator or the power stage overcurrent fault signal, e.g. when using the MC33937A, determine the fault condition.
In fact, there are three options of fault processing, i.e. turning OFF power stage the top and bottom switches:
1. MCU using the /IRQ pin - MCU software is responsible for the power stage switches turn OFF
2. Power Stage Enable pin - when the fault is captured by U8 the RS Flip-Flop, the EN signal goes low. The power stage is responsible for turning OFF the switches.
3. on-board hardware - when the fault is captured by the U8 RS Flip-Flop, the U7 and U9 turn OFF the power stage top and bottom switches.
For configuration, see Table 3-1.
Table 3-1. Fault Jumper Configuration
Fault Action Responsibility
Fault Action Signals J26 J27 J28
Software MCU /IRQ pin, low level Placed, pins 2-3 Unplaced Unplaced
Power Stage J34 EN pin, low level Placed, pins 1-2 Placed, pins 2-3 Unplaced
Controller Board HW RS Flip-Flop signals Placed, pins 1-2 Placed, pins 1-2 Placed, pins 1-2
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Design Consideration
Figure 3-3. Fault Management Hardware
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Design Consideration
3.4 Hall Sensor Interface
The Hall sensor interface is used for BLDC sensor based motor control applications. The Hall sensors are used to determine the actual motor rotor sector.
The on-board interface provides the 5V power supply voltage to supply the sensors. The Hall interface inputs are designed to support an open collector as well as push-pull Hall sensors outputs (see Figure 3-4). A single pole RC low pass filter is present to reduce a signal noise.
For a detailed JP1 connector signal description, see Table 2-3.
Figure 3-4. Hall Sensor Interface
The Figure 3-5 shows the Hall sensor signal alignment to BLDC motor Back-EMF signal. The Hall sensors detect the rotor flux, so their actual state is not influenced by stator current. The Hall effect outputs in BLDC motors divide the electrical revolution into three equal sections of 120°. In this so-called 120° configuration, the Hall states 111 and 000 never occur.
Based on the Hall sensor signal, the BLDC motor commutation table is developed. An example is shown in Figure 3-6. The right-hand side of the table shows the Hall sensors signal, while the left side applied phase voltage.
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Figure 3-5. BLDC Motor Back-EMF and Hall Sensor Signal Alignment
Figure 3-6. BLDC Motor Commutation Table
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Electrical Characteristics
Chapter 4 Electrical CharacteristicsThe electrical characteristics in Table 4-1 apply to an operation at 25 °C.
1—12V power supply, MCU without software
Table 4-1. Electrical Characteristics
Characteristic Symbol Min Typ Max Units
Power supply Voltage VDC 8 12 18 V
Current consumption(1) ICC 30 mA
Input Voltage Range VIN 0 – 3.3 V
Input Voltage Range Hall and MC33937 interface VIN 0 – 5 V
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Board Set-up Guide
Chapter 5 Board Set-up GuideThe board is designed to be supplied either by the UNI-3 interface or by using the on-board J1 connector, power supply voltage from 8 V to 18 V. When using board as a standalone EVB, connect the power supply to J1. In case of board operation with the power stage, it is recommended to supply board using UNI-3 interface.
The MC9S12G128 Controller Board (blue board) is designed for operation with the FSL MC33937A based 3-Phase low voltage power stage (green board), see Figure 5-1. The complete 3-phase BLDC Sensor/Sensorless Development Kit can be ordered at http://www.freescale.com/AutoMCDevKits.
Figure 5-1. 3-Phase BLDC Sensor/Sensorless Development Kit
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References
Chapter 6 References1. 3-phase Low Voltage Power Stage User Manual, Rev. 0, 31 March 2009,
http://www.freescale.com/AutoMCDevKits.
2. MC9S12G Family Reference Manual, MC9S12GRMV1 Rev. 1.06, 8 November 2011
MC9S12G128 Controller Board User Guide, Rev. 1.0
Freescale Semiconductor 33
References
MC9S12G128 Controller Board User Guide, Rev. 1.0
34 Freescale Semiconductor
Acronyms
Chapter 7 AcronymsADC Analog to Digital Converter
BEMF Back Electromotive Force
BLDC Brushless DC Motor
CAN Controller Area Network
DT Dead Time
LIN Local Interconnect Network
MCU Microcontroller Unit
PC Personal Computer
PWM Pulse Width Modulation
USB Universal Serial Bus
MC9S12G128 Controller Board User Guide, Rev. 1.0
Freescale Semiconductor 35
Acronyms
MC9S12G128 Controller Board User Guide, Rev. 1.0
36 Freescale Semiconductor
MC9S12G128 Controller Board Schematic
Chapter 8 MC9S12G128 Controller Board Schematic
MC9S12G128 Controller Board User Guide, Rev. 1.0
Freescale Semiconductor 37
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Notes:
----------
Sheet 4: Configure BLDC motor BEMF and current sensing.
Sheet 5: Insert Dead time ~2us.
Sheet 6: Configure Fault logic.
Sheet 7: Select either Hall sensor or Zero Cross based sensing.
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____X____
Rev
SCHEMATIC REVISIONS
Zone Date RevisedDescription0.1 Initial version 11.01.2012 PChAll
JK, PCh13.01.2012Release version1.0All
Rev
SCHEMATIC REVISIONS
Zone Date RevisedDescription0.1 Initial version 11.01.2012 PChAll
JK, PCh13.01.2012Release version1.0All
Rev
SCHEMATIC REVISIONS
Zone Date RevisedDescription0.1 Initial version 11.01.2012 PChAll
JK, PCh13.01.2012Release version1.0All
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
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____X____
08_USB_RS232_Interface
08_USB_RS232_Interface
RS232_TXRS232_RX
06_Fault_Logic
06_Fault_Logic
FLT1_DET
PWMA_/HS_IN PWMA_/HS_OUTPWMA_LS_IN PWMA_LS_OUT
PWMB_/HS_IN
PWMC_/HS_INPWMC_LS_IN
PWMB_LS_IN PWMB_LS_OUT
PWMC_LS_OUTPWMC_/HS_OUT
PWMB_/HS_OUT
FLT0_OUTFLT1_OUT
FLT_OUT
FLT_RSTEN_IN EN_OUT
FLT1_DET_ALT
/FLT0_DET
09_LEDs_&_Ctrl
09_LEDs_&_Ctrl
LED1_YLED2_YLED3_Y
LED4_GLED5_GLED6_G
LED7_RLED8_R
LED9_GLED10_GLED11_G
ROTAROTBROTSW
07_UNI3_HALL_Interface
07_UNI3_HALL_Interface
BRAKE
DCBVDCBI
TEMP
PWM_CBPWM_CT
PWM_BBPWM_BT
PWM_ABPWM_AT
MC33937_SOUT
MC33937_INT
MC33937_OC
MC33937_/CS
MC33937_/RST
MC33937_SINMC33937_SCK
MC33937_EN
BEMF_A
BEMF_B
BEMF_C
UNI3_+12V/+15V_PWR_OUT
HALL0/ZCAHALL1/ZCBHALL2/ZCC
05_PWM_and_Dead_Time_Unit
05_PWM_and_Dead_Time_Unit
PWMA PWMA_/HSPWMA_LSCTRLA
PWMBCTRLB
CTRLCPWMC
PWMB_/HS
PWMC_/HSPWMC_LS
PWMB_LS
03_Power_Supply_LIN_CAN
03_Power_Supply_LIN_CAN
CAN_TXCAN_RX
LIN_TXLIN_RX
MC33905_/CS
MC33905_/INT
MC33905_SCLK
MC33905_MUX_OUT
MC33905_/RST
MC33905_MOSIMC33905_MISO
+VSUP_PWR_IN
04_MCU
04_MCU
PWM3
PWM7
PWM5
TXD0RXD0
MISO0MOSI0SCK0/SS0
KWJ4KWJ5KWJ6
AN0AN1AN2AN3AN4AN5AN6AN7
TXD1RXD1
RXCANTXCAN
/RESET
KWJ7
KWP2KWP4KWP6
/IRQ
PA0
PA1
PA2
PA3PA4PA5
PC3PC4PC5PC6PC7
AN8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TERMINATE
CAN
LIN
VSUP <+8V, +28V>
CANHCANL
MC33905_/INTMC33905_/RST
MC33905_MISO
MC33905_MOSI
MC33905_MUX_OUT
MC33905_SCLK
MC33905_/CS
+VSUP_PWR_IN
CAN_TX
LIN_TXLIN_RX
CAN_RX
GND
GND
GND
GND
GND
GND
VSUP
VSUP
GND
VSUP
GND
GND
+3.3VD_MCU
+3.3VD_MCU
+5V
+3.3VA_MCU
GNDA GNDAGNDGND
GND
GND
GNDDGND GNDD
GNDD GNDD
GND GND
GND
GNDD GNDD
GNDD
GNDD
GND
GND GNDA
GNDA
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Power Supply, LIN, CAN
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____X____Drawing Title:
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<Designer>
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<DrawnBy>
3 9
____X____
R94.7KR94.7K
J2J2
1
D6
HSMS-C170
D6
HSMS-C170
AC
J12J12
1
C17
220PF
C17
220PF
C1347PFC1347PF
C110.1UF
C110.1UF
D7
HSMG-C170
D7
HSMG-C170
A C
R18
1.0K
R18
1.0K
D1
ES1JL
D1
ES1JL
A C
TP2TP2
R5
0
R5
0
+ C1
10UF
+ C1
10UF
J6J6
12
J4J4
1 2
R13
10.0K
R13
10.0K
R154.7KR154.7K
D2
ES1JL
D2
ES1JL
A C
C164700PFC164700PF
J5
CON_1x4
J5
CON_1x4
1234M1
M2
R14 10.0KR14 10.0K
+ C4
10UF
+ C4
10UF
R1760.4R1760.4
C100.1UFC100.1UF
R12 0R12 0
+ C14
10UF
+ C14
10UF
EB
CQ1
BCP52-16
EB
CQ1
BCP52-16
1
32 4
+ C5330UF
+ C5330UF
J7J7
12
L1
1000 OHM
L1
1000 OHM
C20.1UFC20.1UF
R10 0R10 0
J8J8
1 2
D4
ES1JL
D4
ES1JL
A C
J13J13
1
SW1B3S-1002SW1B3S-1002
1234
J10J10
1
C80.1UFC80.1UF
D5
ES1JL
D5
ES1JL
A C
TP3TP3
R4
1.0K
R4
1.0K
R61.0KR61.0K
R8
1.0K
R8
1.0K
+ C6330UF
+ C6330UF
C7
0.1UF
C7
0.1UF
J11J11
1
R2
0
R2
0
C1247PFC1247PF
R7
4.7K
R7
4.7K
D9NUP2105LD9NUP2105L
2
3
1
R11 0R11 0
U1MCZ33905BS3EKU1MCZ33905BS3EK
VB
AU
X11
VC
AU
X12
VSUP22 V
AU
X13
VE
31
VB
32
VSUP11
SAFE5
DBG16
VSENSE20
I/O_015
I/O_121
CANH7
SPLIT10
CANL8
LIN_T4
LIN17
VDD28
RST22
INT23
MOSI26
SCLK25
MISO27
CS24
MUX_OUT14
5V_CAN6
TXD29
RXD30
TXD_L18
RXD_L19
GN
D_C
AN
9
EX
_P
AD
33
I/O_33
L2B82789C0513N002L2B82789C0513N002
13
24
C30.1UFC30.1UF
D3
HSMG-C170
D3
HSMG-C170
AC
TP1TP1
D8
MMSZ8V2T1G
D8
MMSZ8V2T1G
AC
C150.1UFC150.1UF
R1660.4R1660.4
D10
MMSD914T1
D10
MMSD914T1
AC
R3
10.0K
R3
10.0K
+ C9
10UF
+ C9
10UF
J9
CON PLUG 4
J9
CON PLUG 4
4321
J1
CON_1_PWR
J1
CON_1_PWR
1
23
R1
1.0K
R1
1.0K
J3J31 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Configure ADC signals used for BEMF and BLDC motor current sensing:
-------------------------------------------------------------------
- AN0, AN1 populate R21, R24
- AN2, AN3 populate R29, R30
- AN4, AN5 populate R35, R36
/RST
PA0PA1PA2PA3PA4PA5
PB4
PC3PC4PC5PC6PC7
PP2PP3PP4PP5PP6PP7
PT0PT1PT2PT3PT4PT5PT6PT7
PAD9PAD10PAD11PAD12PAD13PAD14PAD15
PS0PS1PS2PS3PS4PS5PS6PS7
PJ4PJ5PJ6PJ7
PM0PM1PM2PM3
PA6PA7
PB0PB1PB2PB3
PB5PB6PB7
PC0PC1PC2
PD0PD1PD2PD3PD4PD5PD6PD7
PJ0PJ1PJ2PJ3
PP0
PAD0PAD1PAD2PAD3PAD4PAD5PAD6PAD7
PAD8
PAD0
PAD1
PAD2
PAD3
PAD4
PAD5
PAD6
PAD7
PAD8
PP0 PP1PP2 PP3PP4 PP5PP6 PP7
PC0PC2PC4PC6
PC1PC3PC5PC7
PAD0 PAD1PAD2PAD4PAD6PAD8PAD10PAD12PAD14
PAD3PAD5PAD7PAD9PAD11PAD13PAD15
PS0PS2PS4PS6
PS1PS3PS5PS7
PM0PM2
PM1PM3
PC0
PC1
PC2
BKGD
VDDA
VRH
VDDX1
VDDX2
VDDX3
VDDA
VRH
VDDX1
VDDX2
VDDX3
/RSTBKGD
PP1
PD1 PD0PD3 PD2PD5 PD4PD7 PD6
PT6PT7PT5 PT4
PT2PT0
PT3PT1
PB0PB1PB3 PB2PB5 PB4PB7 PB6
PA1 PA0PA3 PA2PA5 PA4PA7 PA6
PJ0 PJ1PJ2 PJ3
PJ5PJ4PJ6 PJ7
PWM5
PWM3
PWM7
TXD0RXD0
KWJ4KWJ5KWJ6
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
TXD1RXD1
RXCANTXCAN
/RESET
KWJ7
KWP2
KWP4
KWP6
/IRQ
MISO0MOSI0SCK0/SS0
PA0PA1PA2PA3PA4PA5
PC3PC4
PC5PC6PC7
AN8
+3.3VD_MCU
GNDD
+3.3VD_MCU
GNDD GNDD
+3.3VD_MCU
GNDD
GNDDGNDD
GNDD
GNDA
GNDD
GNDD
GNDD
GNDAGNDD
GNDAGNDAGNDA
+3.3VA_MCU
GNDD
GNDD
GNDD
+3.3VD_MCU
GNDD
GNDD
+3.3VD_MCU
GNDD
GNDD
GNDD
GNDD
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
Drawing Title:
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____X____Drawing Title:
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____X____
R37 0
DNP
R37 0
DNP
SW3B3S-1002
SW3B3S-1002
1234
R34 100R34 100
R41 100R41 100
C360.1UFC360.1UF
J17
HDR_2X13
J17
HDR_2X13
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 2425 26
C25
22pF
C25
22pF
R33 0DNPR33 0DNP
R19 0DNPR19 0DNP
D12
HSMG-C170
D12
HSMG-C170
AC
C18100 PFC18100 PF
+ C33
10UF
+ C33
10UF
R24 0R24 0
R26
0
R26
0
C26100 PFC26100 PF
Y1
8MHz
Y1
8MHz
12
R250R250
C350.1UFC350.1UF
J16
HDR_2X13
J16
HDR_2X13
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 2425 26
R431.0KR431.0K
1
2526 50
51
75
76100
U2
MC9S12G128
1
2526 50
51
75
76100
U2
MC9S12G128
PB0/ECLK25
PB1/API_EXTCLK26
PB2/ECLKX227
PB328
PJ6/KWJ6/SCK21
VDDX19
PB4/IRQ47
PB5/XIRQ48
PB649
PB750
PD078
PD179
PD280
PD381
PD494
PD595
PD696
PD797
PM0/RXCAN92
PM1/TXCAN93
PM2/RXD298
PM3/TXD299
PP0/KWP0/ETRIG0/PWM029
PP1/KWP1/ETRIG1/PWM130
PP2/KWP2/ETRIG2/PWM231
PP3/KWP3/ETRIG3/PWM332
PP4/KWP4/PWM433
PP5/KWP5/PWM534
PP6/KWP6/PWM635
PP7/KWP7/PWM736
PT0/IOC046
PT1/IOC145
PT2/IOC244
PT3/IOC343
PJ0/KWJ0/MISO120
PT4/IOC442
PT5/IOC541
PT6/IOC640
PT7/IOC739
PAD0/KWAD0/AN055
PAD1/KWAD1/AN157
PAD2/KWAD2/AN259
PAD3/KWAD3/AN361
PAD4/KWAD4/AN463
VSSX338
VSSX111
PAD5/KWAD5/AN565
PAD6/KWAD6/AN667
PAD7/KWAD7/AN769
PAD8/KWAD8/AN856
PAD9/KWAD9/AN958
VDDR10
VDDX337
PE0/EXTAL12
PE1/XTAL14
PAD10/KWAD10/AN1060
PAD11/KWAD11/AN1162
PAD12/KWAD1264
PAD13/KWAD1366
PAD14/KWAD1468
PAD15/KWAD1570
PS0/RXD082
PS1/TXD083
PS2/RXD184
PS3/TXD185
PS4/MISO086
PS5/MOSI087
PS6/SCK088
VSS13
PJ1/KWJ1/MOSI121
PJ4/KWJ4/MISO23 PJ3/KWJ3/SS1
23
PC051
PC152
PC253
PC354
PC471
PC572
PC673
PC774
PJ2/KWJ2/SCK122
VDDX291
PA04
PA15
PA26
PA37
PJ5/KWJ5/MOSI22
PJ7/KWJ7/SS2100
PA416
PA517
PA618
PA719
VSSA77 VDDA76
VSSX290
PS7/API_EXTCLK/SS089
TEST15
VRH75
RESET8
BKGD/MODC24
C29100 PFC29100 PF
C24100 PFC24100 PF
J18J18
1 2
J19
CON 2X3 PLUG TH 100MIL
J19
CON 2X3 PLUG TH 100MIL
1 23 4
65
R44
10.0K
R44
10.0K
C370.1UFC370.1UF
R421.0KR421.0K
R40 100R40 100
C21100 PFC21100 PF
C300.1UFC300.1UF
J15
HDR_2X13
J15
HDR_2X13
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 2425 26
R32 100R32 100
D11
HSMG-C170
D11
HSMG-C170
AC
R39 100R39 100
L4 1000 OHML4 1000 OHM
SW2B3S-1002
SW2B3S-1002
1234
R29 0R29 0
L31000 OHML31000 OHM
R22 0
DNP
R22 0
DNP
R21 0R21 0
C19100 PFC19100 PF
R30 0R30 0
C28100 PFC28100 PF
R28 100R28 100
C22100 PFC22100 PF
J14
HDR_2X13
J14
HDR_2X13
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 2425 26
R31 0
DNP
R31 0
DNP
R27 0DNPR27 0DNP
R38 100R38 100
C23
22pF
C23
22pF
R20 100R20 100
C274700PFC274700PF
R35 0R35 0
+ C31
10UF
+ C31
10UF
C320.1UFC320.1UF
R36 0R36 0
C340.1UFC340.1UF
R23 100R23 100
C20100 PFC20100 PF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Insert Dead time ~2us:
-----------------------
Yes - Place jumper on J2x headers, pins 2,3
No - Place jumper on J2x headers, pins 1,2
PWMAPWMA_/HS
CTRLA
PWMB
CTRLB
PWMB_LS
PWMB_/HS
PWMC
CTRLC
PWMC_/HS
PWMC_LSPWMA_LS
+3.3VD_MCU
GNDDGNDD
GNDD
GNDD
+3.3VD_MCU
GNDDGNDD
GNDD
GNDD
+3.3VD_MCU
GNDDGNDD
GNDD
GNDD
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
PWM and Dead Time Unit
<Designer>
<Approver>
<DrawnBy>
5 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
PWM and Dead Time Unit
<Designer>
<Approver>
<DrawnBy>
5 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
PWM and Dead Time Unit
<Designer>
<Approver>
<DrawnBy>
5 9
____X____
D13BAT54T1G
D13BAT54T1G
A C
D14BAT54T1G
D14BAT54T1G
A C
C44
0.1UF
C44
0.1UF
U3B
SN74LVC2G08DCT
U3B
SN74LVC2G08DCT
5
63
VCC
GND
U4A
SN74LVC2G08DCT
VCC
GND
U4A
SN74LVC2G08DCT
1
27
84
C39
0.1UF
C39
0.1UF
R53 1.0KR53 1.0K
R51 22.0KR51 22.0K
R47 1.0KR47 1.0K
C38
0.1UF
C38
0.1UF
J24J24
1 2 3
R54 15.0KR54 15.0K
J21J21
1 2 3
R48 15.0KR48 15.0K
U4B
SN74LVC2G08DCT
U4B
SN74LVC2G08DCT
5
63
VCC
GND
U5A
SN74LVC2G08DCT
VCC
GND
U5A
SN74LVC2G08DCT
1
27
84
R49 620R49 620
R56 22.0KR56 22.0K
R52 22.0KR52 22.0K
D15BAT54T1G
D15BAT54T1G
AC
J20J20
1 2 3
R55 620R55 620
J22J22
1 2 3
R45 1.0KR45 1.0K
U5B
SN74LVC2G08DCT
U5B
SN74LVC2G08DCT
5
63R50 620R50 620
D18BAT54T1G
D18BAT54T1G
AC
C40100 PFC40100 PF
D16BAT54T1G
D16BAT54T1G
AC
C45100 PFC45100 PF
C41100 PFC41100 PF
J25J25
1 2 3
C46100 PFC46100 PF
VCC
GND
U3A
SN74LVC2G08DCT
VCC
GND
U3A
SN74LVC2G08DCT
1
27
84
J23J23
1 2 3
C43100 PFC43100 PF
C42100 PFC42100 PF
R46 15.0KR46 15.0K
D17BAT54T1G
D17BAT54T1G
A C
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Q
/QS
R
Configure on board Fault logic:
-------------------------------
1. Select source of OC protection, J29
2. MCU /IRQ based (software based) Fault logic:
- jumper on J26, pins 2, 3
- jumper on J27, open
- jumper on J28, open
3. HW based Fault logic using gate driver
MC33972_EN signal to turn OFF MOSFETs:
- jumper on J26, pins 1, 2
- jumper on J27, pins 2, 3
- jumper on J28, open
4. HW based Fault logic using on board logic to turn OFF
MOSFETs (/HS = H, LS = L):
- jumper on J26, pins 1, 2
- jumper on J27, pins 1, 2
- jumper on J28, pins 1, 2
FLT_/Q
FLT_Q
FLT_/QFLT_Q
PWMA_/HS_INPWMA_/HS_OUT
PWMA_LS_INPWMA_LS_OUT
PWMB_/HS_IN
PWMC_/HS_IN PWMC_LS_IN
PWMB_LS_INPWMB_LS_OUT
PWMC_LS_OUTPWMC_/HS_OUT
PWMB_/HS_OUT
FLT_RST
/FLT0_DET
FLT1_DET
FLT0_OUT
FLT1_OUT
FLT_OUT
EN_IN
EN_OUT
FLT1_DET_ALT
+3.3VD_MCU
GNDD
GNDD
GNDD
GNDD
+3.3VD_MCU
GNDD
GNDD
GNDD GNDD
+3.3VD_MCU
+3.3VD_MCU
GNDDGNDD
GNDD
GNDD
+3.3VD_MCU
+3.3VD_MCU
+3.3VD_MCU
GNDD
+3.3VD_MCU
GNDD
GNDD
+3.3VD_MCU
GNDD
GNDD
GNDD
+3.3VD_MCU
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Thursday, March 01, 2012
Fault Logic
<Designer>
<Approver>
<DrawnBy>
6 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Thursday, March 01, 2012
Fault Logic
<Designer>
<Approver>
<DrawnBy>
6 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Thursday, March 01, 2012
Fault Logic
<Designer>
<Approver>
<DrawnBy>
6 9
____X____
U7C
MC74AC32DG
U7C
MC74AC32DG
9
108
-
+
U6BLM393M_NL
-
+
U6BLM393M_NL
5
67
84
R65 10.0KR65 10.0K R66 1.0MR66 1.0M
R59 1.0MR59 1.0M
U10
NC7SZ14
U10
NC7SZ14
Y4
GND3
A2
VCC5
NC1
R67
10.0K
R67
10.0K
R6910KR6910K
13
2
-
+
U6ALM393M_NL
-
+
U6ALM393M_NL
3
21
84
R63 10.0KR63 10.0K
GND
VCCU7A
MC74AC32DG
GND
VCCU7A
MC74AC32DG
1
23
14
7
U7D
MC74AC32DG
U7D
MC74AC32DG
12
1311
U8BSN74LVC2G02DCTR
U8BSN74LVC2G02DCTR
5
63
VCC
GNDU8A
SN74LVC2G02DCTR
VCC
GNDU8A
SN74LVC2G02DCTR
1
27
84
C50
0.1UF
C50
0.1UF
R68
10.0K
R68
10.0K
R60
10.0K
R60
10.0K
R58 10.0KR58 10.0K
C49
0.1UF
C49
0.1UF
J29J29
1 2 3
C544700PFC544700PF
R62
10.0K
R62
10.0K
J27J27
1 2 3
U9BMC74AC08DGU9BMC74AC08DG
4
56
U7B
MC74AC32DG
U7B
MC74AC32DG
4
56
VCC
GNDU9AMC74AC08DG
VCC
GNDU9AMC74AC08DG
1
23
14
7
R61
10.0K
R61
10.0K
C530.1UFC530.1UF
C51
0.1UF
C51
0.1UF
C470.1UFC470.1UF
R64 10.0KR64 10.0K
U9CMC74AC08DGU9CMC74AC08DG
9
108
C550.1UFC550.1UF
J26J26
1 2 3
C524700PFC524700PF
C480.1UFC480.1UF
J28J28
1 2 3
R57
10K
R57
10K
13
2
U9DMC74AC08DGU9DMC74AC08DG
12
1311
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HALL SENSORS
ZCB ZCC
PWM_ABPWM_BTPWM_BBPWM_CTPWM_CB
EN
SOUT
OCINT
ZCA
PWM_AT
TP
ZCB
ZCA
ZCC
OC
INT
SOUT TP
PWM_ATPWM_ABPWM_BTPWM_BBPWM_CTPWM_CB
OC
EN
PWM_ATPWM_ABPWM_BTPWM_BBPWM_CTPWM_CB
UNI3_+12V/+15V_PWR_OUT
MC33937_/RST
MC33937_SIN
MC33937_EN
BRAKE
MC33937_/CSMC33937_SCK
MC33937_OC
MC33937_INT
MC33937_SOUT
BEMF_CBEMF_A
BEMF_B
HALL0/ZCA
HALL1/ZCB
HALL2/ZCC
TEMP
DCBIDCBV
GNDA GNDA
+5V
+5V
+5V
+5V
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDA
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
UNI 3 Interface
<Designer>
<Approver>
<DrawnBy>
7 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
UNI 3 Interface
<Designer>
<Approver>
<DrawnBy>
7 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
UNI 3 Interface
<Designer>
<Approver>
<DrawnBy>
7 9
____X____
R81
3.3K
R81
3.3K
J34
HDR_2X5
J34
HDR_2X5
1 23 4
657 89 10
JP2
HDR 1X6
JP2
HDR 1X6
123456
R751.0KR751.0K
R82
3.3K
R82
3.3K
R896.2KR896.2K
R701.0KR701.0K
JP1JP1123456
R786.2KR786.2K
R85
3.3K
R85
3.3K
J33J33
1 2 3
J30J30
12
J31
CON_2X20
J31
CON_2X20
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
C5647PFC5647PF
R836.2KR836.2K
C5747PFC5747PF
R866.2KR866.2K
R746.2KR746.2K
R906.2KR906.2K
R7627R7627
R8027R8027
R87
3.3K
R87
3.3K
R73
470
R73
470
R791.0KR791.0K
J35J35
1 2 3
R88
3.3K
R88
3.3K
R77
3.3K
R77
3.3K
R72
3.3K
R72
3.3K
R846.2KR846.2K
R7127R7127
J32J32
1 2 3
C5847PFC5847PF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Isolation Barrier
RS232_TX
RS232_RX
VDD_USB
VDD_USB
GND_USB
GND_USB
GND_USB
GND_USB
VDD_USB
GNDD
GNDD
+3.3VD_MCU
GND_USB
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
USB to RS232 Interface
<Designer>
<Approver>
<DrawnBy>
8 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
USB to RS232 Interface
<Designer>
<Approver>
<DrawnBy>
8 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
USB to RS232 Interface
<Designer>
<Approver>
<DrawnBy>
8 9
____X____
C600.1UFC600.1UF
C610.1UFC610.1UF
U11
ADUM1201
U11
ADUM1201
VD
D1
1
VD
D2
8
VIA7
VIB3
VOA2
VOB6
GN
D1
4
GN
D2
5
U12
FT232RL
U12
FT232RL
VCCIO4
VCC20
USBDM16
USBDP15
NC_88
RESET19
NC_2424
OSCI27
OSCO28
3V3OUT17
AG
ND
25
GN
D1
7G
ND
21
8G
ND
32
1
TE
ST
26
TXD1
RXD5
RTS3
CTS11
DTR2
DSR9
DCD10
RI6
CBUS023
CBUS122
CBUS213
CBUS314
CBUS412
R92
1.0K
R92
1.0K
D20
HSMY-C170
D20
HSMY-C170
AC
C590.1UFC590.1UF
123
4
+D
-D
G
V
J36
USB_TYPE_B
123
4
+D
-D
G
V
J36
USB_TYPE_B
1
234
S1
S2R91
1.0K
R91
1.0K
R93 27R93 27
L51000 OHML51000 OHM C63
0.01UFC630.01UF
C640.1UFC640.1UF
R94 27R94 27
C62
4.7uF
C62
4.7uF
D19
HSMY-C170
D19
HSMY-C170
AC
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ROTA
ROTB
LED1_Y
LED2_Y
LED3_Y
LED4_G
LED5_G
LED6_G
LED7_R
LED8_R
LED10_G
ROTSWLED9_G
LED11_G
+3.3VD_MCU
GNDD
GNDD
+3.3VD_MCU
GNDD
+3.3VD_MCU
GNDD
+3.3VD_MCU
+3.3VD_MCU
GNDD
GNDD
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
LEDs and Control
<Designer>
<Approver>
<DrawnBy>
9 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
LEDs and Control
<Designer>
<Approver>
<DrawnBy>
9 9
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Freescale Semiconductor RCSC
1. maje 1009765 61 Roznov p. R. Czech republic, Europe
This document contains information proprietary to Freescale Semiconductor and shall not be used forengineering design, procurement or manufacture in whole or in part without the express written permissionof Freescale Semiconductor.
ICAP Classification: FCP: FIUO: PUBI:
SCH-27496 PDF: SPF-27496 X
S12G BLDC Development Kit
B
Monday, February 06, 2012
LEDs and Control
<Designer>
<Approver>
<DrawnBy>
9 9
____X____
U13B
MC74HC04ADG
U13B
MC74HC04ADG
3 4
R981.0KR981.0K
R994.7KR994.7K
VCC
GND
U14A
MC74HC04ADG
VCC
GND
U14A
MC74HC04ADG
1 2
14
7
SW4EC11J1524802SW4EC11J1524802
COMMONC
AA
BB
DD
EE
GN
D1
S1
GN
D2
S2
GN
D3
S3
GN
D4
S4
GN
D5
S5
GN
D6
S6
D24
HSMS-C170
D24
HSMS-C170
AC
D22
HSMS-C170
D22
HSMS-C170
AC
D25
HSMY-C170
D25
HSMY-C170
AC
R1051.0KR1051.0K
R951.0KR951.0K
U13F
MC74HC04ADG
U13F
MC74HC04ADG
13 12
VCC
GND
U13A
MC74HC04ADG
VCC
GND
U13A
MC74HC04ADG
1 2
14
7
C650.1UFC650.1UF
U14C
MC74HC04ADG
U14C
MC74HC04ADG
5 6
R971.0KR971.0K
R1081.0KR1081.0K
D30
HSMG-C170
D30
HSMG-C170
AC
R1061.0KR1061.0K
C660.1UFC660.1UF
R961.0KR961.0K
U13E
MC74HC04ADG
U13E
MC74HC04ADG
11 10
R1041.0KR1041.0K
U14B
MC74HC04ADG
U14B
MC74HC04ADG
3 4
U14E
MC74HC04ADG
U14E
MC74HC04ADG
11 10
U13D
MC74HC04ADG
U13D
MC74HC04ADG
9 8
D23
HSMY-C170
D23
HSMY-C170
AC
R1071.0KR1071.0K
D31
HSMG-C170
D31
HSMG-C170
AC
R1021.0KR1021.0K
R1031.0KR1031.0K
R1004.7KR1004.7K
D27
HSMG-C170
D27
HSMG-C170
AC
D29
HSMG-C170
D29
HSMG-C170
AC
U14F
MC74HC04ADG
U14F
MC74HC04ADG
13 12
D28
HSMG-C170
D28
HSMG-C170
AC
U14D
MC74HC04ADG
U14D
MC74HC04ADG
9 8
R1014.7KR1014.7K
U13C
MC74HC04ADG
U13C
MC74HC04ADG
5 6D26
HSMG-C170
D26
HSMG-C170
AC
D21
HSMY-C170
D21
HSMY-C170
AC
MC9S12G128 Controller Board Schematic
MC9S12G128 Controller Board User Guide, Rev. 1.0
38 Freescale Semiconductor
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MC9S12G128MCBUGRev. 1.008/2012