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Silicon ImagingSI-6600 MegaCamera

6.6 Million Pixel Progressive Scan Digital Camera

Revision 1.7February 14, 2004

6.6 Million Pixels 3.5 um Square Pixel3002 x 2210 Portrait SensorRolling Shutter Windowing and Subsampling7~500 Frames per Second10 Bit Digital SamplingMono or Bayer Color CameraLink Interface

**** Company Confidential ****

Silicon Imaging , Inc. 2004 of 40 Company Confidential

SI-6600-M & RGB MegaCamera™ 6.6 Megapixel (2210 x 3002), 10-Bit, 60MHz Ultra-High Resolution Portrait Camera

INTRODUCTIONSilicon Imaging is proud to continue its innovation in ultra-high resolution machine vision camera. Driven by the growing demand for consumer Digital Still Cameras, CMOS sensors are continuing to break technical barriers and surpass the performance characteristics of CCD’s in many photonic, imaging and consumer applications. By utilizing a single highly integrated CMOS device, which incorporates Megapixel sensing areas, timing generation, signal processing and high bandwidth outputs, Silicon Imaging has developed a very compact, low-power, ultra high speed Megapixel digital camera system.

2210 x 3002 Megapixel Imaging - Ultra Resolution The SI-6600 is an all-digital CMOS camera that delivers 6.6 Million pixels of resolution and is capable of running at 6 frames/second at its full 2210 x 3012 resolution and over 500 frames/per second at 320 x 240 resolution. The entire package is only 45 x 52 x 50mm (33 x 40mm x 22mm in PCB) and is small enough to placed on a robot for semiconductor machine vision inspection or placed in an outdoor housing for remote surveillance. It is ideal for live visualization of documents or films and scanning of biometrics for handprint or facial recognition.

10-Bit Pixel Clock Sampling – Sub-Pixel AccuracyThe SI-6600 MegaCamera uses 10-Bit digitizers to sample the pixel data. Converting the pixel data directly to digital at the sensor head eliminates pixel-sampling jitter and enables accurate sub-pixel metrology, image analysis and improved live video reconstruction. A programmable clock which ranges from 20~60MHz allows for trade-offs in speed versus exposure time and lower noise.

1000 FPS - Windowing & Subsampling Ideal for object tracking and high-speed Motion analysis, the SI-6600 is capable of generating imagery at over 1000 frames per second by reducing the size of the readout image (ex. 100x100). This windowed Region-of–Interest (ROI) can be moved dynamically, creating an entirely electronic pan/tilt/zoom function within the camera field-of-view.

Dual Slope Exposure - “Super-Dynamic Range” The SI-6600 can be used in a dual slope bi-linear mode, extending the useful dynamic range in scenes where detail in bright areas are to be preserved at the same time as maintaining details in darker regions. In normal linear response, a camera requires a short exposure to keep the bright areas from saturation. However, the darker regions of the image would not have enough time to integrate charge. If the exposure is set longer the detail in the dark areas will become visible by the brighter areas will become saturated. The dual-slope operation combines the transfer of nominal integration time (steep slope, high sensitivity) with the transfer curve obtained from a short electronic shutter (shorter exposure time, lower sensitivity), into a single exposing operation.

CameraLink Digital Interfaces An industry standard forum has adopted Camera Link, for low cost connectivity and cabling of cameras and frame grabbers at very high speeds. The SI-6600-CL utilizes the high speed CameraLink interface to output 2210 x 3002, 10 bit data at up to 60MHz continuously to a frame grabber and directly into PC memory for further processing. The single cable includes image data, vertical and horizontal synch, LVDS Triggering and 9600 baud Serial communication. As this camera complies with the standard, it is compatible with many popular frame grabber and image processing hardware devices and fiber-optic extender for extended distance transmission.

FEATURES · 2210 x 3002 Resolution (6.6Million Pixels)

· Rolling Shutter, Progressive scan

· 1” Imaging Format , 3.5um Square Pixel

· Windowing and Subsampling

· 10 Bits per Pixel, 20~60MHz Sampling

· High Speed Readout (8 ~ 1000FPS)

· Region-of-Interest (ROI) windowing

· Progressive Rolling Shutter Mode

· Programmable Gain, Offset, Clock, Shutter & ROI

· External Clock Synchronization (FrameLock) · Monochrome & Color Bayer RGB Models

· 5VDC Low Power, Small Package · C-Mount Housing or PCB versions

· CameraLink Interface


SI-6600 MegaCamera CameraLink Specifications Image Sensor

Active Pixels 2210 H x 3002 VPixel Size (pitch) 3.5µm x 3.5µmOptical Format 1” (7.7 x 10.5 mm) Pixel Type CMOS, 3-TAspect Ratio 1 : 1 Spectral Response 400 ~ 1000 nm Fill Factor 35% (Peak QE x FF = 20% @ 630nm)

Responsivity 250 V per Ws/m0.1 A/W (Spectral Response * FF)

Conversion Gain 33 uV/e-Dark Current 30 mV/sec @ 21CTemporal Noise 24 e- @ 40MHz SNR 45dBSaturation Charge 26,500 e-

Output swing 0.8V at Unity GainDynamic range 61 dB (1100:1)PRNU 1.5%rms Photoresponse nonuniformityWindowing (ROI) H & V. Vertical speed increase onlySub-sampling Full, 1/4 , 1/9, 1/16, 1/36 (COLOR)Gain MAX 1 ~ 14.67XReadout Method Progressive Scan Black Level Programmable Min Row Time 142 clocks (Horizontal Blanking)Vertical Blanking 1 Row

A/D Conversion & Pixel Clock Synthesizer A/D Conversion Nominal 40Mhz (5.3fps @ 6.6MP)Vertical Resolution 10 Bit (Format = 12bit-CL 1-Tap) Clock Frequency 20 ~ 60 Mhz Programmable Adjustments Black Level, Column Balance, Gamma

Curve

Digital Video Output

Readout Rate 20 ~ 60Mhz x 12bit format

Readout Format CL-12 Bit, 1-Tap Frame Rate 2200 x 30001106 x 1502

738 x 10022048 x 15361280 x 1024

640 x 480 320 x 240 160 x 120

40 MHz 5

21451227

104344

1029

6 0MHz 8

32681841

155517

1543 Frame Time 2210 x 3002 @ 40MHz = 187.5msec

CameraLink Frame Grabber Control: Serial Communication RS-232 Protocol 9600bps (57.6k) Signaling TX & RX (LVDS)

Asynchronous Triggers LVDS – CC1 (-CL) TTL Trigger-In / Strobe-Out(option)

Region-of–Interest Programmable Horiz & Vertical

Programmable Modes Gain, Windowing, Clock rates, Exposure, Subsampling, black level, Column Balance, NDR.

Gains Range: 1~14.67XSetting Timing Next top of Frame Ext Clock Sync Clock in or Clock Out (-X Option)

Power Input Voltage +5 VDC +/- 10% Power 2.5 Watts

Power/Trigger Connection Tajimi RO3-PB3M 3Pin (-CL) Tajimi RO3-PB5M 5Pin (-X)

MechanicalLens Mount C-Mount, 7mm Back focus Adj. Enclosure Size 45mm W x 52mm H x 50mm L Weight 12 oz. Camera Mount ¼” x 20 standard tripod mount Cable Connector Cameralink MDR-26

Spectral Response Curve (Monochrome)

SI-6600- M,RGB -CL 6.6 Megapixel Cameralink Camera, M=Monochrome, RGB= Bayer ColorSI-6600- M,RGB -S 6.6 Megapixel Cameralink Camera, 32-bit PCI Frame Grabber, 2M cameralink, Power Supply & CablesSI-6600- M,RGB -GR 6.6 Megapixel Cameralink Camera, Gig-ELink Interface, 2M cameralink, Power Supply & CablesCL-2,3,5,10 Cameralink Cables, 2-meter, 3-meter, 5-meter, 10-meterPS-5 5VDC Power Supply


PC-2 Power Cable, 2-MeterCBL-3PT Cable, 3Pin Tajimi to TTL Trigger-In & Power Input Plug

Camera Architecture Overview

The MegaCamera SI-6600 consists of 6 major component sections, which are built on two circuit boards.

1.) 6.6 Megapixel Sensor2.) Digital Clock Synthesizer3.) 10-Bit Digitizing System4.) Microprocessor5.) CameraLink Interface6.) Power Regulation

7.) Trigger & Clock Controls

SI-6600 Camera Block Diagram

PCB OEM Version 44 x 33 x 14mm - 2PCB


Actual size


1.) 6.6Megapixel CMOS Image Sensor (2210 x 3002)The MegaCamera SI-6600 utilizes a proprietary portrait style 6.6 Million pixel high-speed CMOS image sensor. Each pixel is 3.5um square, ideal for image processing, and the entire array fits the 1” format for flexible optic choices. This reduction in process geometry allows for both an increase in transistors and fill factor without compromising performance, plus offers more advanced readout controls, greater speeds and lower power dissipation. This new sensor technology offers a more responsive pixel design with added circuitry for increased dynamic range, greater sensitivity, decreased fixed pattern noise and low dark current for long exposure applications. Unlike CCD, which leak charge to adjacent pixels when the registers overflows (blooms), the SI-6600 provides inherent anti-blooming protection in each pixel, so that there is no blooming.

The array has 2210 pixels on a line and 3002 rows, which result in a near 3:4 portrait aspect ratio. The image can be rotated 90-degrees to obtain a 4:3 image. In addition, by using the windowing feature, a 16:9 aspect ratio (eg. 1280x 720) or 1:1 aspect ratio (1024 x 1024) are available. At smaller ROI sizes (eg. 128 x 128) frame rates in excess of 1000fps.

The SI-6600 MegaCamera achieves high data rates by simultaneously accessing two adjacent pixels at a time and reading them out sequentially. These pixel values feed thru a gain & offset amplifier and then to on-board dual 10-Bit A/D converters and placed onto a 12-bit data bus for transmission. The entire imager field of view can also be readout using subsampling. In this mode, 2 pixels are readout and a group of pixels are skipped. As fewer pixel are output, the frame rate increases.

In a color model, a Bayer filter covers each of the pixels to produce a pattern of values that represent the color information, which must be processed and interpolated to obtain an RGB value per pixel. The 12-bit output format from the camera is identical for monochrome and color models.


SI-6600 QE Performance & Response CurveThe following figure shows the 6600 spectral response characteristics. The curve is measured directly on the pixels. It includes effects of non-sensitive areas in the pixel, (e.g. interconnection lines).

The camera sensor is light sensitive between 400 and 1000 nm. The peak QE * FF is 22.5% approximately between 500 and 700 nm. In view of a fill factor of 35%, the QE is thus close to 70% between 500 and 700 nm.

Photo-voltaic response curve

The figure above shows the pixel response curve in linear response mode. This curve is the relation between the electrons detected in the pixel and the output signal. The resulting voltage-electron curve is independent of any parameters (integration time, etc). The voltage to electrons conversion gain is 37 µV/electron.


2.) 10-Bit Digital Sampling System A 10-Bit Analog-to-digital (A/D) converter samples each pixel value and quantizes it into 1024 levels, as it is clocked out of the sensor. Pixel clock sampling ensures precise measurement of the photonic charge without the jitter and sampling uncertainty associated with traditional analog video systems, such as RS-170 and CCIR. The produces images which can deliver improved photometry accuracy and sub-pixel metrology. The use of 10-bit converters versus traditional 8-bit systems further enhances the image dynamic range. The combination of 10-bit vertical resolution and pixel clock sampling provide precise sub-pixel measurement accuracy (ex. 1/10 pixel).

3.) Digital Clock Synthesizer A wide range a master clock frequencies (eg. 20 to 60MHz) can by precisely generated using the Digital Clock Synthesizer. The Frame Grabber, which is used with the camera, must be capable of receiving 12bit at 60Mhz to achieve the highest data rates. Without any byte packing of the 12-bit word the data rate would be 120MHz (2pixel x 2bytes/pixel x 60MHz). In standard 32Bit/33MHz PCI computers the maximum data rate directly to host memory is usually below120Mbytes/sec (from 132MB/sec bus) without system interrupts. However, 100MB/sec is more reasonable rate to achieve with other system devices operating (eg. display, clock, mouse etc.). Under these condition the 12-bit data can be mapped to 8-bits/pixel to reduce the bus traffic or the clock rate can be reduced to and still maintain 12bits/pixel. The frequency of the clock synthesizer can be set by serial command. A table with associated clock frequency is found in the serial programming section of the manual. Due to minimum frequency restriction on the digital transmission link, the pixel clock frequency cannot be lower than 20Mhz.


4.) Embedded MicroprocessorA microprocessor in the camera provides the control interface between the PC and the functional block in the camera (Sensor, Clock Synthesizer, Register Memory, Channel Link Interface & Serial port (CameraLink). The Microprocessor receives commands thru the LVDS level serial port and issues commands to the other devices. It also can store preset values for camera setting, which can be recalled with single ASCII character commands. Several digital I/O or analog sampling signals are available on the processor from PCB header points for custom OEM applications.

5.) 12-Bit CameraLink Interface (Base Configuration)

Camera Link is a new digital transmission method designed by imaging component manufacturers as an easy and standard way to connect digital cameras to frame grabbers. The Camera Link specification includes greater than 1.2Gb/sec data transmission as well as camera control and asynchronous serial communications all on a single cable with high-density 26pin connector. Only two connections are required to quickly interface your digital camera to a multitude of frame grabbers. This standardization will ultimately reduce cost of high performance digital cameras through open market competition and a simple migration path to faster and higher resolution systems.

As a standard that has been defined by industry members, Camera Link provides the following benefits:

Standard Interface: Every Camera Link product will use the same cable and signaling. Cameras and frame grabbers can easily be interchanged using the same cable.

Simple Connection: Only two connections will be required to interface a camera and frame grabber: Power and Camera Link.

Lower Cost: Because Camera Link is an industry-wide standard, consumers will be able to take advantage of lower cable prices.

Smaller connectors & cables: The technology used in Camera Link reduces the number of wires required to transmit data over traditional LVDS or RS-422 parallel interfaces, allowing for smaller cables. Smaller cables are more robust and less prone to breakage.

Higher data rates: The technology used in Camera Link has a maximum data rate of 2.3GB/s, for use in the most demanding high definition, high frame rate and line scan.

CameraLink Camera Signal This section provides definitions for the signals used in the Camera Link interface. The standard Camera Link cable uses a MDR 26-pin connector (3M Part# 10226-6212VC)provides the following signaling:

Video Data (4 Pairs using 28:4 Mux, 24 Video, 4 Control)

Camera control signals (1 Pair)

Serial communication (2 Pairs)

Power (3 pair) – Optional Control signals 2, 3, 4

Video DataThe 24 bit image data (2 words x 12 bit) and 4 control bits are transmitted over only 4 differential pairs using a 28:4 multiplexer (National Semiconductor DS90CR285 Channel Link device). The Four enable signals are defined as:

• FVAL—Frame Valid (FVAL) is defined HIGH for valid lines.

• LVAL—Line Valid (LVAL) is defined HIGH for valid pixels.


• DVAL—Data Valid (DVAL) is defined HIGH when data is valid.

• Spare— A spare has been defined for future use.

All four enables are provided on the camera, via the Channel Link chip. The unused data bits are tied to a known value by the camera. For more information on image data bit allocations, see page 11, CameraLink Base Configuration Bit Assignment Configuration.

Communication

Two LVDS pairs have been allocated for asynchronous serial communication to and from the camera and frame grabber. Cameras and frame grabbers should support at least 9600 baud. These signals are

• SerTFG—Differential pair with serial communications to the frame grabber.• SerTC—Differential pair with serial communications to the camera.

The serial interface operates at 9600 baud, one start bit, one stop bit, no parity, and no handshaking. For applications requiring high serial throughput, such as real time windowing update at over 200FPS, the camera can support a serial link mode at 57kbs (not specified in CameraLink spec). The frame grabber serial communication must be set to match this speed.

Camera Control Signals & Power

Four LVDS pairs are reserved for general-purpose camera control. They are defined as camera inputs and frame grabber outputs. Camera manufacturers can define these signals to meet their needs for a particular product. The signals are:

• Camera Control 1 (CC1) - Used to do triggered image capture

• Camera Control 2 (CC2) for external master clock (optional)

Tajimi RO3-PB3M – POWER CABLE


5VDC Power Supplies

3-PIN POWER & TRIGGER INPUT WIRING

PhotoEye Trigger and Power Connection


Power-On Communication & PresetsInitial State When the power is first applied to the camera the camera will load its default (Preset #1) settings and will be generating live video and a serial status message. Preset #1 can be overwritten thru programming commands. Once Preset#1 is overwritten it will be the new power-on default setting.

If the Frame Grabber supports a serial terminal mode the following menu will appear:

100: Booted 108: CameraLink SI6600 120:C2010610 Sensor tag 190:66633035 Configuration code

's' - statusReturns the firmware version, clock configuration word, Sensor Tag, and FPGA Configuration code. Camera output example:

108: CameraLink SI1280F 3.06.08 110:306882 Clock 120:C2010610 Sensor tag 190:66633035 Configuration code

Default SettingsWhen first turned on, the SI1280F will be in the default mode, which will be 11.5 fps Full Frame Readout at 40MHz master clock. See serial programming section for details on changing formats.

Full Resolution, Rolling Shutter, Single-slope, 40MHz

Resolution = 2210 x 3002Clock = 40MHzFrame Rate = 6 FPSIntegration = 2900 RowsGlobal Gain = 1.8


Serial Communication & Protocol

The SI1280F is capable of mode programming through its serial interface. Commands are sent from the CameraLink frame grabber to the camera. The commands are processed by the micro controller and communicated to various devices in the camera including the sensor, digital clock synthesizer and the Flash memory inside the microprocessor itself.

The communication uses an asynchronous serial format, similar to RS232, but is transferred to the camera using LVDS as part of the CameraLink interface specification.

Format: Asynchronous, ASCII Rate: 9600Data Bits: 8 + 1 Stop bitsParity: No ParityInterface: Serial LVDS (thru CameraLink)

The baud rate is set to 9600 and 8 data bits with no parity. This is the format set by the CameraLink standard. However, faster rates can be set by the factory and coordination with the Frame Grabber supplier.

Serial CommandsThere are two types of commands Single character and Register String (multiple characters followed by Carriage Return). Once the camera receives the string ending with a <CR> it will respond. For each command, there is a corresponding action and response from the camera.

Single Character commands

“s” Camera status including firmware version, clock configuration word, sensor tag and CPLD configuration codes.

“f” Arm Frame capture. Trigger frame capture if already armed.

“v” Arm live video trigger mode. Trigger with CC-1 or ‘c’ command (Not Implemented)

“c” Exit from single Frame capture mode and return to continuous or command mode

“h” Change to high-speed serial mode for operation at 57.6kbaud. (Not Implemented)

*** Note: All commands must terminate with a <cr> (carriage return).


Register String commands

These are multiple character string commands with a common format.

Command Description Parameters Responselc xxxxxx <cr> Load Clock Register

(See clock table)xxxxxx = 6 hex values from table 114: Clock updated

ly r xxx <cr> Load Sensor Registers Loads registers 0 to b with 12bit values, which are sent as 3 hex characters

r = register number 0~b xxx = x000~xFFF (0~4095)

104: Sensor updated

le x <cr> Load EEPROM preset value ***overwrites factory values

x = 1 (one hex character) le1 = stores preset #1

106: Preset updated

'luAA[YYXXx16]' Load upper/user memory7k-Bytes. Configured in 256 slots. Each slot has 16 memory locations of14bits for

AA = slot (00 ~FFYY = Memory (00-10)XX = 14 bit value (00~ FThe first two bits (MSBs) of the first byte and of every odd byte are not stored.

lr xxxx Read back user/upper memory

ln xxxx Load new program

*** Note: All commands must terminate with a <cr> (carriage return). Hex characters are lower case, no spaces.

Register Command Format

There are eleven registers in the SI-6600, which control the sensor readout, timing and signal output level. Each command may be entered through the Terminal communication mode from the frame grabber software. All ASCII characters sent should be lower case and no spaces between characters. The string is terminated with a carriage return <cr>. Hex numbers are sent as ASCII characters: 0Fh is sent as “0f” character. There are no spaces between characters being sent in strings.

Sensor register commands are sent

ly r xxx <cr> r = register number xxx = values 0 to 4095 or 000 to fff in hex.

The ly stands for load sensor array and must be sent as lower case. The “r” is the register to be changed. The “xxx”, “represents three HEX values that are to be loaded into each register. The sequence must end with a carriage return. The following is an example of a 10-character command string

ly 1 2 3 4 <cr> | | | | | I----Carriage return | | | | L--- 1 character, last nibble | | | L_____1 character, middle nibble | | L_______ 1 Character first nibble | L__________ 1 Character, Register number: From 0 to b. L______________ 2 Character, Register Command: Load Sensor Register

This command will load the WIDTH register “1” with hex “234” The resulting value loaded into the Width register is “234” or 564 in decimal. The width value is modulo2 and therefore represents 564 * 2 = 1128 pixels..


SI-6600 Sensor Register Programming

0 10:0(x000) READOUT

Bit 0: 0= Normal, 1= Non-Destructive read(NDR)Bit 1:2 NDR ModeBit 10 0=normal, 1= output DAC_Dark

1 10:0(x457)

WIDTH /2 Number of pixels to count (X direction).

Pixels in row.Width Max. 2222/2 = 1~1111

2 11:0(xbc5)

HEIGHT Number of lines to count (Y direction).

Rows in frameHeight Max. 3014 = 1 ~ 3014

3 11:0(xb93)

INT_TIME Exposure Counter

Exposure time = HEIGHT - INT_TIME + 1Note: Register must be Less than Height

5 6:0(0x000)

Begin_Column (X-origin) = X / 24

X start position (0 to 98). This register determines the start position of the window in the X-direction in steps of 24.

6 7:0(0x000)

Begin_Row (Y-origin)= Y / 24

Y start position (0 to 137).This register determines the start position of the window in the Y-direction in steps of 24.

7 7:00x000)

SUBSAMPLING

Bits 0,1 = 0Bits 7:2 = Subsampling X-direction (bits 2:4) Y-direction (bits 5:7)

Subsampling ly7 xxx <cr>1:1 ly7 0001:4 ly7 0241:9 ly7 048

1:16 ly7 06c1:36 ly7 090

8 4:0(0x003) GAIN

Bits 3:0 Output amplifier gain setting (see table)Bits 4 1 = unity gain 0 = setting by GAIN<3:0>All other bits set to 0

Gain Bits (0:3) ly8 xxx <cr>

1.36 0000 ly8 000

1.64 0001 ly8 001

1.95 0010 ly8 002

2.35 0011 ly8 003

2.82 0100 ly8 004

3.32 0101 ly8 005

3.93 0110 ly8 006

4.63 0111 ly8 007

5.40 1000 ly8 008

6.35 1001 ly8 009

7.44 1010 ly8 00a

8.79 1011 ly8 00b

10.31 1100 ly8 00c


12.36 1101 ly8 00d

14.67 1110 ly8 00e

14.67 1110 ly8 00e

17.38 1111 ly8 00f

9 7:0 (0x080)

BLACK LEVEL (256 levels) Black level offset for both odd and even columnsValues: 0~255.

a 7:0 (0x080) COLUMN BALANCE (256 levels) Odd/Even amplifier balance

Values: 0~255

b 7:0 (0x040)

DAC Dark (256 levels) Sets the voltage level that is put on the internal busses during calibration of the output stage.

c 7:0 (0x000)

ADC Settings Bit 9 GAMMA CURVE ( 0 = linear, 1 = ‘gamma’)Bit 10 INVERT (0 = normal ,1 = inversion of bits)All other Bits set to 0!


SI-6600 Digital Clock Synthesizer Programming

The SI-6600 has a Digital Clock Synthesizer capable of generating a range of frequencies from 20MHz to 60MHz. The pixel data output rate is the same as the sampling clock rate. A range of preset frequencies are listed below:

Clock 6.6MP 3.2MP 2.1MP 1.3MP SVGA VGA QVGA QQVGACommand MHz 2200 x 3000 2048 x 1536 1600 x 1200 1280 x 1024 800 x 600 640 x 480 320 x 240 160 x 120lc306886 20 3 6 9 14 35 52 172 514lc30b689 25 4 7 12 17 43 65 215 643lc37cb8f 30 4 9 14 20 52 78 258 772lc35d40b 35 5 10 17 24 61 91 301 900lc306882 40 6 12 19 27 69 104 344 1029lc35e709 45 6 13 21 30 78 117 387 1157lc34b689 50 7 15 24 34 86 130 430 1286lc34b688 55 8 16 26 37 95 143 473 1415lc36cb8f 60 8 18 28 41 104 155 517 1543

The clock frequency is programmed by the “lc” command with by 6 HEX characters. An example is:

“lc36cb8f <cr>” This will request a clock value of 60MHz.

The response to a command will be:

114: Clock updated

There are multiple setting to achieve each frequency. Some might be better than others for a particular application. The factory can generate the command to achieve a targeted clock rate.

Frame Rate Calculation

Each row of the image requires and additional 142 clocks of blanking to perform readout. Therefore to calculate the frame rate for any clock rate the equation is:

( clock rate(Hz) ) = # Frames Per Second (fps)

( # of columns + 142) * ( # of rows)

Example: What is the frame rate, at 45MHz clock rate for an image size of 1280 x 1024?

45 x 10 6 = 30 Frames Per Second (fps) ( 1280 + 142) * (1024)

*** Subsampling frame rates are based on the resulting size of the subsampled image or window. In order to obtain the increase frame rate the Width and Height Registers (1 & 2) must be set to the size of the desired output image.


Rolling Shutter Exposure - Register 3

The exposure time for each frame can be adjusted using the camera’s electronic rolling shutter. The amount of exposure or integration time, is set by loading a row counter into Register 3. This register is the number of row times the imager is not exposing. Therefore, the exposure will depend on the height (Register 2).

Row Time = (# of pixels in Row + 142) * clock rateExposure = Row_Time * (Height - Register 3 + 1)

In Rolling shutter, each line in the image has the same amount of integration, however the start and end time of integration is shifted in time as the image is scanned (rolled) out of the sensor array, similar to a curtain shutter of a SLR film camera. Although it is a pure electronic operation, the shutter seems to slide over the image.

An object, which moves during the typical 1/30sec readout time, can display a stretched or skewed perspective, in the direction of motion. For example, a vertical line can appear tilted if the object moves several horizontal pixels during readout. The faster the object moves the larger the tilt. The crispness or detail of the line will be determined by the shutter speed (integration time). It will not appear smeared if the shutter speed is shorter than the full frame time. This artifact can be minimized by maintaining the shortest possible readout time (faster clock). The benefit of rolling shutter mode, is that exposure and readout are overlapping, enabling full frame exposures without reducing frame rate.

The following is a table of commands to set shutter speeds in Register 3, based on full image size (2210 x 3002).

Shutter Speed

Number of Rows58.8 usec/row (40MHz)

Register Value(3002 – # of rows)

Register Commandly3 xxx <cr>

1/10 1700 1302 5161/30 567 2435 9831/50 340 2662 a661/60 283 2719 a9f

1/100 170 2832 b101/250 68 2934 b761/500 34 2968 b981/1000 17 2985 ba91/4250 4 2998 bb6

** Note: Exposure_Time must be set less than the number of rows (Height: Register 2) in the image.


Window Size and Position – Registers 1, 2, 5, 6The frame size and readout position is selected through the programming of registers 1, 2, 5 and 6.

1 10:0(x457)

WIDTH /2 Number of pixels to count (X direction).

Pixels in row.Width Max. 2222/2 = 1 ~ 1111

2 11:0(xbc5)

HEIGHT Number of lines to count (Y direction).

Rows in frameHeight Max. 3014 = 1 ~ 3014

5 6:0(0x000)

Begin_Column (X-origin) = X / 24

X start position (0 to 98). This register determines the start position of the window in the X-direction in steps of 24.

6 7:0(0x000)

Begin_Row (Y-origin)= Y / 24

Y start position (0 to 137).This register determines the start position of the window in the Y-direction in steps of 24.

Pixels are always readout in pairs to preserve color bayer patterns in subsampling. Therefore, the Width register can only be set in increments of 2. The Height register can be selected to any number of rows.

The beginning row and column of readout can be set in steps of 24 pixels, the lowest common multiple of the subsampling modes. This step size enables nuber of choices for the Begin_Row register to be 99 and Begin_Column register to be 138.

To place a 640 x 480 window at starting coordinate 1080, 1272

ly 1 140 WIDTH to ( 640 / 2 ) = 320 (0x140h)ly 2 1df HEIGHT to 480 (0x1F0h). ly 5 02d BEGIN_COLUMN to 1080/24 =45 (0x02dh).ly 6 035 BEGIN_ROW to 1272/24 =53 (0x035h).

Note: Other custom commands can be implemented to move the window at high speeds – please consult the factory.


Subsampling – Register 7

The complete Field of View (FOV) of the camera can be seen at reduced resolution and higher frame rates by skipping groups of pixels (aka. Subsampling). Several subsampling modes are provided from 2x for 6x in both x and y (row or columns) directions. It is also possible to set subsampling ratios in x and y, independently.

Register 7 (0x000)

Subsampling-X 7:0Bits 0,1 = 0Bits 2:7 = define the sub-sampling mode X-direction (bits 2:4) Y-direction (bits 5:7)

Command Subsampling ly7 000 1:1 ly7 024 1:4 ly7 048 1:9 ly7 06c 1:16 ly7 090 1:36

To preserve the bayer color information, 2 adjacent pixels are read in any mode, while the number of pixels that is skipped, varies from mode to mode.

Command Subsampling XxY Reduce Read Step Skip Resolution 40MHz (fps) 60MHz (fps)A ly7 000 1:1 1x1 2 0 0 2210 x 3002 5.7 8.5B ly7 024 1:4 2x2 2 4 2 1106 x 1502 21.3 32.0C ly7 048 1:9 3x3 2 6 4 738 x 1002 45.4 68.5D ly7 06c 1:16 4x4 2 8 6 554 x 752 76.4 114.6E ly7 090 1:36 6x6 2 12 10 370 x 502 155.6 233.4

NOTE: In order to obtain the increase frame rate the Width and Height Registers (1 & 2) must be set to the size of the desired output image.


1:1 (1x1)

1:4 (2x2) 1:9 (3x3)

1:16 (4x4) 1:36 (6x6)


Gain, Offset & Balance – Registers 8, 9, A & B

Each pair of pixels is output thru a differentail amplifier which subtracts the reset (R) voltage and signal (S) voltages from each other to cancel out FPN as much as possible (Stage 1).

84:0

GAIN Bits 3:0 Output amplifier gain setting (1x ~ 14.67x) Bits 4 0 =setting by GAIN<3:0> , 1 = unity gain All other bits set to 0

97:0

BLACK LEVEL (256 levels) Black level offset for both odd and even columnsValues: 0~255

A7:0 COLUMN BALANCE (256 levels) Odd/Even Amplifier Balance

Values: 0~255

B7:0

DAC Dark (256 levels) Voltage level put on the internal busses during calibration of the output stage.

The black level adjustments consists of 2 DACs (DAC_Raw & DAC-Fine). The main offset DAC_raw is adjusted with Register 9 (BLACK LEVEL) and adjusts both odd and even columns. The DAC-fine allows fine-tuning of the offset difference between the signal paths arriving at the two amplifiers A1 and A2, using Register A (COLUMN BALANCE). There are 128 possible levels for offset and balance.

The third DAC (DAC_dark) puts its value on the busses during the calibration of the output amplifier. In case of non-destructive readout (no double sampling), bus1_R and bus2_R are continuously connected to the output of the DAC_fine to provide a reference for the signals on bus1_S and bus2_S. The non-destructive readout capability is not currently implemented in the camera.

The FPN corrected data is fed to programmable gain amplifiers (stage 2) and are programmed via Register 8 (GAIN) and output to a pair of A/D converters for digital conversion.


Gain Setting Commands – Register 8There are 16 choices of Gain (000h~00fh). The values are as follows:

Gain Bits (0:3) Command1.00 xxxx ly8 01x1.36 0000 ly8 0001.64 0001 ly8 0011.95 0010 ly8 0022.35 0011 ly8 0032.82 0100 ly8 0043.32 0101 ly8 0053.93 0110 ly8 0064.63 0111 ly8 0075.40 1000 ly8 0086.35 1001 ly8 0097.44 1010 ly8 00a8.79 1011 ly8 00b

10.31 1100 ly8 00c12.36 1101 ly8 00d14.67 1110 ly8 00e

17.38 1111 ly8 00f

To set a gain of 1.95:

ly 8 002 <cr> Set gain to 1.95


ADC (Gamma & Invert) – Register C

If GAMMA is set to 0, the ADC input to output conversion is linear, otherwise the conversion follows a ‘gamma’ law (more contrast in dark parts of the window, lower contrast in the bright parts). If BITINVERT = 0, 0000000000 is the conversion of the lowest possible input voltage, otherwise the bits are inverted.

C7:0

ADC SettingsBit 9 GAMMA CURVE 0 = linear conversion 1 = ‘gamma’ conversionBit 10 INVERT 0 = no inversion of bits 1 = inversion of bitsAll other Bits set to 0!

Non-Destructive-Readout (NDR) – Register 0The default mode of operation of the sensor is with FPN correction (double sampling). However, the sensor can also be read out in a non-destructive way. After a pixel is initially reset, it can be read multiple times, without resetting. The initial reset level and all intermediate signals can be recorded. High light levels will saturate the pixels quickly, but a useful signal is obtained from the early samples. For low light levels, one has to use the later or latest samples.

Figure: Principle of non-destructive readout.

Essentially an active pixel array is read multiple times, and reset only once. The external system intelligence takes care of the interpretation of the data. The advantages and disadvantages of non-destructive readout.

Advantages Disadvantages

Low noise as it is true CDS. In the order of 10 e- or below.

System memory required to record the resetlevel and the intermediate samples.

High sensitivity – as the conversion capacitance is kept rather low.

Requires multiples readings of each pixel; Thereby has limited frame rate and possible motion image blur.

High dynamic range – as the results includes signal for short and long integrations times.

Requires digital post processing to create the final image.

In normal operation (NDR = 0), the sensor operates in double sampling mode. At the start of each row readout, the signals from the pixels are sampled, the row is reset and the signals from the pixels are sampled again. The values are subtracted in the output amplifier. When NDR is set to 1, the sensor operates in non-destructive readout (NDR) mode


NDR_Modes - Reg 0 (bit 1 and 2)

There are basically two modes for non-destructive readout (Mode 1 and Mode 2). Each mode needs two different frame types of readout. First is a reset/readout sequence (reset_seq) and then one or several pure readout sequences (read_seq).

NDR Mode Reg 0 (Bits 0:2)

Mode1 - Reset 100

Mode1 - Read 101

Mode2 - Reset 110

Mode2 - Read 111

MODE 1 – Long Integration NDR

In this mode, the sensor is readout in the same way as for normal readout. However, the electronic shutter control is disabled. The minimal (integration) time between two readings of a row is equal to the number of lines that has to be read out (frame read time). In Mode 1, the time Tint between two readings of the same row is given by

Tint Integration time [# lines] = NROF_LINES register + 1

MODE 2 – Short Integration NDR

In mode 2, it is possible to have a shorter integration time than the frame read time. Rows are alternating read out with the left and right pointer. These two pointers can point to two different rows by setting the INT_TIME (Reg 3). The (integration) time between two readings of the same row is equal to the number of lines that is set in the INT_TIME register times 2 plus 1 and is minimal 1 line read time.

In setting Mode 2 -Reset, the row that is read out by the left pointer is reset and read out (first Y_CLOCK), the row that is read out by the right pointer is read out without resetting (second Y_CLOCK).

In setting Mode 2 - Read, both rows are read out without resetting (on the first Y_CLOCK the row is read out by the left pointer; on the second Y_CLOCK the row is read out by the right pointer).

In Mode 2, the times Tint1 and Tint2 between two readings of the same row (alternating) are given by

Tint1 Integration time [# lines] = 2 * INT_TIME + 1

Tint2 Integration time [# lines] = 2 * (HEIGHT + 1) – (2 * INT_TIME register + 1)

For both modes, the signals are read out through the same amplifier path as with destructive readout (double sampling) but the busses that are carrying the reset signals used for FPN correction are set to the voltage given by DAC_DARK (Reg A).


Live Register ProgrammingOnce the camera is running in LIVE Rolling shutter, all the sensor control and clock registers can be modified.

Clock Exposure Window Size & Position Gain & Offset

The sensor register values are loaded at the next top of frame and will not interrupt the video timing. It is therefore possible to have different set of values for every image output from the camera. However, it can take up to 1 additional frame time to see certain results dependant on where in the frame cycle time the command is sent.

The clock frequency change command will take effect immediately, during the frame time. The Clock change is not internally synchronized to the frame readout, as it is usually set for the application and not changed on the fly.

Binary to Hex (ASCII) TableBinary Hex in ASCII0000 00001 10010 20011 30100 40101 50110 60111 71000 81001 91010 a1011 b1100 c1101 d1110 e1111 f


Response Codes

000:XXXX Sensor Chip ID. This is sent at boot time, and also when the status command is issued.

0XX:XXXXXX... Sensor registers. This message gives the address and contents of a chip register. 16 bytes of register data will be sent on each line.

100: Booted This is the first string sent when the Camera boots. It will later be augmented with a firmware version number.

102: Default loaded A message sent a boot time after the sensor and clock have been programmed.

104: Sensor updated A response that follows the "ly..." command.

106: Preset updated A response that follows the "le..." command.

108: CameraLink SI6600F 2.12.30

Output by the ‘s’ status command. Identifies the camera model, interface and firmware version

110: XXXXXX Clock Output by the ‘s’ status command. It gives the current clock setting.

114: Clock updated A response that follows the "lc..." command.

120: XXXX Sensor Tag Output by the ‘s’ status command. It provides the factory serial number.

152: serial to 57.6kbaud Response to an ‘h’ command (Not implemented)

159: serial rate fault A serial framing error occurred in high-speed serial mode. Camera will return to default 9600 baud.

190: XXXX Configuration Code

Output by the ‘s’ status command. It gives the current configuration.

501: Unrecognized Command

The first character of the command line input is unrecognized.

503: Invalid Input There are multiple forms of the 503 message code. They represent invalid input other then the command specifier, such as "ly..." commands which include to many characters of input, or not enough to fill the specified data byte count.

505: busy Further input was given while the camera was still processing the previous input

601: Loaded preset #1 A response to “1” command. Preset #1 was loaded.

605: help menu All of the lines of the help menu begin with code 605.

702: Single frame This message is sent after the camera enters single frame mode, and again after each frame is sent.

703: Leave single frame This message is sent after the camera exits single frame mode and enters continuous frame mode.


Bayer Interpolation and Color Correction

White Balance and Color Correction are processing operations performed to ensure proper color fidelity in a captured digital camera image. In digital cameras an array of light detectors with color filters over them is used to detect and capture the image. This sensor does not detect light exactly as the human eye does, and so some processing or correction of the detected image is necessary to ensure that the final image realistically represents the colors of the original scene. In addition, each bayer pixel only represents a portion of the color spectrum and must be interpolated to obtain an RGB value per pixel.

Bayer color filter array is a popular format for digital acquisition of color images. The pattern of the color filters is shown below. Half of the total number of pixels are green (G), while a quarter of the total number is assigned to both red (R) and blue (B).

G R G RB G B GG R G RB G B G

To convert an image from this format to an RGB format, we need to interpolate the two missing color values in each pixel. Several standard interpolation methods (nearest neighbor, linear, cubic, cubic spline) can be applied to fill in the missing values in each pixel, resulting in a full size image with each pixel containing an R,G,B value.

The RGB interpolated data is then processed thru a color correction matrix which is used to eliminate the crosstalk induced by the micro-lens and color filter process and compensates for lighting and temperature effects. The same matrix can be used to increase overall color saturation.

The recommended default SI-6600 color matrix settings are in table below:

R G BR’ = 1.268 <0.094> <0.051>G’ = <0.872> 1.821 <0.051>B’ = <0.101> *<0.126> 1.227


Color Saturation MatrixThe operation for saturation, can be applied at the same time as the color correction matrix. Unlike the color correction matrix, the saturation matrix does not rotate the vectors in the color wheel:

[m00 m01 m02] [ R ] [m10 m11 m12] * [G ] [m20 m21 m22] [ B ]

m00 = 0.299 + 0.701*K m01 = 0.587 * (1-K) m02 = 0.114 * (1-K)

m10 = 0.299 * (1-K) m11 = 0.587 + 0.413*K m12 = 0.114 * (1-K)

m20 = 0.299 * (1-K) m21 = 0.587 * (1-K) m22 = 0.114 + 0.886*K

K is the saturation factor K=1 means no change K > 1 increases saturation 0<K<1 decreases saturation, K=0 produces B&W , K<0 inverts color

A sample table of matrix values are calculated and shown below:

Saturation Saturation Saturation Saturation

1 1.7 1.9 2R R 1 1.4907 1.6309 1.701R G 0 -0.4109 -0.5283 -0.587R B 0 -0.0798 -0.1026 -0.114

G R 0 -0.2093 -0.2691 -0.299G G 1 1.2891 1.3717 1.413G B 0 -0.0798 -0.1026 -0.114

B R 0 -0.2093 -0.2691 -0.299B G 0 -0.4109 -0.5283 -0.587B B 1 1.6202 1.7974 1.886

Monochrome Saturation Matrix

A monochrome image can now be easily obtained from a color image by setting K=0

m00 = 0.299 m01 = 0.587 m02 = 0.114

m10 = 0.299 m11 = 0.587 m12 = 0.114

m20 = 0.299 m21 = 0.587 m22 = 0.114


SI-6600CameraLink Frame Grabber

Hardware Interface Notes

1. Data Configuration – 12bits x Single-TapThe 12bit data is duplicated on both A & B outputs, to simplify Frame Grabber testing and integration.

2. LVDS Serial InterfaceThe standard data rate is 9600 baud. (Faster rates, up to 57kbps can be programmed).

3. CC-1 Trigger InterfaceThe camera is armed for capture modes via serial command. The CC-1 trigger is used to start a single image exposure or live video output.

4. PCI BandwidthThe camera can operate at 60 Million Pixels per second. In 8-bit mode, this equates to 60MB/sec a sustained data rate. In 12-bit mode, where 2 bytes per pixel are typically used, the maximum rate is 120MB/sec and may require the use of a 66MHz PCI system. The data rate can be adjusted thru the on-board clock synthesizer.


CameraLink ConnectionMegaCamera to Frame Grabber Interface

SIGNAL NAME PAIR26-PIN

CONNECTORFROM

CAMERA

26-PIN CONNECTOR

FRAME GRABBER

X0- 1- 2 25X0+ 1+ 15 12X1- 2- 3 24X1+ 2+ 16 11X2- 3- 4 23X2+ 3+ 17 10X3- 5- 6 21X3+ 5+ 19 8

Xclk- 4- 5 22Xclk+ 4+ 18 9

SerTC- 6- 20 7SertTC+ 6+ 7 20SerTFG- 7- 8 19SerTFG+ 7+ 21 6

CC1- 8- 9 18CC1+ 8+ 22 5CC2- 9- 23 4CC2+ 9+ 10 17CC3- 10- 11 16CC3+ 10+ 24 3CC4- 11- 25 2CC4+ 11+ 12 15Gnd Gnd 1 1Gnd Gnd 13 13Gnd Gnd 14 14Gnd Gnd 26 26

MDR-26 ConnectorThe camera uses the standard 3M MDR-26 connector specified in CameraLink specifications.


12-Bit CameraLinkBase Configuration Bit Assignment

CameraLinkPort Assignements

PORT/BIT 12-bit x 2ChBit

NameA0 A0 DO-0A1 A1 DO-1A2 A2 DO-2A3 A3 DO-3A4 A4 DO-4A5 A5 DO-5A6 A6 DO-6A7 A7 DO-7B0 A8 DO-8B1 A9 DO-9B2 A10 DO-10B3 A11 DO-11B4 B8 DE-8B5 B9 DE-9B6 B10 DE-10B7 B11 DE-11C0 B0 DE-0C1 B1 DE-1C2 B2 DE-2C3 B3 DE-3C4 B4 DE-4C5 B5 DE-5C6 B6 DE-6C7 B7 DE-7

DE = Even Pixels DO = Odd PixelsThe ODD and EVEN Outputs are identical on the SI-6600.

NationalDS90CR285MTD

SignalName

Camera Data Bit

Channel LinkPin

RX-00 DO-00 27RX-01 DO-01 29RX-02 DO-02 30RX-03 DO-03 32RX-04 DO-04 33RX-05 DO-07 34RX-06 DO-05 35RX-07 DO-08 37RX-08 DO-09 38RX-09 DO-10 39RX-10 DE-10 41RX-11 DE-11 42RX-12 D-11 43RX-13 DE-08 45RX-14 DE-09 46RX-15 DE-00 47RX-16 DE-06 49RX-17 DE-07 50RX-18 DE-01 51RX-19 DE-02 53RX-20 DE-03 54RX-21 DE-04 55RX-22 DE-05 1RX-23 SPARE 2RX-24 LVAL 3RX-25 FVAL 5RX-26 DVAL 6RX-27 DO-06 7

RX-CLK RX-CLK 26

The following are the pin numbers for the 28 signals output from the National Semiconductor Channel Link chip on the Frame Grabber:


Channel Link Interface

CameraLink Cable

CameraLink Cable Ordering


SI-6600 Mechanicals

FRONT VIEW REAR VIEW


SI-6600 Sensor & PCB Dimensions


SI6600-RGB Cover Glass Filter Response

A S8612 glass is used as NIR cut-off filter on top of SI-6600-RGB color image sensor. The following shows the transmission characteristics of the S8612 glass.


SI6600-RGB Sensor Response

The Figure below shows the response of the color filter array as function of the wavelength. This response curve includes the optical cross talk and the NIR filter of the color glass lid, shown on the previous page.


SI-6600M SAMPLE MONOCHROME IMAGE

SI-6600RGB SAMPLE COLOR IMAGE


Contact Information

Silicon Imaging, Inc.www.siliconimaging.com

[email protected]

Ordering InformationSI-6600M 6.6 Mpixel Monochrome MegaCameraSI-6600RGB 6.6 Mpixel Bayer Color MegaCamera -CL CameraLink Version -X Add external clock sync trigger (specify modes) -S Add PCI Frame Grabber, 2 Meter Cameralink & PowerCable, 5VDC Supply -S64 Add 64/66Mhz Frame Grabber & 2 Meter Cameralink Cable -PCB OEM PCB Version, No CasePS-5 5VDC Power SupplyPC-2 Power Cable with 3-pin Tajimi 2M, PTC-2 Power & Trigger Cable with 3-pin Tajimi, 2M,

Legal DisclaimerSilicon Imaging reserves the right to make changes to its products or to discontinue any product or service without notice, and advises customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. No license, express or implied to any intellectual property rights is granted by this document.

Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). SILICON IMAGING PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SILICON IMAGING PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.

The Product described in this datasheet may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available upon request.

Copyright: Silicon Imaging, Inc., 2004

021504-rev 1.7


mailto:[email protected]

http://www.siliconimaging.com/

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