M. Reiche 1, a · silicon wafer bonding about 20 years ago [ 19 -21 ]. Semiconductor wafer direct...

22
Dislocation Networks Formed by Silicon Wafer Direct Bonding M. Reiche 1, a 1 Max-Planck-Institut für Mikrostrukturphysik, Weinberg 2, D-06120 Halle, Germany a [email protected] Keywords: wafer bonding, dislocation, silicon, defect structure and properties Abstract. The paper reviews methods of hydrophobic wafer bonding. Hydrophobic surfaces are obtained by removing the oxide layer from the surfaces of crystalline silicon substrates. Bonding such surfaces causes the formation of a dislocation network in the interface. The structure of the dislocation network depends only on the misalignment (twist and tilt components). The different dislocation structures are discussed. Because wafer bonding offers a method to the reproducible formation of such networks, different applications are possible Introduction CMOS is the dominating process technology in modern microelectronic industry. The application of the existing scaling rules was the most important factor for the continuous increase of device performance over the time [1]. It is, however, generally accepted that further developments are limited by fundamental materials and processing aspects [2]. One important example is related to the limitations of the operating speed of devices due to the interconnect [3]. The increasing complexity of interconnects (number of metal levels, interconnect length, etc.) grows to a potential performance bottleneck caused by RC coupling produced by delays in signal propagation, signal latency, signal cross-talk, and RL delays. An alternative is the replacement of electrical connections with optical connections. The potential advantages of optical interconnects are the elimination of resistivity losses, reduced power consumption, avoidance of frequency-dependent cross-coupling, and improved electrical noise immunity [3-5]. Because silicon is an indirect band-gap semiconductor and light emission becomes difficult, first proposals suggest a hybrid approach in which optical signals are generated in, routed through, and received in an opti cal “interposer” which is to be bonded to the silicon chip [3, 6]. This avoids the very difficult problem of integrating optically active components, especially light emitters, into silicon technology. Therefore monolithic solutions are required combining all components into silicon and technology-compatible materials. This is one of the main motivations to look for silicon photonics which was of growing interest in recent years [7 - 11]. Different solutions have been reported for individual components of monolithic integrated photonic system, such as waveguides and modulators [10] as well as detectors using SiGe alloys or pure Ge layers [7, 12]. Furthermore, different mechanisms of silicon light emission were extensively studied, but there is no satisfying solution up to now of a silicon-based emitter. For instance, the electroluminescence of light emitting diodes (LED) in bulk silicon is known for more than 60 years [13]. The biasing of a pn junction in forward or reverse direction causes the injection of minority carriers across the junction and realizes band-to-band radiative recombination of free excess minority carriers. The power efficiency of such a pn junction is about 10 -4 at 1.1 μm in forward bias [11]. The quantum efficiency increases by confining electrons and holes in small regions within the bulk silicon LED by introducing a strain field that locally modifies the band-gap (e.g. [14]). Light emission in silicon at wavelengths around 1.5 μm required for optical data communication is obtained either by band gap engineering (using SiGe alloys) or by incorporation of impurities in the depletion layers of pn junctions such as Er or silicides (ß-FeSi 2 , Ru 2 Si 3 ) [9, 11, 15]. Another approach is the utilization of dislocation-related luminescence causing four lines which are labeled D1 (0.81 eV), D2 (0.87 eV), D3 (about 0.95 eV), and D4 (about 1.0 eV). The Materials Science Forum Vol. 590 (2008) pp 57-78 online at http://www.scientific.net © (2008) Trans Tech Publications, Switzerland Online available since 2008/Aug/19 All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of the publisher: Trans Tech Publications Ltd, Switzerland, www.ttp.net. (ID: 85.232.23.177-01/10/08,17:25:30)

Transcript of M. Reiche 1, a · silicon wafer bonding about 20 years ago [ 19 -21 ]. Semiconductor wafer direct...

Page 1: M. Reiche 1, a · silicon wafer bonding about 20 years ago [ 19 -21 ]. Semiconductor wafer direct bon ding (SWDB) requires wafers with a high degree of flatness, parallelism and smoothness.

Dislocation Networks Formed by Silicon Wafer Direct Bonding

M. Reiche1, a 1Max-Planck-Institut für Mikrostrukturphysik, Weinberg 2, D-06120 Halle, Germany

[email protected]

Keywords: wafer bonding, dislocation, silicon, defect structure and properties

Abstract. The paper reviews methods of hydrophobic wafer bonding. Hydrophobic surfaces are

obtained by removing the oxide layer from the surfaces of crystalline silicon substrates. Bonding

such surfaces causes the formation of a dislocation network in the interface. The structure of the

dislocation network depends only on the misalignment (twist and tilt components). The different

dislocation structures are discussed.

Because wafer bonding offers a method to the reproducible formation of such networks, different

applications are possible

Introduction

CMOS is the dominating process technology in modern microelectronic industry. The

application of the existing scaling rules was the most important factor for the continuous increase of

device performance over the time [1]. It is, however, generally accepted that further developments

are limited by fundamental materials and processing aspects [2]. One important example is related

to the limitations of the operating speed of devices due to the interconnect [3]. The increasing

complexity of interconnects (number of metal levels, interconnect length, etc.) grows to a potential

performance bottleneck caused by RC coupling produced by delays in signal propagation, signal

latency, signal cross-talk, and RL delays. An alternative is the replacement of electrical connections

with optical connections. The potential advantages of optical interconnects are the elimination of

resistivity losses, reduced power consumption, avoidance of frequency-dependent cross-coupling,

and improved electrical noise immunity [3-5]. Because silicon is an indirect band-gap

semiconductor and light emission becomes difficult, first proposals suggest a hybrid approach in

which optical signals are generated in, routed through, and received in an optical “interposer”

which is to be bonded to the silicon chip [3, 6]. This avoids the very difficult problem of integrating

optically active components, especially light emitters, into silicon technology. Therefore monolithic

solutions are required combining all components into silicon and technology-compatible materials.

This is one of the main motivations to look for silicon photonics which was of growing interest in

recent years [7 - 11].

Different solutions have been reported for individual components of monolithic integrated

photonic system, such as waveguides and modulators [10] as well as detectors using SiGe alloys or

pure Ge layers [7, 12]. Furthermore, different mechanisms of silicon light emission were

extensively studied, but there is no satisfying solution up to now of a silicon-based emitter. For

instance, the electroluminescence of light emitting diodes (LED) in bulk silicon is known for more

than 60 years [13]. The biasing of a pn junction in forward or reverse direction causes the injection

of minority carriers across the junction and realizes band-to-band radiative recombination of free

excess minority carriers. The power efficiency of such a pn junction is about 10-4

at 1.1 µm in

forward bias [11]. The quantum efficiency increases by confining electrons and holes in small

regions within the bulk silicon LED by introducing a strain field that locally modifies the band-gap

(e.g. [14]). Light emission in silicon at wavelengths around 1.5 µm required for optical data

communication is obtained either by band gap engineering (using SiGe alloys) or by incorporation

of impurities in the depletion layers of pn junctions such as Er or silicides (ß-FeSi2, Ru2Si3) [9, 11,

15]. Another approach is the utilization of dislocation-related luminescence causing four lines

which are labeled D1 (0.81 eV), D2 (0.87 eV), D3 (about 0.95 eV), and D4 (about 1.0 eV). The

Materials Science Forum Vol. 590 (2008) pp 57-78online at http://www.scientific.net© (2008) Trans Tech Publications, SwitzerlandOnline available since 2008/Aug/19

All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of thepublisher: Trans Tech Publications Ltd, Switzerland, www.ttp.net. (ID: 85.232.23.177-01/10/08,17:25:30)

Page 2: M. Reiche 1, a · silicon wafer bonding about 20 years ago [ 19 -21 ]. Semiconductor wafer direct bon ding (SWDB) requires wafers with a high degree of flatness, parallelism and smoothness.

behaviour of D-band luminescence was extensively studied in plastically deformed silicon (e.g.

[16]. First LEDs having a sufficiently high electroluminescence at room temperature (< 0.1%) were

prepared using samples deformed by compression along the [110] axis at 700 – 770°C to 1.5% -

2.5% [17, 18]. These results show that LEDs can be realized in silicon. Plastic deformation,

however, is a technique not applicable in real CMOS device processes. Therefore alternative

techniques resulting in the formation of reproducible dislocation arrays are required. One of these

techniques is the semiconductor wafer direct bonding using hydrophobic surface conditions.

Semiconductor Wafer Direct Bonding

Widespread interest in modern wafer bonding techniques was generated by reports on silicon-

silicon wafer bonding about 20 years ago [19-21]. Semiconductor wafer direct bonding (SWDB)

requires wafers with a high degree of flatness, parallelism and smoothness. Also clean surfaces are

necessary which are free of particulate, organic, and metallic contaminations. This is important

because the surface cleanliness has a direct effect on both the structural and electrical properties of

the bonding interface as well as on the resulting electrical properties of the bonded material. After

cleaning an activation of the surfaces is required prior to bonding. Then the two mating wafers are

brought together face to face in air at room temperature. The top wafer is floating on the other due

to the presence of a thin cushion of air between both wafers. When an external pressure is applied

onto a small part of the pair to push out the intermediate air, a bond is allowed to be formed by

surface attraction forces between the wafers at this location.

For wafer bonding the interaction between two surfaces is important. The total energy of two

planar surfaces at a distance D apart is given by [22] as

2

2

2221

12

11

12 D

D

D

A

DD

AW o

oo per unit area , (1)

where W is the total energy, or adhesion energy, A the Hamaker constant, and Do the interatomic

distance. At D = Do (both surfaces are in contact), W = 0, while for D = (two isolated surfaces),

212/ 2 oDAW (2)

or

224/ oDA . (3)

in other words, the surface energy equals half the energy needed to separate two flat surfaces from

contact to infinity, viz. it is half the adhesion energy. Adhesion is caused by different forces acting

at an interface. Most important for wafer bonding are

a) capillary force,

b) electrostatic force initiated by Coulomb interaction between charged objects or from the contact

potential between two surfaces caused by differences in the local energy states and electron work

functions,

c) van der Waals force resulting from the interaction between instantaneous dipole moments of

atoms,

d) solid bridging caused by impurites, and

e) hydrogen bonding between OH groups as the separation between the surfaces becomes small.

Measurements on silicon microstructures showed that capillary force dominates [23, 24]. It is about

2 × 102 μN per 1 μm

2 at a separation distance of two smooth silicon surfaces of 1 nm. Increasing the

distance to 10 nm reduces the capillary force to about 5 μN. In addition, electrostatic forces, van der

Waals forces, and hydrogen bonding are about one order of magnitude lower. For short distances

between both surfaces (D 1 nm) hydrogen bridging and van der Waals forces are about 10 μN per

1 μm2, while electrostatic forces reaches values of about 5 μN.

All these forces act only over short ranges and the effect depends on the specific surface

conditions. Most important is the surface roughness. Several models have been proposed to predict

the effect of roughness on adhesion between two surfaces. These treatments have considered

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Hertzian, Johnson–Kendal–Roberts (JKR), and Deryagin–Muller–Taporov (DMT) contacts, and

have been reviewed by Maugis [25]. On the other hand, also the chemistry of species on the silicon

surfaces affects the different forces. Silicon surfaces are covered with an oxide layer under room

temperature conditions. XPS- and HREELS analyses [26] proved the existence of a large number of

singular and associated OH groups causing the hydrophilicity of such surfaces. Detailed

investigations revealed changes in the angle of the Si–O–Si bridge indicating structural changes of

different oxides and a dependence on the storage time. Hydrophobic surfaces are obtained by

removing the oxide and are characterized by the presence of Si–H groups. A (1 x 1) dihydride

structure was proved for Si(100) surfaces which is modified by rinsing in de-ionized water into a 2

x 1) unit cell [27]. The dihydride (SiH2) is stable up to 380°C. Above this temperature H2 is

generated by the combination of the hydrogen atoms of neighboring dihydrides, and a pair of

dangling bonds reacts and forms a (2 x 1) dimer, and a monohydride structure (SiH) is formed. The

monohydride phase is stable up to about 500°C [28]. Because the oxide is removed mainly by HF,

Si–F groups are also present [29]. Ermolieff et al. [30] correlate the presence of Si–F bonds to the

amount of remaining oxide (indicated by the presence of O–Si–F bonds). The transition from

hydrophilic to hydrophobic surface conditions is assumed to be at a concentration of 25% Si–F

bonds. Furthermore, also the pH-value and the concentration of the etch solution effect the

structural and chemical nature on the silicon surface [31-33].

Models of the atomic mechanisms on the interface during wafer bonding were developed on the

different nature of hydrophilic and hydrophobic surfaces.

Hydrophilic wafer bonding. Results on the adhesion mechanisms on silicon and other materials

refer to the strong influence of OH groups on the surface. For instance, the bond strength of

adhesives is directly correlated to the number of OH groups [34]. Measurements of the adhesion on

silicon proved also the effect of hydrogen bridging for hydrophilic surfaces [24].

A model for hydrophilic wafer bonding was first described by Stengl et al. [35] using the analogy of

surface chemistry of silica and oxidized silicon. Based on results of infrared spectroscopy, a 3-

dimensional hydrogen bonded network of water molecules was assumed. The water is primarily

bonded via Si–OH groups on the silica surface. During heating above 180 °C the adsorbed water

molecules desorb under atmospheric pressure leaving a hydroxylated silica surface, on which most

of the SiO groups are linked via hydrogen atoms. OH groups are bonded more stable with

increasing temperature. This was proved by infrared spectroscopy [36] and XPS [26] showing the

presence of singluar OH groups up to 700 K. The model was further developed by Tong and

Goesele [37]. They proposed that for room temperature conditions, chains consisting of 3 or more

hydrogen-bonded water molecules bridge the interface. This is based on the fact that hydrogen-

bonded water triplets are more stable than single water molecules or dimers. They also pointed out

that 2 main types of silanols are present on the oxide surface: singular silanols (Si–OH) and

associated, or vicinal silanols (Si–OH–O–Si). Assuming in analogy to silica a maximum

concentration of 4 to 6 silanol groups per 1 nm2 and all groups adsorb water molecules which are

connected by hydrogen bonds across the two surfaces, the specific surface energy was estimated to

be

),2(2

1hHOHHhiohis EdEd (4)

where dOHi, dOHH and Ehi, EhH are the surface density of silanol groups and hydrogen bond energy of

the isolated and associated silanol groups, respectively. Using representative values of dOHi = 1.4 ×

1014

cm–2

, dOHH = 3.2 × 1014

cm–2

, Ehi = 10 kcal/mol = 7 × 10–17

mJ/bond, and EhH = 6 kcal/mol =

4.2 × 10–17

mJ/bond, the surface energy of room-temperature bonded wafers is calculated to

γs = 165 mJ/m2 , (5)

which is about a factor of 2 higher than measured values. Storage of the wafers for a long period at

room temperature, however, increases the surface energy to 230–250 mJ/m2. The difference was

explained by polymerization processes of silanol groups at room temperature according to

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Si–OH + HO–Si → Si–O–Si + H2 . (6)

Another interpretation was given by Litton and Garofalini [38]. They discussed the presence of an

additional type of silanol, the geminal silanol (Si–(OH)2) found by NMR analysis on silica gel

surfaces [39]. It was also assumed that the mean siloxane (Si–O–Si) bond angle is lower (~ 130°)

for thin oxides prepared by wet chemical cleaning than for bulk SiO2 (~ 144°). This indicates that

the oxide is strained due to the Si/SiO2 interface. The different surface conditions of different

oxides and the different chemical behaviour of surface silanol groups were also explained by other

authors [40].

The phenomenological models of the wafer bond mechanism were mainly confirmed by

molecular

dynamic simulations [38, 41].

Annealing after the initial bonding process at room temperature results in changes of the interface

chemistry. Measurements of the interface energy of bonded hydrophilic wafers show a different

behaviour for different temperature ranges [42]. The calculated activation energies [37] refer to

– the rearrangement of interface water at temperatures below 110 °C,

– polymerization processes of silanol groups across the interface at 110 °C ≤ T ≤ 150 °C,

– a temperature range between 150 °C and 800 °C which is characterized by an almost constant

surface energy, and

– complete bonding via oxide flow at T > 800 °C.

The interface energy is not varied for different hydrophilic surface conditions, i.e. bonded

hydrophilic Si/Si, Si/SiO2, and SiO2/SiO2 pairs result in the same values of γ.

Low-temperature wafer bonding: Annealing at high temperatures is required after the initial

bonding at room temperature. The reason is the generation of sufficiently high interface energies by

transformation of the atomic bonds via the interface. Typical annealing temperatures are above 800

°C. An increasing number of applications, however, requires temperatures below 500 °C. This is

especially true for the integration of fully processed device wafers reducing the thermal budget to

temperatures below 450 °C. Because the interface energy is insufficiently low for bonding using

standard conditions up to these temperatures, modified techniques especially of the wafer bonding

under hydrophilic conditions were developed. The key issue for the low-temperature wafer bonding

is the modification of the wafer surfaces either due to an increasing hydrophilicity, which increases

the number of hydrogen bonds via the interface, or due to the generation of new types of chemical

bonds stable already at lower temperatures. This includes the application of different thin layers,

such as patternable materials (SU-8, BCB, or other types of photoresist) [43, 44], low-temperature

oxide layers (TEOS, SOG, etc.) [45 - 47], and PE-CVD layers (amorphous silicon, oxide, nitride)

[48]. Alternative techniques use the activation of the wafer surface before bonding. First, wet

chemical processes were applied result in an increase of the interface energy by a factor of about 2

[37, 49]. On the other hand, higher interface energies were obtained by surface activation using

plasma processes. Especially treatments in an oxygen plasma are most common where different

plasma sources were applied (RIE, ICP, ECR, microwaves) [50 - 53]. The increasing interface

energy of plasma-treated surfaces was discussed

a) by an increasing surface roughness, which increases the total interface area,

b) an increasing oxide thickness, combined with a higher porosity of the amorphous layer resulting

in an increasing incorporation of additional water molecules, or

c) an accelerated transformation of silanol to siloxane bonds.

Treatments in other, non-oxygen containing plasma environments (Ar, N2), however, proved an

analogous increase of the interface energy [54]. This means that other reasons are probably more

important. Analyses of dielectric barrier discharges (DBD) have shown that the activation effect of

semiconductor surfaces is mainly caused by electrons and UV radiation instead of ions [55]. The

effect of UV radiation is an additional cleaning of the surfaces by cracking of CHx compounds,

60 Advances in Light Emitting Materials

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while electrons generate surface-active sites. XPS investigations of DBD-treated Ge wafers, for

instance, showed the reduction of the Ge2+

- and accelerated formation of the Ge4+

oxidation states

by sp3-hybridization in consequence of the interaction with high-energy electrons generated in the

discharge [56]. This causes more active sides to bond OH-groups on the surface, or could favour the

preferred formation of Ge–O–Ge bonds even at low temperatures.

Hydrophobic wafer bonding: When the oxide layer from a crystalline silicon substrate is removed

with HF, a hydrophobic surface with unique properties is obtained, i.e., having a good resistance to

chemical attacks and a low surface recombination velocity, which means a surface with a very low

density of surface states. The etching of the oxide is assumed to be a 2-step process. First, most of

the oxide layer is rapidly dissolved in HF, forming 2

6SiF ions in solution. In the second step,

anodic dissolution of the last monolayer of oxidized silicon (Sin+

with n = 1, 2, 3) occurs, resulting

in a hydrogen-passivated surface. The dominant species are dihydride (Si–H2) for Si(100)- and

monohydride (Si–H) for Si(111)-surfaces [57]. First detailed analyses of interfaces of bonded

hydrophobic wafers were carried out by Bengtsson and Engström [58]. A first concept for

hydrophobic wafer bonding was presented by Bäcklund et al. [59, 60] suggesting van der Waals

forces as the origin of the attraction forces. Further investigations assume the formation of

hydrogen bonds via Si–F groups on the hydrophobic surface [33, 42]. The surface energy was

estimated by the equation

)2(2

1hHFFSis Ed , (7)

where dSi–F is the surface density of Si–F bonds and EhHF is the lowest bond energy of the hydrogen

bonded HF cluster across the two mating surfaces [37]. Using dSi–F = 1 × 1014

cm–2

and EhHF = 6.02

kcal/mol, the surface energy was calculated to be

γs ≤ 42 mJ/m2 , (8)

which is in accordance with experimentally measured data. Analyses of HF-treated surfaces and

interfaces of bonded hydrophobic wafers proved the existence of fluorine, the main species,

however, are hydrogen [26, 29, 30, 57]. This means that hydrogen bonds like Si–H . . . H–Si are

probably more favoured. The contribution of the different hydrogen bonds depends on the pre-

treatment, i.e. if the hydrophobization is caused by diluted HF solutions, buffered HF solutions

(HF/NH4F, etc.), or by plasma etch techniques [61].

The behaviour of the interface energy on the annealing temperature is quite different for bonded

hydrophobic wafers [42]. The interface energy is nearly constant for annealing temperatures up to

150 °C. At higher temperatures γs increases. But there are 2 different regimes. For 150 °C ≤ T ≤ 300

°C the increase of the interface energy is characterized by an activation energy of 0.21 eV, while an

activation energy of 0.36 eV was determined for annealing at higher temperatures [37]. Both

activation energies correlate to different interface processes. There is a relation to the existence of

Si–CHx groups (stable up to about 400 °C) and Si–H groups detected up to about 600 °C on

hydrophobic silicon surfaces [26].

Structure of Bonded Interfaces

Wafer bonding of hydrophilic surfaces result in the presence of an oxide layer in the interface. The

thickness of the oxide layer is only a few nanometers if native oxides are present (Fig. 1). Most

applications, however, use oxides of different thickness grown by thermal wet or dry oxidation, or

low- temperature oxides such as LTO, TEOS, HDP, and PE CVD-oxides. The mechanical

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properties of bonded wafer pairs (stress) and the electrical properties depend on the applied oxide

layer. The latter are especially important in the production of advanced substrates (SOI).

Figure 1: High-resolution electron microscope images (cross-sectional samples) of the interfaces of

bonded hydrophilic wafer pair. Wafers with a native oxide on the surfaces were applied.

Infrared spectroscopy (ATR) and SIMS measurements revealed that there are hardly any

contaminants at the bonded interfaces [29]. Only oxygen (or Si–O vibration modes) is detected at

the interface of bonded hydrophilic wafer pairs after annealing at elevated temperatures (T > 900

°C). At lower temperatures, a certain amount of OH is present at the bonding interface. Typical

breakdown voltages of more than 7 × 107 V/cm are measured at room temperature and drops only

slightly if the measuring temperature increases to 150 °C. A model describing the electrical

properties of interfaces of bonded hydrophilic wafers was published by Bengtsson and Engström

[58] referring to interface state densities of about 1011

cm–2

. More recent measurements proved that

interface state densities of 1010

cm–2

or below (9 × 109 cm

–2) can be obtained.

Defects in the interfaces of bonded wafers are obtained either by flatness variations or particles

enclosed in the interface.

There are numerous theoretical studies of the conditions under which a gap separating two wafers

will prevent bonding [37]. According to Yu and Suo [62] a relation exists between the distance of

both wafers R (as a consequence of the flatness) and the lateral dimension of the gap l). Assuming

the thickness of both wafers is d and l > 4d, the complete bonding is obtained, if

3

2 3,

2

dE

lR (9)

with E′ = E/(1 – ν2), E being Young’s modulus, ν Poisson’s ratio, and γ the surface energy. In cases

where l < 4d the condition of gap closing is

2/1

´1.5

E

lR

. (10)

An expression of the unbonded area caused by particles of radius rp was derived in [37]. Assuming

the same thickness of both wafers and that the particle is incompressible the unbonded area is

calculated as

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2/1

4/13

´3

2pr

dER

. (11)

Unbonded areas caused by an insufficient surface flatness or by particles appear immediately after

bonding at room temperature. On the other hand, subsequent annealing after the bonding can also

cause the generation of unbonded areas. These interface defects are generally known as bubbles and

are observed mainly during annealing at temperatures below 900 °C [63]. Based on the assumption

that hydrocarbons and hydrogen play an important role, Mitani and Gösele [64] presented a

thermodynamic model of the bubble formation. They assumed also 2 different sets of bubbles

according to the detection limits of the applied analyzing methods (larger bubbles (diameter >1

mm) detected by infrared microscopy, and smaller bubbles (diameter <500 μm) detected by X-ray

topography). The critical radius for large bubbles was determined to be

2/14/1

222

23

)1(9

16)(

C

x

CB

xWdtr oxox

crit

, (12)

where α is a geometrical factor (1/3 ≤ α ≤ 1/2), B a proportionality constant between the pressure

inside of the bubble and areal contamination concentration C, and xox is the oxide thickness. This

equation indicates that bubbles can more easily be prevented by thick oxide layers.

Using analyzing methods with higher resolution, the bubble formation was recently studied by

statistical methods [55]. Measurements of bubble sizes and distances, and their distribution

functions proved numerous individual processes of nucleation, growth, coalescence, and

dissolution. All processes are controlled by diffusion and follow the thermodynamic model of

steady state nucleation and growth. The dominance of the individual processes depends on the

temperature and time of the annealing. Increasing the annealing time results in the formation of a

second set of bubbles which can probably be correlated to previously described results [64].

Bonded hydrophobic wafers are characterized by completely different interfaces (Fig. 2). The

removing of the oxide result, as in the case of bicrystals, that two silicon lattices are in contact.

Crystal defects (dislocations) are generated forming a 2-dimensional network in order to match both

Figure 2: High-resolution electron microscope images (cross-sectional samples) of the interfaces

of bonded hydrophobic wafers (b). <100>-oriented silicon wafers were used for bonding.

crystal lattices (Fig. 3). Bonding of Si(100) wafers cause a 1 (100) small angle grain boundary

characterized by a square-like mesh of screw dislocations expected from theory [65]. These

dislocations are formed by the rotational misfit (twist) between both crystal lattices. There is,

however, an additional tilt component caused by the deviation on the [001] axis of real wafers (cut-

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off). The tilt component is compensated by a periodic array of 60° dislocations. The spacings

between dislocations S in both networks are indirectly proportional

Figure 3: TEM plan-view image (25° bevelled sample) of the dislocation network in a bonded

Si(100/Si(100) interface. Screw dislocations form a network having square-like meshs and are

caused by the twist component. The network is superimposed by a second network of 60°

dislocations produced by the tilt component. Measurements of the dislocation spacings result in a

tilt angle of 0.12° and a twist angle of 0.63°.

to the misalignment angle and are given by

2sin*22 twist

twist

aS

(13)

for the screw dislocation network. On the other hand, the relation between dislocation distance and

tilt angle of the network formed by 60°-dislocations follows as

tilt

tilt

aS

tan*2 (14)

In both equations a means the lattice constant (which is a = 0.543 nm for Si) and twist and tilt

are the angles of misorientation of the twist and tilt component, respectively.

Both dislocation fractions were investigated for hydrophobic wafers bonded under environmental

conditions [66 - 69] and under UHV conditions [70, 71]. There are different observations for wafer

pairs bonded under UHV conditions. Some reports present dislocation networks already after

bonding at room temperature [72], while dislocation networks are observed by other authors only

after a subsequent annealing above 800°C [71, 73]. The reason probably is that the boundary is

unrelaxed after bonding at room temperature, while relaxation occurs by energetical reasons only at

higher temperatures [74]. Bonded interfaces show nanometer-sized shallow voids at temperatures

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a)

b)

c)

d)

Figure 4: TEM plan view images (25° bevelled samples) of dislocation networks formed in

Si(100)/Si(100) wafer pairs after annealing at 1000°C. The wafers were bonded hydrophobically in

UHV (a) [71] and under environmental conditions (b). Measurements of the dislocation spacings

result in a tilt angle of 0.03° and a twist angle of 0.27° in Fig. (a) and of 0.03° and 0.73°,

respectively, for the network shown in Fig. (b). Fig. (c) shows details of the network in Fig. (b). An

explanation of the dislocation interaction is schematically presented in Fig. (d). A possible set of

Burgers vectors may be ]110[2/],011[2/ 21

abab and ]110[2/3

ab .

below 800°C. The density and size of these voids depend on the temperature referring to

accommodation processes. Analogous analyses of dislocation networks are reported for

1

3 2

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hydrophobic wafers bonded under environmental conditions only after annealing above 800°C. The

reason is the low bonding strength at lower temperatures causing the debonding during TEM

sample preparation.

Typical dislocation networks observed in UHV and environmental bonded samples are shown in

Figs. 4a and b. Differences are only obtained in the spacings of the screw dislocations (caused by

the different twist angles of 0.27° in Fig. 4a and 0.73° in Fig. 4b) and interactions between the

screw dislocations and superimposed 60°-dislocations. An almost undisturbed mesh of the screw

dislocations exists on {100}-terraces while at steps on the surface (characterized by the 60°-

dislocations) interactions between both dislocations portions are found. Different interactions were

discussed for hydrophobic bonded wafers [75] and grain boundaries in sintered silicon [76]. The

latter discussed the displacement of the screw dislocations by extraneous dislocations lying in their

{111} glide plane and resulting in a step in the boundary plane. Such a reaction, for instance, is

shown on the marked area in Fig. 4c. A schematic representation of the reaction is presented in Fig

Figure 5: Interaction between a 60°-dislocation lying along [ 101

] with Burgers vector b and screw

dislocations with Burgers vector b1.

4d. An other reaction is demonstrated in Fig. 5. A 60°-dislocation lying along [ 101

] with Burgers

vector ]011[2/

ab intersecting the screw dislocation with Burgers vector b1 at the node, both

dislocations react to form a third dislocation with b3 = b1 + b = a/2[011], where b2 + b1

2 > b3

2.

Before reaction takes place, the 60°-dislocation b had an edge component in the plane of the

interface. After reaction, both 60°-dislocations b and b3 are characterized by an equal but opposite

edge component. The total edge component vanished and is accommodated by the offset of the

screw dislocation. The appearance of both 60°-dislocations increases the screw dislocation spacing

by 0.5Stwist since their efficient component in compensating the twist misorientation is a/4[110].

The low-energy configuration is achieved when the angles between dislocations change to 120°

[75].

Such reactions modify the existing dislocation network especially at very low twist and tilt angles

( tilt twist < 0.1°) where the mesh size of the screw dislocation network reaches the same values

1

3

b

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a)

as the distance of the 60°-dislocations.

At ( tilt twist 0.07°) dislocation

networks with hexagonal meshes

appear (Fig. 6). This is caused by the

reaction described where a third

dislocation having a Burgers vector b3

is formed. The angle of 120° between

the dislocations (low- energy

configuration) modifies the square-

like mesh structure into the hexagonal

arrangement.

A further reduction of the twist and tilt

angles can be realized experimentally

only by aligned wafer bonding

allowing the control of the twist angle

up to twist = ± 0.005° [69, 77].

At twist 0.001° dislocation networks

were not observed. Instead, segments

of individual dislocations of different

geometries were found. Straight

segments of screw dislocations are

observed first, while – probably at

lower angles – loops of various

geometries are dominant [69].

Variations of the tilt and twist angles

are the most important factors

effecting the morphology and structure

of the resulting dislocation network.

Further variations were observed by

varying the annealing after the initial

wafer bonding. A second annealing at

elevated temperatures causes further

dislocation reactions including glide

and climb processes. For instance,

Figure 7 shows the optical micrograph

of a Sirtl etched surface where

stacking faults appear. Here, the

bonded interface is located in a depth

of about 100nm and therefore close to

b)

Figure 6: TEM weak beam images of a dislocation

network in the interface of a bonded Si(100)/Si(100) wafer

pair. The twist and tilt angles are about 0.07°, resp. Fig.

(b) shows a individual cell of the network at higher

magnification.

the surface. Stacking faults are surrounded by partial dislocations formed by dissocation of perfect

dislocations. For the 60°-dislocation a 30° partial and a 90° partial are formed through dissociation,

while the screw dislocation splits into two 30° partials. According to Marklund [78] reactions of the

type

12112101161

61

21 (15)

for 60° dislocations and

21111211061

61

21 (16)

for screw dislocations are generally known. The partials are parallel to <110> directions and the

glide plane is {111}. Dissociation processes of dislocations in bonded interfaces were also reported

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Figure 7: Optical micrograph of stacking faults on the surface of a hydrophobic bonded wafer pair

after a 2-step annealing at 1000°C. Note that the bonded interface is close to the surface (depth

100nm). Sirtl etch was applied.

for screw and 60°-dislocations by other authors after a single step annealing at high temperatures (T

> 1000°C) [79 – 81].

The structure and properties of hydrophobic bonded interfaces were modelled by computer

simulations [82 – 85]. All models based on the molecular dynamic method using different potentials

and assume the interface as a twist boundary. Caused by the complexity, simulations showed details

of the interface structure (unit blocks) and their properties (band structure, energy, etc.). Computer

simulations of interfaces with arbitrary twist and tilt components are much more complicated and

do not exist up to now [86].

Properties of Dislocation Networks in Bonded Interfaces

Silicon crystallises in the cubic diamond structure (space group Fd3m). The diamond lattice is

equivalent to a face-centred cubic (fcc) lattice, with a basis of two identical atoms: one at (0, 0, 0)

and the other at (1/4, 1/4, 1/4). This difference has important implications for the core structure of

glide dislocations. Like in fcc metals, the glide system, i.e. glide plane and Burgers vector, are of

the type {111}, <110>. However, in the diamond structure there are two different sets of glide

systems and dislocations, the widely spaced shuffle set and the narrowly spaced glide set.

Dislocations of the glide set can dissociate into two Shockley partials with a stacking fault in-

between according to equation (15). A dislocation of the shuffle set cannot dissociate into partials,

but it can associate with a stacking fault in the next plane, bound by two partials of opposite sign

and by reaction of the shuffle set dislocation with one of the partials.

Until now an experimental method to differentiate between the two sets of dislocations is still

missing. But there are strong evidences that dislocations in elemental semiconductors have a glide

set configuration [87 – 90]. Furthermore, the introduction of the weak-beam method of transmission

electron microscopy clearly showed that dislocations in silicon are split into partials with a stacking

fault in-between with sizes ranging from about 0.3 to 0.5 nm [91, 92]. Based on computer

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simulations different models of the core structure of both partial dislocations were published (e.g.

[89, 92 – 95]). Atomistic calculations have consistently shown that the ideal ground-state structure

of the 30° partial dislocation is characterized by saturated dangling bonds. Neighbouring core atoms

move closer together to form bonded dimmers. The reconstruction breaks the translational

symmetry and doubles the period along the dislocation line from b to 2b, where b is the Burgers

vector magnitude of a complete ½<110> dislocation. The reconstructed core structure is doubly

degenerated; its two variants are related to each other by a half-period translation along the line. A

defect appears in the boundary between two segments reconstructed in the opposite sense. This

reconstruction defect has been also referred to as an antiphase defect [96] and a soliton [95, 97].

Caused by the more significant lattice distortion the core structure of the 90° partial dislocation is

much more complex. The unreconstructed core contains a zigzag chain of threefold coordinated

atoms [98]. It has been proposed that this dislocation core reconstructs by breaking a {110} mirror

symmetry in order to eliminate the dangling bonds [96]. This single-period core reconstruction

causes two nearly degenerate types of reconstruction defects. Furthermore, a double-period

reconstruction was also proposed [98]. Here, the reconstruction breaks two symmetries at once: the

<110> mirror symmetry and the translational symmetry along the line. Breaking the mirror

symmetry introduces two types of reconstruction defects termed mirror solitons by Bulatov et al.

[99]. At the same time, similar to the 2 x 1 reconstruction in the 30° partial dislocation, breaking of

the translation symmetry doubles the period from b to 2b and introduces a translation soliton.

Additionally, two combinations of the translation soliton with mirror solitons bring the total number

of distinct reconstruction defects to five, four of which are double degenerate [99].

Recent developments in electron microscope techniques demonstrate that the direct imaging of the

dislocation core structure could be possible in the future. For instance, Spence and Koch [100]

applied nandiffraction using high-order Laue zone rings (HOLZ) to study the structure of 90°

partial dislocations. The combination of high-resolution phase contrast imaging, scanning

transmission electron microscopy (STEM), and local electron energy loss spectroscopy (EELS) was

applied to analyze the structure of 30° partial dislocations in silicon and III-V compounds [101].

The interaction of the dislocation core with point defects was studied by numerous techniques such

as EPR, DLTS and EBIC. The investigations proved that such interactions induce dramatic changes

of the dislocation properties. According to EPR vacancies are most important. The concentration of

point defects or clusters of them in the dislocation core and their effect on the kink formation and

migration are the subject of numerous experimental and theoretical studies (for an actual review see

[102]). Especially the electronic structure of dislocations and the interaction with point defects were

studied in detail. Based on theoretical models and experimental results a large number of defects

were described [103, 104].

The recombination of charge carriers on dislocations was studied by different authors. Based on

Hall, DLTS and EBIC data different models describing the non-radiative recombination were

published [104]. Especially EBIC measurements allow the classification of defects by their contrast

and the application to dislocation arrangements such as grain boundaries [104, 105]. Radiative

recombination of dislocations was first described in 1976 by Drozdov, Patrin, and Tkachev [106,

107]. A quartet of lines, D1 to D4, was found in the photoluminescence spectrum of plastically

deformed n- and p-type silicon. The lines appear in the spectrum at 0.812 eV (D1), 0.875 eV (D2),

0.934 eV (D3), and at 1.000 eV (D4). Lines D1 and D2 on the one hand, and lines D3 and D4 on

the other show the same shifts under uniaxial stress and therefore have been grouped as pairs

D1/D2 and D3/D4 [107]. Considerable work has been performed to identify the luminescent

dislocation type and moreover its active structural features. Measurements on plastically deformed

silicon proved a dependence of the relative intensities of the D-lines on the dislocation density [108,

109]. The intensity of D3 and D4 appears to be also dependent on the dissociation width of

dislocations. Furthermore, the D-band luminescence varies with the impurity concentration. Higgs

et al. [110] found that low concentrations of transition metals (Cu, Fe, Ni) cause the D-band

luminescence. Higher concentrations of copper and iron, however, reduce the D-band luminescence

drastically. It was speculated that small amounts of transition metal impurities might passivate

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nonradiative defects and thereby enlarge the radiative recombination rate. Another interpretation is

that the strain and electric fields of metal atoms in the vicinity of dislocations can increase the

migration energy in the shallow dislocation bands,which increases the photoluminescence

efficiency [104]. A model of the D-band luminescence was prposed by Weber and Alonso [111].

According to this model, D1 and D3 are the TO-phonon satellites of D2 and D4, respectively. The

D4 line represents the annihilation of an exciton bound to the dislocation core by a deeply bound

electron and a weakly bound hole. On the other hand, different authors suggested that the main

features of the dislocation-related photoluminescence can also be explained by transitions between

the deformation potential states at 90° partials of dissociated 60° dislocations. Following this

assumption, the D4 line is caused by radiative transitions between the shallow bands of a 90° partial

at a straight dissociated 60° dislocation segment while D1 and D2 result from radiative transitions

between states, that are localised at defects of the dislocation [112].

Most of the investigations of the properties of dislocations in silicon were carried out on deformed

silicon. The advantage of this method is that different dislocation arrangements can be produced

under defined conditions. Analogous analysis of dislocation arrangements in 2-dimensional

networks (grain boundaries) are still missing. The mean problem is the complexity of such networks

and the interaction between the dislocations. This is also true for dislocation networks formed in the

interface of bonded wafer pairs. Recently, however, the luminescence properties of dislocation

networks were studied in detail. Figure 8 shows the luminescence spectra of different bonded

samples. The spectra are obtained from samples having different misorientation. Detailed photo-

luminescence and cathodolumines-

cence measurements provide direct

evidence that the wavelength of light

emitted from the dislocation network

could be tailored to some extent by

misorientation of the wafers during

bonding procedure. Figure 9a shows

three CL spectra obtained from

dislocation networks with various

grades of misorientations at 77 K. D1

or D3 lines have the largest intensity

in the spectra due to the variation of

twist angle from 8.2° to 9°°

. Thus the

luminescence spectrum can be tailored

by the misorientation angles in a

controlled manner and the dominance

of either D1 or D3 radiation can be

attained. Furthermore, in some special

cases the D1 emission could

completely dominate the spectrum,

Figure 8: The impact of the misorientation/dislocation

structure on the luminescence spectra of the dislocation

networks. The misorientation (tilt and twist components

are indicated in the figure.

even at room temperature (RT) [113]. The intensity of the D1 emission is at least 10 times larger

than that of BB emission at RT. In the panchromatic image of the luminescence from the cross-

section of sample with dislocation network the luminescence is distributed only close to the bonded

interface and the profile of the signal exhibits a Gaussian-like shape. This inconsistency with the

diffusion-like behavior of minority carriers in our samples could be attributed to the changes in the

distribution of excitated minority carriers near the bonded interface due to the electric field

generated by the dislocation network.

The recombination activity of the bonded interface is much larger than that of single dislocation.

EBIC measurements proved the recombination activity and contamination level of dislocations. In

the sample bonded with extremely small misorientation angle, e.g., ~0.001°, the contamination

degree of the individual dislocations in the network with metal impurities was estimated as ~ 104

cm-1

from the EBIC results. The temperature dependence of the EBIC contrast gave the energy

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position of dislocation related states at ~70 meV below the conduction band or above the valance

band, in good agreement with DLTS results [113].

An external bias voltage applied across the bonded interface can significantly enhance the

luminescence intensity from the bonded interface. The reason for this effect can be that, on the one

hand, the external bias could reduce the potential barrier at one side of the bonded interface and

therefore increase the occupancy of dislocation related states responsible for the D-lines; on the

other hand, the bias could change the distribution of minority carriers close to the bonded interface.

This results in the variation of carrier recombination velocity at the bonded interface and in relevant

variation of luminescence. The application of the proper external bias voltage enhances the total

luminescence at any excitation level, but the enhancement is more pronounced for lower excitation

conditions. A maximum enhancement factor of 130 was achieved.

Applications of Hydrophobic Bonded Wafers

Semiconductor wafer direct bonding is today´s most applied technique to realize silicon on

insulator (SOI) substrates. Here wafers are bonded under hydrophilic surface conditions. The

application of hydrophobic surface conditions is not a standard process in modern microelectronic

technologies. There are, however different potential applications especially for MEMS production.

For instance, most of today´s photodetectors are prepared on epitaxial wafers where an intrinsic

layer was grown on a higher doped silicon substrate of the same type. The epitaxy process limits the

layer thickness to about 50 µm and the resistivity to less than about 500 cm. In order to increase

the efficiency of the photodetectors thicker (epitaxial) layers are required having also a lower sheet

resistivity. Such layers can be prepared by semiconductor wafer direct bonding of silicon wafers

having hydrophobic surfaces and a subsequent thinning to the required thickness. These wafers

represent a low-cost material especially for optoelectronic and high-temperature applications.

Hydrophobic bonded

wafer pairs were applied to prepare pin-

photodiodes using conventional CMOS

processes An example of a bonded hydro-

phobic wafer pair is shown in figure 9 after

device processing. Diodes of different size have

been prepared in this case. The dark current of

individual pin-diodes prepared on the standard

epitaxial material wass about 9.510-12

A at a

reverse voltage of UC = 0.5V and at room

temperature. An increasing UC causes an

increasing dark current(Id = 1.0810-9

A at UC =

50V). The reason is the increasing width of the

space charge region ds with increasing UC:

2/1

))((2

DA

DACDH

sNeN

NNUUd

(17)

In eq. (1) UD means the diffusion voltage, NA

Figure 9: Image of a bonded hydrophobic wafer

pair after complete CMOS processing. Wafer

diameter 4in.

and ND are the concentration of acceptors and donors, respectively, H is the dielectric constant and

e = 1.610-19

As is the elementary charge. Diodes prepared on bonded hydrophobic wafer pairs

result in dark currents equivalent or lower than for diodes prepared on the standard epitaxial

material [114]. The increase of Id with increasing layer thickness corresponds to the results of

SPICE simulation.

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The high-temperature behaviour of the dark current was also analysed on individual pin-diodes.

Increasing the measurement temperature increases also the dark current. The slope of the curve

measured for diodes on the epitaxial material, however, is higher so that Id becomes similar or

higher than for diodes on bonded hydrophobic wafers even at T 140°C. This let us assume that

thermally stimulated generation processes in the intrinsic layer (epitaxial layer) mainly contribute to

the dark current. Carrier generation processes on the bonded interfaces appears to be less important.

This interpretation is also confirmed by the fact that the differences of Id increase at higher reverse

voltages (which causes the extension of the space charge region up to the bonded interface). For

instance, a dark current of 2.110-5

A results for diodes on epitaxial wafers at T = 160°C (UC =

30V), while Id = 1.110-5

A is measured for diodes on bonded hydrophobic wafers under the same

conditions. A similar behaviour of the dark current described for individual pin-diodes was also

obtained for complex MOEMS.

The luminescence properties of

dislocations could be the most

important application of hydrophobic

wafers. As discussed before, dislocation

networks can reproducible be prepared

by wafer bonding which is required for

an application. The electroluminescence

(EL) at about 1.5 μm of a p-n junction

formed by direct bonding of p- and n-

type wafers was already observed [115].

An efficient D1 emission at 1.5 μm

from a MOS-LED based on the

dislocation network in bonded wafers

was also demonstrated [113]. When a

dislocation network with appropriate

structure is positioned near the Si/oxide

interface, close to/within the

accumulation layer, the radiative

recombination is dominated by the D1

line at about 1.5 μm. The tunnelling

current increases with increasing gate

voltage, leading to an enhancement of

the EL intensity. The efficiency of the

MOS-LED at 80 K is about 0.1% for

the 1.5 μm radiation. Figure 11a shows

the TEM images of the MOS-LED and

Fig. 11b shows the electroluminescence

spectra detected from the MOS-LED at

two temperatures. Increasing of the

temperature from 80 to 210 K causes a

red-shift of the D1 line position in the

spectra and a reduction of the EL

intensity by a factor of about 2. Further

increase of temperature to 300 K caused

further decrease in the EL efficiency.

Nevertheless, a sufficient 1.5 μm lumi-

Figure 10: (a) XTEM of the MOS-LED consisting of a

134 nm Ti layer on 1.8 nm Si oxide. The dislocation

network is positioned in a depth of about 45 nm (b) EL

spectra of the MOS-LED at 80 and 210 K. The EL data are

normalized on tunnelling current values.

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nescence at 300 K is achievable with dislocation networks, since clearly detectable D1 emission at

300 K (efficiency > 0.1%) was demonstrated already for a p-n LED containing a dislocation

network. Using the amplification of the D-band luminescence caused by an external bias voltage

across the dislocation network the efficiency might be considerably increased.

Conclusions

Hydrophobic wafer bonding is a useful technique to the reproducible preparation of defined

dislocation networks. There are several concepts of possible future applications of regular

dislocation networks fabricated by direct bonding of silicon wafers. For these concepts promising

and important experimental results were obtained.

For the dislocation based MOS-LED the working prototype was demonstrated.

The use of dislocation networks for the assembly of biomolecular units using Coulomb interactions

is another application to combine Si electronic technology with biomolecular applications and

nanotechnology.

Finally, buried conductive A Si-based insulating layer which is permeable for point

defects/impurities is another possible application. The bonded interface with the dislocation network

represents a depletion layer with high resistance, rejecting majority carriers and removing minority

carriers, provided a sufficient potential barrier is formed at the network. Compared with SOI, such Si-

based insulation layer would offer a way to clean the top Si layer by gettering, whereas the Si oxide

layer used as insulator in SOI is known to complicate gettering.

Finally, buried conductive networks might be viable based on conduction by dislocations.

Components for active control of carrier transport have been proposed. Experiments are under way

to explore the capability of dislocation conduction channels.

Acknowledgments

The author greatfully acknowledge T. Wilhelm, S. Hopfe, and R. Scholz for the sample preparation

and XTEM investigation. Part of the research was financially supported by the German Federal

Ministry of Education and Research (BMBF) under contract number 01M3170C

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