*LOW POWER VLSI DESIGN*

Analog and Low-Power Digital VLSI Design

LOW POWER VLSI DESIGN

*Analog and Low-Power Design Lecture 1 (c) 2003*Lecture 1Introduction to Low-Power Design

MotivationHistorical Drivers of Low-Power DesignMicroprocessor ScalingPower SourcesLow-Power Design Methods

Analog and Low-Power Design Lecture 1 (c) 2003

*Analog and Low-Power Design Lecture 1 (c) 2003*Motivation for Low-Power DesignScaling of Si CMOS technologyHigher functionality with smaller chipsHigher performance at lower costPortabilityNew portable computer-intensive applicationsMulti-mediaVideo display and captureAudio reproduction & captureHandwriting recognitionNotebook computerPersonal data assistantImplantable medical electronicsNeed for satisfactory battery life span

Analog and Low-Power Design Lecture 1 (c) 2003

*Analog and Low-Power Design Lecture 1 (c) 2003*Historical Drivers of Low-Power DesignPocket calculatorsHearing aidsImplantable pacemakers and cardiac defibrilatorsPortable military equipment for individual soldiersWristwatchesWireless computing

Analog and Low-Power Design Lecture 1 (c) 2003

*Analog and Low-Power Design Lecture 1 (c) 2003*Microprocessor Scaling ProblemsFeature sizes of transistors keep shrinkingMagnitude of power/unit area keeps growingHeat removal & cooling is worseningExample: VDD 5 V 3.3 V 2.5 VPower dissipation did not reduce plateaued at 30 WHigher cooling costs for power densities of 50 W/cm2Example: speech recognition needs a full PCB and 20 W of power to handle a 20,000 word vocabularyNiCd batteries only provide 26 W / pound battery weight

Analog and Low-Power Design Lecture 1 (c) 2003

*Analog and Low-Power Design Lecture 1 (c) 2003*Sources of Power DissipationCharging currentDue to logic transitions causing logic gates to charge/discharge load capacitanceShort-circuit currentp-tree and n-tree momentarily shorted as logic gate changes stateLeakage currentDiode leakages around transistors and n-wellsIncreasing 20 times for each new fabrication technologyWent from insignificant to a dominating factor

Analog and Low-Power Design Lecture 1 (c) 2003

*Analog and Low-Power Design Lecture 1 (c) 2003*Design for Low-Power TechniquesReduced supply voltageCharging power varies as VDD2Reduce transistor threshold voltages to maintain noise marginsBut reduced thresholds increase leakage currents exponentiallyChange your CMOS logic family use a low-power oneTransistor resizing to speed-up circuit and reduce powerUse parallelism and pipelining in system architecture use more, but slower, hardwareStandby modes clock disabling and power-down of selected logic blocksAdiabatic computing avoid gain/loss of heat during computingSoftware redesign to lower power dissipation

Analog and Low-Power Design Lecture 1 (c) 2003