SiGe HBT BiCMOS Field Programmable Gate Arrays for Fast Reconfigurable Computing
Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS
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Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS Tod Dickson University of Toronto June 9, 2005
description
Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS. Tod Dickson University of Toronto June 9, 2005. Motivation. Ever-growing bandwidth demands results in higher data rate broadband transceivers Next generation wireline applications will exceed 80-Gb/s. - PowerPoint PPT Presentation
Transcript of Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS
Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter
in 130-nm SiGe BiCMOS
Tod Dickson
University of Toronto
June 9, 2005
T. Dickson University of Toronto June 24, 2005
MotivationMotivation
Ever-growing bandwidth demands results in higher data
rate broadband transceivers
Next generation wireline applications will exceed 80-Gb/s.
To date, serial transmitters at this data rate have not
been demonstrated.
High power consumption even an 40-Gb/s makes high
levels of integration difficult.
Reducing power consumption without sacrificing speed is
a key challenge.
T. Dickson University of Toronto June 24, 2005
HBT vs. MOS High-Speed LogicHBT vs. MOS High-Speed Logic
High speed due to
intrinsic slew rate
Requires high supply
voltage (3.3V or more)
BiCMOS Cascode
Lower supply voltage
Needs higher current
for same speed
No power savings
T. Dickson University of Toronto June 24, 2005
Power reduction techniquesPower reduction techniques
43-Gb/s latch consumes only 20mW
BiCMOS logic family reduces supply voltage
Reduce tail current with inductive peaking
LP = CLV2
3.1 IT2
Stacked inductors
10 m
T. Dickson University of Toronto June 24, 2005
2.5-V, 10.7-to-86-Gb/s Serial Transmitter2.5-V, 10.7-to-86-Gb/s Serial Transmitter
8:1 MUX
Output Driver
On-chipPRBS for
BIST
40-GHz PLL
T. Dickson University of Toronto June 24, 2005
Die Photo & Measured ResultsDie Photo & Measured Results
1.5mm
1.8mm
Fabricated in 130-nm SiGe BiCMOS w/ HBT fT = 150 GHz
Measured 86-Gb/s eye diagram• 2 x 275mVpp output swing• < 600fs rms jitter• 6ps rise/fall times (20%-80%)
T. Dickson University of Toronto June 24, 2005
ComparisonComparison
Technology
fT/fMAX Data RateSupply
Voltage
Power
130-nm CMOS 85/90 GHz 40-Gb/s (half-rate) 1.5 V 2.7 W
InP HBT 150/150 GHz 43-Gb/s (full-rate) -3.6/ -5.2 V 3.6 W
180-nm SiGe BiCMOS
HBT: 120/100 GHz 43-Gb/s (half-rate) -3.6 V 1.6 W
180-nm SiGe BiCMOS
HBT: 120/100 GHz 43-Gb/s (full-rate) -3.6 V 2.3 W
130-nm SiGe BiCMOS
MOS: 85/90 GHz
HBT: 150/150 GHz86-Gb/s (half-rate) 2.5 V 1.36 W
T. Dickson University of Toronto June 24, 2005
ConclusionsConclusions
Demonstrated the first serial transmitter above 40-Gb/s
in any semiconductor technology.
Low-power operation achieved by
employing BiCMOS high-speed logic family to reduce
supply voltage.
trading off bias current for inductive peaking.
Adding a SiGe HBT to a CMOS process can result in a
serial transmitter with twice the data rate and half the
power dissipation.
