Loran-C ReceiverLoran-C Receiver

Team Deathstar:Team Deathstar: Christopher BirschbachChristopher BirschbachMatthew HaymanMatthew HaymanMatthew AndersonMatthew AndersonChristina CornerChristina CornerErin MowbrayErin Mowbray October 5, 2004

ECEN 4610 Capstone ECEN 4610 Capstone CDRCDR

AgendaAgenda

BudgetBudget System DiagramSystem Diagram Subsystem Subsystem

FunctionalityFunctionality– Hardware/SchematicsHardware/Schematics– Parts ListParts List– Software DesignSoftware Design

Progress since PDRProgress since PDR Future Goals and Future Goals and

DeadlinesDeadlines– Milestone 1Milestone 1– Milestone 2Milestone 2– ExpoExpo

Division of LaborDivision of Labor Questions/CommentsQuestions/Comments

BudgetBudgetItemItem DescriptionDescription Estimated PriceEstimated Price

ProcessorProcessor $100.00$100.00

LCD DisplayLCD Display    $75.00$75.00

Additional memoryAdditional memory    $50.00$50.00

A to D converterA to D converter    $50.00$50.00

Antenna AssemblyAntenna Assembly    $100.00$100.00

Receiver EnclosureReceiver Enclosure    $100.00$100.00

Printed Circuit BoardPrinted Circuit Board    $200.00$200.00

FPGAFPGA Xilinx FPGA Evaluation KitXilinx FPGA Evaluation Kit $250.00$250.00

FiltersFilters 3 Butterworth (8th order)3 Butterworth (8th order) $75.00$75.00

RS-232 InterfaceRS-232 Interface    $25.00$25.00

Support ElectronicsSupport Electronics Resistors, Caps, switches, sockets, cablesResistors, Caps, switches, sockets, cables $150.00$150.00

Power SupplyPower Supply    $100.00$100.00

Student Designed User ManualStudent Designed User Manual Weighted Paper, Binding, Printing CostsWeighted Paper, Binding, Printing Costs $150.00$150.00

Final Project DisplayFinal Project Display Printed Poster for Engineering ExpoPrinted Poster for Engineering Expo $100.00$100.00

Loran C User HandbookLoran C User Handbook    $25.00$25.00

Misc. Misc. (Ink Cartridges, Repair parts, reference (Ink Cartridges, Repair parts, reference

manuals)manuals) $200.00$200.00

   TOTAL:TOTAL: $1,750.00$1,750.00

Block DiagramBlock Diagram

Antenna/Receiver

Processing Unit

A/D Converter

FPGA

Processor

RAM

PCZero

Crossing State

Machine

Counter ALUAnalog Signal RS-232

Outline of ApproachOutline of Approach

The system will consist of the following The system will consist of the following subsystems:subsystems:– Antenna ReceiverAntenna Receiver– Analog-to-digital converter Analog-to-digital converter – Motorola 68HC11 processorMotorola 68HC11 processor– MemoryMemory– FPGAFPGA– Serial Interface Serial Interface – PCPC– PowerPower

Antenna/ReceiverAntenna/Receiver

AM Antenna 8th Order Butterworth Filter (MAX274B)

(This portion of the project will continue when the filters from Maxim arrive.)

Signal Processing Signal Processing Unit Unit Part ListPart ListParts List Part Number

Motorola Processor 68HC11

Flash AT29C256

Bi-directional drivers 74HC245

Latch 74HC373

Schmitt trigger inverter 74HC14

Xilinix FPGA XCS10

FPGA EPROM XC18V256

RAM HM62256

3.3V regulator 78M33

5V regulator 7805

A/D Converter AD7828

RS-232 Adapter MAX233

TTL AND gate 74LS08

8 MHz clock CO6050

Processor SchematicProcessor Schematic

FPGA DesignFPGA Design

Chip selectChip select State machineState machine CounterCounter

FPGA SchematicFPGA Schematic

FPGA – Chip SelectFPGA – Chip Select

Software DesignSoftware Design

FPGA:FPGA:– InputInput

Digital Loran-C signalDigital Loran-C signal– OutputOutput

Counter DataCounter Data Processor:Processor:

– InputInput Counter DataCounter Data

– OutputOutput Time delaysTime delays

PC:PC:– InputInput

Time delaysTime delays– OutputOutput

Latitudinal and Longitudinal coordinatesLatitudinal and Longitudinal coordinates

Software DesignSoftware Design

Initial Test CodeInitial Test Code

Software DesignSoftware Design

Progress since PDRProgress since PDR

Schematic DesignSchematic Design Initial Wire wrapped Initial Wire wrapped

board completedboard completed Basic Processor Basic Processor

FunctionalityFunctionality Basic FPGA Basic FPGA

FunctionalityFunctionality Basic RAM Basic RAM

FunctionalityFunctionality

Project TimelineProject Timeline

Future DeadlinesFuture Deadlines

Milestone 1 – 10/26Milestone 1 – 10/26 Milestone 2 – 11/16Milestone 2 – 11/16 Open-Lab Expo – Open-Lab Expo –

12/912/9

Milestone 1Milestone 1

Date: October 26Date: October 26thth

Parts completed: Parts completed: – Completed Wiring on Vector Board Completed Wiring on Vector Board – Antenna/Filtering –Clean signalAntenna/Filtering –Clean signal– Sampling by A/D converter Sampling by A/D converter

completedcompleted– Order first PCBOrder first PCB

Milestone 2Milestone 2

Date: November 16Date: November 16thth

Parts Completed:Parts Completed:– Functioning PCBFunctioning PCB– State machine on FPGA workingState machine on FPGA working– Communication between the Communication between the

Processing Unit and Processing Unit and Antenna/Receiver.Antenna/Receiver.

Capstone ExpoCapstone Expo

Working Loran-C Working Loran-C ReceiverReceiver– Functionality between all Functionality between all

3 Subsystems: 3 Subsystems: Antenna/Receiver, Antenna/Receiver, Processing Unit, & PCProcessing Unit, & PC

– Working Serial Working Serial

InterfaceInterface

Extra FeaturesExtra Features

These will be added if time These will be added if time permits at the end of the permits at the end of the semester.semester.– Portable Power SupplyPortable Power Supply– LCD DisplayLCD Display

Division of LaborDivision of Labor

Matt AMatt A– PowerPower– Memory interfaceMemory interface– Microprocessor ProgrammingMicroprocessor Programming

Chris BChris B– PC programmingPC programming– Microprocessor programmingMicroprocessor programming– User’s ManualUser’s Manual

Christy CChristy C– Antenna/FilteringAntenna/Filtering– Verilog DesignVerilog Design– User’s ManualUser’s Manual

Matt HMatt H– Antenna/FilteringAntenna/Filtering– PCB PCB – Microprocessor ProgrammingMicroprocessor Programming– PC programmingPC programming

Erin MErin M– Verilog DesignVerilog Design– User’s ManualUser’s Manual– PC interfacePC interface

Questions/CommentsQuestions/Comments