LOGIC GATES DIFFERENT TYPES OF - Devi Ahilya · PDF fileother next stage(s) logic gates (HTL...

Chapter 6Chapter 6

DIFFERENT TYPES OF LOGIC GATES

Ch06L7-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 2

Lesson 7

HTL gate


Outline

• High Threshold Logic (HTL) • HTL Features


Three Input HTL Circuit with one NPN output stage Transistor

V+CC

T

3kRd

T’

12k V+CC

B5k

ViA

Logic NAND Circuit

AViB

V-EE

Next stage

RB

Next stage

C

ViC

R’d

Rd

R’d Rd

R’d

6.9V


HTL Circuit Supply and Inputs VCC supply is of 15V in place of 5V Input Stage: It is based on the application

of two or more inputs to two or more n-ends of the p-n junction diodes in place of passive 450-Ohm resistance in RTL circuit. The p-ends are common and connect to two 12kΩΩΩΩ and 3kΩΩΩΩ resistances RD and R’D, which connects to supply voltage of 15V.


HTL Circuit Input StageThe common point of RD and R’D, also

connects to collector of a transistor T. The common point of p-ends also connects to the transistor-base


HTL Input Stage CircuitThe common point of RD and R’D, also

connects to collector of a transistor T. The common point of p-ends also connects to the transistor-base


Output Stage For the next Input Stage

• A common output from the transistor T’ at F is given to other diodes at the other next stage(s) logic gates (HTL gates), which will get the input from the transistor, T


Cut-off region inputIf input A or B or C is low ~0.2V(near

supply ground), the diode in the path of A or B, respectively will start conducting. Current through the diode will be approximately equal to (15V- 0.7V –0.2V)/(15000) Ohm = ~0.9 mA. [Voltage drop across a conducting p-n junction diode is threshold voltage = ~0.7V.]


Cut-off region input Voltage drop of 0.9V connects to the base of

T’ through 2 –diodes, one formed by base-emitter of T and other formed by Zener needing threshold voltage of 6.9V and total 7.6 V to turn ON and conduct.

Hence the transistor base is at ~0V, below cutoff voltage. When T’ is not conducting the output F = 1, high (~15V). T’ does not conduct when any (or both of the inputs) is low because voltage at the base drops below the cut-off voltage needed at the base


Saturation Region Case ‘1’ at both inputs A, B and C

If all the inputs A, B and C are high (>0.7V + 7.6V), the voltage at common p-ends will start exceeding 7.6V and the Zener diode circuit to the base will start conducting. When input A, B and C exceeds 8.3V and the voltage at the common p-ends exceeds (8.3V + VBE (ON))= 9V, the base-emitter junction of T’starts conducting


Saturation Region Case at input A or B

When the A and B inputs exceeds 7.6 V, the diode stops conduction and when exceeds 8.3V, becomes reverse biased. VBE (ON)remains at 0.7V. If transistor T’ base-emitter current exceeds a limit, the T’goes in saturation mode and it will start conducting current IC through R and VCE= ~ 0.2V. Therefore, F = 0 when A and B both ‘1’


Output at F Property of a NAND is that its output is 0 when all the inputs are 1


Outline

• HTL• HTL Features


Propagation delay

Let base-emitter capacitance = C nF [nF means nanoFarad.] If m = 4 stages, which connects to F, the total capacitance being all T next stages in parallel = 4C. Resistance is very small between base and emitter in logic ‘1’ state. Therefore, transistor turn-on delay is small.


Propagation delayResistance in logic ‘1’ state is 15000 Ohm, therefore turn-off propagation delay = (15000) mC ns. [nF * Ohm = ns.] Typically, the turn-On delay is 90 ns and turn-off delay is 240 ns. Circuit temperature sensitivity is small compared to DTL as the Zener has less temperature coefficient. The high threshold voltages give higher noise margin


Industrial Environment

Since the threshold potential for 1 is high, the HTL suits the industrial environment.


Power Dissipated per Gate

50 mW

10

Fan out

100 MHz

Maximum Operation frequency


Summary


• HTL gate has each input connection to n-p-n through a transistor followed by a Zener of 6.9 V in place of 1.4 V (diode pair in DTL). It functions as NAND.

• HTL gate has high threshold for logic 1 so that it functions in Industrial environment


End of Lesson 7

HTL Gates


THANK YOU

LOGIC GATES DIFFERENT TYPES OF - Devi Ahilya · PDF fileother next stage(s) logic gates (HTL...

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