EN2022: Laboratory PracticeDigital Electronics Laboratory Experiment: 01

Logic FamiliesPost-Laboratory Exercise

B.K.U.R. NawaratneK.D.C. PereraGroup: B2 T6Name: B.K.U.R. NawaratneGroup Members: Admission No: 090348EDate of Experiment: 23/09/2010Date of Submission: 13/10/2010

1. Diode Logic

1.1. By looking at the observations in table01 what can you say about the two diodes used for this part of the experiment?

By observing the table 01, it is clear that we do not get exactly 0V for logic 0 nor 5V for logic 1. That is because these Si diodes will experience a voltage drop when they are in act. We can overcome this issue by specifying threshold voltage values for logic 0 and 1. [1]

1.2. By looking at the observations in table 02 how many different logic low voltages that you can observe? (You can consider the threshold value as 2.5V) Hence predict effect on output voltage when the cascade level increases.

Even-though there were slight variations, all the low voltages were around 0.5.When the output is logic 0, it doesnt affect the output voltage much. But when the output voltage is in high, the output voltage will rise to 3.8V or around that. And maybe it could go into the forbidden zone, which is unspecified voltage zone.

1.3. Comment on the limitations/drawbacks of the diode logic family in terms of fan-out.

When we connect 2 or more gates in DL family, there will always be a reverse biased diode somewhere blocking the input signal which prevents the ideal operation of the circuit. Therefore DL logic gates are only food for single gate circuits.

2. Resistor Transistor Logic

2.1 Calculate the power dissipation of the RTL NAND gate shown in Fig.03 in the lab sheet. You may separately calculate the power dissipation for the two scenarios that were tested under 2.1 and 2.2 in the lab sheet.

Case 01: Pd1 = 5 x 36x10-3 = 0.18 J

Case 02: Pd2 = 5 x 10x10-3 = 0.05 J

2.2 Comment on the effect of resistor values on the gate power dissipation.

According to the laboratory results, when the resistor values increase, the power dissipation will decrease.

P = I2R - Equation No. 1V = IR - Equation No. 2

By equation 2 we can derive that when R increases, I will decrease. Therefore according to equation 1 we can say that P will increase. (All the symbols in the equations have their general meanings.)

2.3 Comment on the effect of resistor values on the gate propagation delay.

3. Diode Transistor Logic

3.1 Briefly explain what is meant by noise margin with respect to logic families.

The noise margin is the difference between the driver IC outputs as a valid logic voltage and what the receiver IC expects to see as a valid logic voltage.

NM(High) = V(OH) - V(IH)NM(Low) = V(IL) - V(OL)

Noise Margin = MIN(NM(High), NM(Low))

3.2 By using the observations in table 03 in your lab sheet calculate the power dissipation of the RTL gate you constructed.

Due to technical failures, part 3 of the laboratory exercise was unable to complete.

4. TTL Logic family

4.1 Justify the observation you obtained in section 4.2 in the lab sheet. (Briefly explain why the output looks like what you have observed)

According to the cascaded NOR gates circuit, the ideal CRO output should be a 10101010. Type of discrete signal. But according to the gained output it is a more analog like output. This is due to the variations of the diode logics.

4.2 Using the observations in the section 4.3 in the lab sheet calculate the per gate propagation delay of the TTL logic IC you used. Compare this value with the value mentioned in the datasheet of the IC.

References[1] Ken Bigelow Website, Online Education Support, Diode Logic, [Online]. Available: http://www.play-hookey.com/digital/electronics/dl_gates.html [Accessed: October 01, 2010].[2] University of New South Wales, Learning Center, Why is Referencing Important?, University of New South Wales, 2005. [Online]. Available: http://www.lc.unsw.edu.au/plagiarism/citation.html. [Accessed: April 28, 2010].[3] University of Southern Queensland, Referencing and plagiarism, University of Southern Queensland, 2009, [Online]. Available: http://www.usq.edu.au/plagiarism/infostud/plagexpla. [Accessed: April 28, 2010].[4] Murdoch University, Library, "How To Cite References - IEEE Style," Murdoch University, 2008. [Online]. Available: http://wwwlib.murdoch.edu.au/find/citation/ieee.html#World Wide Web Documents. [Accessed: April 28, 2010].