Licd All Write Ups 11

KJSCE/TE/VSEM/ETRX/2011-12

K. J. Somaiya College of Engineering, Mumbai-77Lab Manual: TE (Semester V, ETRX)

Instructions to the student Every student is expected to bring printout of write-up of his/her experiment to

be performed at the time of practical/tutorial session as per the time table The student is expected to take counter signature of the concerned faculty on

the same day during lab/tutorial session for the verification of outcomes of the experiment

The journal will content A4 size papers unless it is instructed for a particular subject

The students can use additional A4 size papers if necessary for writing journal Cover page of every experiment should be in the standard format as specified

along with this lab manual The contents/index of the journal should be as per the format given Students are expected to follow the instructions given by concerned faculty

during lab/tutorial session from time to time

LINEAR INTEGRATED CIRCUITS AND DESIGN PAGE NO



K. J. Somaiya College of Engineering, Mumbai – 77CONTENTS

Sr.

No.

Name of the Experiment Page

No.

Date of

performance

Date of

Submission

/ Correction

Remarks

This to certify that Bro. /Sis._ Roll No.

Exam.No. Class Div. Batch No. has completed the specified term work in subject of in satisfactory manner inside the College of Engineering as laid by the University of Mumbai during the academic year Jul. / Jan.20 to Nov./Apr.20

Overall Grade: Grade: AA / AB / BB / BC / CC

Staff member In-charge Head of the Department Principal



Roll No.

Class: Branch: Div: Batch

Subject: Experiment No.

Name of the Experiment:

Date of performance:

Date of Submission / correction:

Grade: AA / AB / BB / BC / CC

Signature of the Staff In-charge with date



EXPERIMENT NO. TITLE: To study the second order Low Pass Filter. Aim:To study the second order Low Pass Filter.

Apparatus:Op-Amp 741CR1 and R2=15kΩ,R A and RB= 10kΩ Capacitors: 10nF.

Theory:

Second order low-pass filter:-The standard form of transfer function is :H (j ω) = [1-( ω / ω o )2 + j (ω / ω o)/Q ]-1Vo/Vi = k/ [ S 2R1C1C2+ (1-k)R1C1+ R2C2 + R1C2 S + 1] Where ω o = [R1R2C1C2] -½Gain block is implemented with an op-amp as a non-inverting amplifier k=1+ RB / R A

Procedure:1) Connect the circuit as shown in the diagram.2) Apply sine wave i/p from 100Hz to 50KHz and measure o/p

voltage.3) Calculate gain in dB and plot graph of gain v/s frequency

on semi log paper.

Circuit Diagram:-



Observation Table:

Sr.No. Input Frequency Output Voltage

Roll No: Signature of faculty in-charge with date

Conclusions:



EXPERIMENT NO._3TITLE: study second order high-pass filter.Aim: To study second order high-pass filter.

Apparatus: Op-amp (741c) , Resistor 22kΩ (2), 10kΩ (2), Capacitor

Theory:Second order High Pass Filter:Interchanging possibilities of R and C in LP and KRC filter gives a HPKRC

filter. At low frequencies the capacitor offers a very high impedance, signals at this frequencies thus get attenuated. As the frequency increases, capacitor provides less impedance, consequently the output of the op-amp is high.

HOHP=k

ωo= [R1R2C1C2]-½

Q= [(1-k)(R2C2/R1C1)½ + (R1C2/R2C1)1/2+(R1C1/R2C2)½]-1

Procedure:1.Connect the circuit as shown in the diagram.2.Apply sine wave i/p from 100Hz to 50KHz and measure o/p voltage3.Calculate gain in dB and plot graph of gain v/s frequency

semi log paper.

Circuit Diagram:-


Observation Table:

Sr.No. Input Frequency Output Voltage


Conclusion :



EXPERIMENT NO._3TITLE: Design a Schmitt Trigger(Inverting) with UPT & LPT values.

Aim:- To Design and study the working of Schmitt Trigger using op-amp IC 741.

Design Problem:-Design a Schmitt Trigger with following parameters

1. UTP and LTP = 4 V.2. UTP = 4V. and LTP = 2 V.3. UTP=4V.and LTP=0V

10 V. P-P, 1 KHz Sine wave as input. , Vcc and Vee = + and – 12 V.

Designing :-1) For UTP and LTP = 4 V.

2) For UTP = 4V. and LTP = 2 V.

3) For UTP = 4V. and LTP = 0 V.


Apparatus:-

IC741 , CRO, Dual Power Supply, Function Generator, components R1= , R2= , R3=, Diodes= Connecting Wires.

Circuit Diagram:-1) 2)

Theory:- The class of Comparators which use the positive (regenerative) feedback is called as Schmitt Trigger or Regenerative comparators.The Schmitt trigger circuit is as shown above .The resistance divider formed byR1 & R2, connected between the output and the non-inverting terminal ofthe op amp, introduces positive feedback. This Schmitt trigger circuit is basically an inverting comparator with positive or regenerative feedback introduced. Thus it is called asregenerative comparator. Note that the sine wave has been applied as the input voltage to theinverting input.




Circuit Operation:In Schmitt trigger ,the reference voltage is Vp which is voltage developed across R2.Thereference voltage is not fixed but its amplitude and sign depend upon output voltage because, Vp = R 1 V o

R1+R2Two different triggering voltages are defined for the Schmitt trigger which are a)Upper Threshold Point(UTP) b) Lower Threshold Point(LTP).The output voltage will change its state every time when the input voltage crosses these threshold levels. The upper trigger point is defined as the value of Vi which forces a transition from +Vsat to –Vsat in the output voltage.Similarly the lower trigger point is defined as value of Vi which will force the output voltageto change from –Vsat to +Vsat.The upper threshold and lower threshold points are defined as followsVutp = R 1 Vsat

R1+R2Thus upper threshold point is a positive reference voltage, while lower threshold point is given byVltp = R 1 – V sat.

R1+R2A sinusoidal input is applied to the inverting input of the OP-AMP. Initially let us assume that the output voltage is +Vsat. Therefore the reference voltage Vp at the non-inverting terminal is given by

Vp = R 1 . Vsat

R1+R2The output voltage Vo=+Vsat up to point A .At point A the input voltage Vi = Vutp. As soon as Vi becomes slightly higher than Vutp, theoutput voltage switches from +Vsat to –Vsat. Now the reference voltage becomes negative and is given by

Vp = R 1 . –Vsat.R1+R2

.The output voltage remains equal to –Vsat between points A and B

.at point B the input voltage crosses Vltp and becomes more negative

.than Vltp .Therefore the comparator output switches to +Vsat. This will

.change the reference voltage to

. Vp = R 1 * V sat

. R1 +R2

.The output voltage will remain equal to +Vsat up to point C where it changes

.state to –Vsat. This process will repeat itself.

.Procedure :.1. Connect the circuit as shown in the fig 1) , 2) and 3) with proper resistances used.2. Observe the waveforms at the i/p and o/p terminal.3. Verify observed and theoretical values.4. Change the Peak–Peak value of Vi from 10V. to 12V. and to 3V. and observe Vo.5. Also observe the hysterisis of the ckt keeping CRO in X-Y mode.6. Observe Vo waveform If we reduce the value of R1 = 0Ω .



Observation Table:

1) For UTP and LTP = 4 V.

Sr.No. Vi Theoretical values Practical Values

1

2

3

10V

12V

3V

2) For UTP =4V and LTP = 2 V.


1

2

3

10V

12V

3V


3) For UTP=4V and LTP = 0 V.


1

2

3

10V

12V

3V

Observation :- Draw i/p and o/p waveforms as observed on CRO for both the circuits with scale. Use graph paper. Comment and draw if necessary for points 4, 5 and 6 in procedure.


Conclusions:


EXPERIMENT NO.

TITLE: Design of Astable Multivibrator using IC 741

Aim-To Design and study the square wave generator.

Design:- Design Astable MV using opamp 741IC with following parameters:Frequency- between 200 Hz to 1 KHz. Vcc and Vee = +& - 12 V. Vop-p = 2.Vsat.

Designing and Circuit Diagram:-



Apparatus:- Multimeter, connectring wires, CRO, DC Power supply(0 -15V), function generator.

ComponentsSr No.- Component Specifications Quantity

1 741 IC-Op-amp 12 Resistor R1 13 Resistor R2 14 Resistor R 15 Capacitor 1

Theory-The circuit of an Astable Multivibrator is shown. It is called as free running or square wave generator. The output of this circuit will be at+Vsat or -Vsat depending upon whether the differential voltage is positive or negative respectively. To explain the operation, we can see that the capacitor voltage of inverting terminal is zero at start. Assume Vo = Vsat. Then Vp = βVsat where β= R1/(R1+R2) (feedback factor).Now Vn = 0V and Vp = + βVsat So Vo will be + Vsat. (Our assumption is true). . With the output voltage at +Vsat, the capacitor start charging through R from 0V to +Vsat. The voltage across the capacitor start increasing and Vo remains same till capacitor voltage is less thanβVsat, Once this voltage is crossed βVsat the output voltage swings to–Vsat and now the capacitor charges in opposite direction towards – Vsat. Again when Vc falls below –Vsat value, the op-amp goes to positive saturation. The time period of the output waveform is given by T=2RC ln [(1+ β)/(1-β)]. If we substitute value of β then equation becomes T=2RC ln [1+ (2R1/R2)]

Procedure:-1-Connect the circuit as shown in diagram.2-Switch on the power supply.3-Observe the o/p waveforms on CRO and measure frequency.4-Connect 2 capacitors in series and then in parallel and Observe the o/p waveforms on CRO and measure frequency.5-Change the value of R and Observe the o/p waveforms on CRO and measure frequency .6-Now change the ratio of R1/R2 to half and observe the o/p waveforms on CRO and measure frequency.7-Compare all the results with the theoretical values.



Observation Table:-Sr. No. Description of circuit

connectionObserved value Theoretical value

1 With designed R , C2 2 Cs in series3 2Cs in parallel4 R varied to Rmin5 R varied to Rmax6 R1/R2 changed to


Conclusions:


EXPERIMENT NO. TITLE: Study of Triangular wave using IC 741.Aim: - To Design and study the working of Triangular Wave Generator using op- amp IC 741.Design: Design Triangular Wave Generator with following parameters:-

Frequency range of Triangular Wave 100 to 200Hz., C = 0 .47µFVcc and Vee = + and – 12 V.

Designing:-

Apparatus:- IC741 2 in numbers, R1= ,R2= C =0.47µF, R=

CRO, Dual Power Supply, Connecting Wires.

Circuit Diagram:-


Theory:-Triangular wave generator using lesser number of components is shown in the fig. It basically consists of a two level comparator followed by an integrator. The output of the comparator OA1 is a square wave of amplitude±Vsat and is applied to the (-) input terminal of the integrator OA2 producing a triangular wave. This triangular wave is fed back as input to the comparator OA1 through a voltage divider R2 R1. Initially, let us consider that the output of comparator OA1 is +Vsat. The output of the integrator OA2 will be a negativegoing ramp. thus Vp1becomes positive. At a time t=t1, when the negative goingramp attains a value of -Vramp, the effective voltage at point P1 becomesslightly less than 0V.This switches the output of OA1 from positive saturationto negative saturation level -Vsat. During the time when the output of OA1 is at-Vsat, the output of OA2 increases in positive direction. And at the instant t=t2,the voltage at point P1 becomes just above 0V, there by switching the output ofOA1 from -Vsat to +Vsat. The cycle repeats and generates a triangular waveform at output of opamp2. Eventually output of opamp1 will be square wave of same frequency. It can seen that the frequency of triangular wave & square will be same. However, the amplitude of triangular wave depends upon the ratio of R1 and R2 and Vsat value.The output voltage of OA1 can be set to desired level using appropriate zener diodes or a bridge of diodes and zener.. The frequency of the triangular waveform is dependent on ratio of R1 and R2 also and on R and C values.Frequency of triangular wave f0 will be as follows:fo = 1/ 4RC(R1/R2) = R2/ 4R1RCPeak to peak amplitude of triangular wave f0 will be as follows: Vop-p = 2R1Vsat/R2

Procedure:-1-Connect the circuit as shown in diagram.2-Switch on the power supply.3-Observe the triangular o/p waveforms on CRO and measure frequency.4-Connect 2 capacitors in series and then in parallel and Observe the o/p waveforms on CRO and measure frequency.5-Change the value of R and Observe the o/p waveforms on CRO and measure frequency .6-Now change the ratio of R1/R2 and observe the o/p waveforms on CRO and measure frequency.7-Compare all the results with the theoretical values.

Observation Table:-


Sr. No. Description of circuit connection

Observed value Theoretical value

1 With designed R , C

2 2 Cs in series

3 2Cs in parallel

4 R varied to Rmin

5 R varied to Rmax

6 R1/R2 changed to


Conclusions:


EXPERIMENT NO.

TITLE: Generating PWM using IC 555

Aim: - To generate PWM using IC 555 and studying amplitude variation of input signal to the

output waveform.

Apparatus: - Multimeter, connecting wires, CRO, DC Power supply(0 -15V), function generator.

Components:-

Sr. No Component Specifications Quantity1 IC 555 12 Resistor 10kΩ 13 Capacitors 0.47µF 1

1 nF 1

Circuit Diagram: -


Theory: - The monostable multivibrator, when applied with a modulating control input signal at pin no. 5 can act as pulse width modulator. The series of trigger pulses at pin no. 2 generates a series of output pulses. The duration of output pulses are determined by triggering of upper comparator, which in turn depends on the modulating signal i/p at pin no. 5. This is due to the fact that, the modulating signal is superimposed upon the voltage (2/3)VCC

obtained through the voltage divider circuit. The threshold level of the upper comparator thus changes, and the

output pulse modulation occurs.

It can be seen that, the frequency of the output remains same, with the duty cycle of the output varying in response to the modulating input.

Procedure:-1) Connect the circuit as shown in diagram.

2) Measure the duty cycle of the PWM signal.

3) Vary the amplitude of the input signal and observe the corresponding

changes in duty cycle of the PWM signal.

Roll No: Signature of faculty in-charge with date:

Conclusions:


KJSCE/TE/ETRX/VSEM/2009-10

EXPERIMENT NO:

TITLE: Study of R-2R ladder type DAC.Aim : To study R-2R ladder type DAC.

Apparatus: OP-AMP 741C , R = 1KΩ , 2R = 2.2KΩ , Bread Board , Connecting wires , power supply , Connecting wires , Digital voltmeter.Theory : The weighted resistor type DAC not only requires wide range of resistor values but also it’s value of largest resistor is 128 times the R of the circuit ; and thus to avoid this problem basically R-2R LADDER type DAC is preffered. The R-2R network can be analysed by using the thevenin’s theorem by obtaining output voltage corresponding to each digital input d1,d2,d3,d4 seperately and add them to get the final voltage Vo.The expression for the output voltage is

Vo= VR [ d12-1 + d22

-2 + d32-3 + ..…+ dn2

-n ]Procedure : 1) Connect the circuit as shown in the diagram.

2) Apply the digital inputs to the respective 4 bit inputs.3)Measure the analog output voltage and compare

theoretical values obtained by calculation.

Circuit Diagram :


Observation table:

SR.NO Digital Input Code Measured value (V) Calculated value (v)

Roll No: Signature of faculty in-charge with date:


Calculations :

Conclusion s:


EXPERIMENT NO. TITLE:Aim: To measure op amp parameters like Vio IB+ IB- I io and

Slew Rate (SR), CMRR & plot the frequency response.

Apparatus:IC741, Resistors (5KΩ , 2.2M Ω ,50Ω, 1MΩ ), Connecting wires, Signal generator, multimeter ,CRO, DC Power supply.

Theory:The op amp used is high performance monolithic one constructed using the fair child planar epitaxial process. It is intended for wide range of analog applications. High common mode voltage & absence of latch up tendencies make 741 ideal for use as a voltage follower.

Important features are:1. No frequency compensation required2. No short circuit protection3. Offset voltage nullifying capability4. No latch up problem5. Large common mode & differential gain

The electrical parameters to be studied are defined as follows:

Input offset voltage (Vio):It is voltage that must be applied between 2input terminals of op amp to null output. For 741, Vio (max)=6mv (dc)

Input offset current (Iio):It is the algebraic difference between the currents into the inverting & non- inverting terminals. For 741, Iio(max)=200nA

Input Bias (Ib):It is the average of the currents flowing into the inverting & non inverting input terminals of op amp. For 741C, Ib=500 nA

Offset voltage adjustment range:It is the range through which the input offset voltage can be adjusted by varying the 10k pot, connected between the offset null pins 1&5 with its wiper connected to the negative supply(-Vee). For 741c, offsetvoltage adjustment range is +/- 15mv.

Common mode rejection ratio(CMRR):It is the ratio of differential voltage gain (Ad) to the common mode voltage gain (Ac).

Large signal voltage gain (A):Voltage gain=output voltage (Vo) / differential input voltage(Vd) Largesignal voltage gain of 741c is 2*10^5 typically.

Slew rate:It is the max rate of change of output voltage per unit of time & is expressed in V / microsec. Slew rate of 741c is 0.5v/microsec.


Procedure: i) Vio :

i)connect a circuit as shown.ii)Select resistor values to get the gain of100. iii)Measure output voltage.iv)Calculate Vio

ii) IB+i)connect a circuit as shown.ii)Measure output voltage to calculate IB+

iii) IB-

i)connect a circuit as shown.ii)Measure output voltage to calculate IB-

iv)I ioi)I io = IB+ - IB-

v)Slew Ratei)connect a circuit as shown. ii)Give sin wave input of 10V. iii)Observe the output waveform.iv) Find out the maximum frequency at which we can

Obtained an undistorted output voltage with peak value isdetermine by slew Rate.

vi)CMRRi)connect a circuits as shown for Vdm and V cm.

ii)Calculate CMRR


Circuit Diagram:

i) Vio ii) IB+

iii) IB- iv)Slew Rate

v)CMRR

i) Vdm ii) V cm.


observation Table:

Sr.No. Parameters Practical values From DATASHEET


Conclusions:




EXPERIMENT NO. TITLE:Aim: To study IC 8038 function generator.

Apparatus:Function generator kit using 8038, DC power supply.

Theory:The operation of IC 8038 function generator is based on linear charging and discharging of capacitor as shown in functional diagram of IC 8038.

There are two current sources, out of these one, sourcing current while other is sinking the current. These current sources alternately charge an discharge an external capacitor. When current source ‘I’ drives volt above (capacitor)+ve reference volt level,comparator1 flips the F/F. This in turn switches the current source2. Current source2 discharges the capacitor at same rate as it was charged when triangular wave falls below the –ve reference level, the other comparator flips the F/F.

Current source2 is switched out & current source1 begins charging up capacitor again. The volt across external capacitor is buffered and becomes triangular wave output. The o/p of F/F is buffered and becomes square wave

Both triangular and square wave outputs are buffered so that output impedance of each is 200ohms. However the sine wave output is obtained by giving triangular o/p to sine shaper but it has relativelyhigh output impedance of 1kohm. From this sine wave is often fed to aseparate non-inverting amplifier that provides buffering gain &amplitude adjustments.

Procedure:1.Give supply voltage of 10volts2.Check the output at pin no. 2,3,9.3.Check by varying pot of 100KΩ & 1KΩ which parameter of which

waveform gets varied.4.Draw the waveform & measure the different parameters of waves asper the absolute value.


Circuit Diagram:


Conclusions:




EXPERIMENT NO. TITLE:Aim: To study Astable Multivirator using IC 555.

Apparatus:Kit, connecting wires, CRO, power supply. etc

Theory:Astable multivibrator is also called free running oscillator, this circuit does not require any triggering signal to change its output state.

Initially when the supply is switched on, the voltage across the capacitor will be zero which will be compared with the 2/3 rd Vcc in the upper comparartor and 1/3rd Vcc in the lower comparator which makes flip flop to set making output Q to go high and Q* to go low. Through inverter the final output goes high. so the transistor Q1 will remain off and the capacitor starts charging through Ra, Rb towards Vcc. When the voltage across the capacitor becomes slightly more than 2/3rd Vcc, the upper comparator output goes high and lower comparator output goes low.Flip flop resets making Q =0 and Q* =1. through inverter final output goeslow and transistor Q1 turns ON. The capacitor now starts discharging , when its voltage becomes slightly less than 1/3rd Vcc, the final output goes high again.The cycle repeats producing a rectangular wave at the final output.

The equation for the time period is: Ton= 0.69[(Ra + Rb)* c]

Toff= 0.69 Rb* c

Total time period,T= 0.69(Ra + 2 Rb) *c.

The frequency of oscillation, F= 1/T.

the duty cycle is ,D= Ton / T

Design Procedure:

For a given value of frequency and duty cycle the circuit can be designed as follows;Assume the value of capacitor for a specified design.

The resistors value can be decided by formula below:



Rb = 1.4(D – 1) / FC

Ra = Rb (2D – 1) / (1 – D)

Where ,D = given duty cycle, F = given frequency.

Procedure:

1.Connect the circuit as shown in the fig.2.Adjust the pot values as per the design.3.Observe the waveforms at the o/p terminal and across the capacitor.4Verify observed and theoretical values.

Circuit Diagram:



observation Table:

parameter Observed values Calculated values


Conclusions:



EXPERIMENT NO. TITLE:Aim: To study 555 as a Monostable Multivibrator.

Apparatus:555 kit, Function Generator, CRO, Power Supply, Connecting Wires.

Theoryl: A Monostable Multivibrator, often called a one-shot Multivibrator, is a Pulse-generating circuit in which the duration of the pulse is determined by the RC network connected externally to the 555 timer. In a stable or standby state the output of the circuit is approximately zero or at logic-low level. When an external trigger pulse is applied, the output is forced to go High (= Vcc). The time the output remains high is determined by the External RC n/w connected to the timer.The Monostable circuit has only one stable state (output low), hence the name Monostable.

Figure shows internal block diagram of 555 configured for Monostable Operation. According to figure, initially when the output is low, i.e. the Circuit is in stable state, transistor Q1 is ON and capacitor C is shorted toground. However, upon application of a negative going trigger pulse to pin2of amplitude greater than 1/3Vcc comparator 2’s o/p switches fromhigh to low, sets the flip flop, which in turn drives the o/p to its high state, This turns Transistor Q1 OFF, which releases the short circuit across the External capacitor C and drives the o/p high. The capacitor C now charges towards Vcc through R. However, when the voltage across the capacitor equals 2/3 Vcc, comparator 1’s o/p switches from low to high, resets the flip flop, which in turn drives the o/p to its low state The o/p of the flip flopturns transistor Q1 ON, and hence capacitor Crapidly discharges through the transistor. The output of the MonostableRemains low until a trigger pulse is again applied. Then the cycle repeats.

The graph shows the trigger i/p, output voltage and capacitor voltageWaveforms.

T = 1.1* R*C Design procedure :For a given value of the time period , the resistance value can be calculated from above equation of time period . The capacitance value can beassumed for a specific time period

Procedure:1.Connect the circuit as shown in the fig.2.Adjust the pot value as per the design.3.Give a fixed frequency square wave input to the differentiator ckt. .4.Observe the waveforms at the o/p terminal, across the capacitor and at the o/p of the differentiator.5.Verify observed and theoretical values.

Circuit Diagram:



observation Table:

parameter Observed values Calculated values


Conclusions:

Licd All Write Ups 11

Documents

Transcript of Licd All Write Ups 11