lic mcq(1)

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1.Determine the output from the following circuit a) 180 o in phase with input signal b) 180 o out of phase with input signal c) Same as that of input signal d) Output signal cannot be determined View Answer Answer: b Explanation: The input signal is given to the inverting input terminal. Therefore, the output V o is 180 o out of phase with input signal V 2 . 2. Which of the following electrical characteristics is not exhibited by an ideal op-amp? a) Infinite voltage gain b) Infinite bandwidth c) Infinite output resistance d) Infinite slew rate View Answer Answer: c Explanation: An ideal op-amp exhibits zero output resistance so that output can drive an infinite number of other devices. 3. An ideal op-amp requires infinite bandwidth because a) Signals can be amplified without attenuation b) Output common-mode noise voltage is zero c) Output voltage occurs simultaneously with input voltage changes d) Output can drive infinite number of device View Answer

Transcript of lic mcq(1)

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1.Determine the output from the following circuit

a) 180o in phase with input signalb) 180o out of phase with input signalc) Same as that of input signald) Output signal cannot be determinedView Answer

Answer: bExplanation: The input signal is given to the inverting input terminal. Therefore, the output Vo is 180o out of phase with input signal V2.

2. Which of the following electrical characteristics is not exhibited by an ideal op-amp?a) Infinite voltage gainb) Infinite bandwidthc) Infinite output resistanced) Infinite slew rateView Answer

Answer: cExplanation: An ideal op-amp exhibits zero output resistance so that output can drive an infinite number of other devices.

3. An ideal op-amp requires infinite bandwidth becausea) Signals can be amplified without attenuationb) Output common-mode noise voltage is zeroc) Output voltage occurs simultaneously with input voltage changesd) Output can drive infinite number of deviceView Answer

Answer: aExplanation: An ideal op-amp has infinite bandwidth. Therefore, any frequency signal from 0 to ∞ Hz can be amplified without attenuation.

4. Ideal op-amp has infinite voltage gain becausea) To control the output voltageb) To obtain finite output voltagec) To receive zero noise output voltaged) None of the mentionedView Answer

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Answer: bExplanation: As the voltage gain is infinite, the voltage between the inverting and non-inverting terminal (i.e. differential input voltage) is essentially zero for finite output voltage.

5. Determine the output voltage from the following circuit diagram?

a)

b)

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c) d) None of the mentionedView Answer

Answer: cExplanation: In an ideal op-amp when the inverting terminal is zero. The output will be in-phase with the input signal.

6. Find the output voltage of an ideal op-amp. If V1 and V2 are the two input voltagesa) VO= V1-V2

b) VO= A×(V1-V2)c) VO= A×(V1+V2)d) VO= V1×V2

View Answer

Answer: bExplanation: The output voltage of an ideal op-amp is the product of gain and algebraic difference between the two input voltages.

7. How will be the output voltage obtained for an ideal op-amp?a) Amplifies the difference between the two input voltagesb) Amplifies individual voltages input voltagesc) Amplifies products of two input voltaged) None of the mentionedView Answer

Answer: aExplanation: Op-amp amplifies the difference between two input voltages and the polarity of the output voltage depends on the polarity of the difference voltage.

8. 9. Which is not the ideal characteristic of an op-amp?a) Input Resistance –> 0b) Output impedance –> 0c) Bandwidth –> ∞

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d) Open loop voltage gain –> ∞View Answer

Answer: aExplanation: Input resistance is infinite so almost any signal source can drive it and there is no loading of the preceding stage.

11. Find the input voltage of an ideal op-amp. It’s one of the inputs and output voltages are 2v and 12v. (Gain=3)a) 8vb) 4vc) -4vd) -2vView Answer

Answer: dExplanation: The output voltage, VO = (Vin1- Vin2)=> 12v=3×(2- Vin2)=> Vin2= -2v.

12. Which factor determine the output voltage of an op-amp?a) Positive saturationb) Negative saturationc) Both positive and negative saturation voltaged) Supply voltageView Answer

Answer: cExplanation: Output voltage is proportional to input voltage only until it reaches the saturation voltage. The output cannot exceed the positive and negative saturation voltage. These saturation voltages are specified by an output voltage swing rating of the op-amp for given values of supply voltage.

Depending on the value of input and reference voltage a comparator can be named asa) Voltage followerb) Digital to analog converterc) Schmitt triggerd) Voltage level detectorView Answer

Answer: dExplanation: A comparator is some time called as voltage level detector because, for a desired value of reference voltage, the voltage level of the input can be detected.

2. Why clamp diodes are used in comparator?a) To reduce output offset voltage

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b) To increase gain of op-ampc) To reduce input offset currentd) To protect op-amp from damageView Answer

Answer: dExplanation: The diodes protect the op-amp from damage due to excessive input voltage. Because of these diodes the difference input voltage of the op-amp is clamped to 0.7v or -0.7 v, hence these diodes are clamp diodes.

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3. Find the non-inverting comparator

View Answer

Answer: aExplanation: In a non-inverting comparator a fixed reference voltage Vref of 1v is applied to positive inverting input terminal and the other time vary in signal voltage is applied to non-inverting input terminal of the op-amp.

4. How the op-amp comparator should be choosen to get higher speed of operation?a) Large gainb) High slew ratec) Wider bandwidthd) None of the mentionedView Answer

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Answer: cExplanation: The bandwidth of the op-amp comparator must be wider so that the output of comparator can switch rapidly between saturation levels. Also, the op-amp responds instantly to any change in condition at the input.

5. How to obtain high rate of accuracy in comparator?a) All of the mentionedb) High voltage gainc) High CMRRd) Input offsetView Answer

Answer: aExplanation: High voltage gain causes comparator output voltage to switch between saturation levels. High CMRR rejects noise at input terminal and input offset (voltage & current) help to keep changes in temperature variation very slight.

6. How to keep the output voltage swing of the op-amp comparator within specific limits?a) External resistors or diodes are usedb) External zeners or diodes are usedc) External capacitors or diodes are usedd) External inductors or diodes are usedView Answer

Answer: bExplanation: To keep the output voltage swing within specific limit, op-amps are used with external wired components such as zeners or diodes. In the resulting circuit, the outputs are limited to predetermined values.

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7. Zero crossing detectors is also called asa) Square to sine wave generatorb) Sine to square wave generatorc) Sine to triangular wave generatord) All of the mentionedView Answer

Answer: bExplanation: In zero crossing detectors, the output waveform is always a square wave for the applied sinusoidal input signal.

8. What is the drawback in zero crossing detectors?a) Low frequency signal and noise at output terminalb) High frequency signal and noise at input terminalc) Low frequency signal and noise at input terminal

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d) High frequency signal and noise at output terminalView Answer

Answer: cExplanation: Due to low frequency signal, the output voltage may not switch quickly from one saturation voltage to other. The presence of noise can fluctuate the output between two saturation voltages.

9. State a method to overcome the drawback of zero crossing detectors?a) Increasing input voltageb) Use of positive feedbackc) Connect a compensating networkd) None of the mentionedView Answer

Answer: bExplanation: The drawback of zero crossing detectors can be in cured with the use of regenerative or positive feedback that causes the output to change faster and eliminate any false output transition due to noise signals at the input.

10. Name the comparator that helps to find unknown input.a) Time marker generatorb) Zero crossing detectorsc) Phase meterd) Window detectorView Answer

Answer: dExplanation: Sometimes it is necessary to find the instant at which an unknown input is between two threshold levels. This can be achieved by a circuit called window detector.

11. Find the instance at which the input can be fed to the op-amp in a three level comparator with LED indicator.

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a) When Green LED glowb) When Yellow LED glowc) When Red LED glowd) All of the mentionedView Answer

Answer: aExplanation: The input can be fed to the op-amp when the green LED glows, which is considered to be safe input that is when the input voltage is between 3v and 6v.

12. Find the output voltage at the point V2 from the given circuit.

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View Answer

Answer: bExplanation: The output of the zero crossing detector is differentiated by an RC circuit (RC>>1). So, the voltage at V2 is a series of positive and negative pulses.

13. Mention the application areas of time marker generator can be useda) Monoshotsb) SCRc) Sweep voltage of CRTd) All of the mentionedView Answer

Answer: dExplanation: A diode connected at the output of time marker generator circuit converts the sinusoidal signal into a train of positive pulses. So, these pulses are used in triggering the monoshot, SCR, sweep voltage of CRT, etc.

14. Which among the following is used to increase phase angle between different voltages?a) Phase detectorb) Window detectorc) Zero crossing detectord) None of the mentionedView Answer

Answer: aExplanation: Phase angle between different voltages can be measured using phase detector

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circuit. The corresponding voltage to be measured is converted into spikes and the time interval between the pulse spikes is measured, which is proportional to the phase difference.

15. For the comparator shown below, determine the transfer curves if an ideal op-amp with VZ1= VZ2=9v.

View Answer

Answer: aExplanation: The open loop voltage gain of an ideal op-amp AOl=∞, even a small positive or negative voltage at the input drives the output to ±Vsat. So, the output voltage VO = ±( V2 +Vsat)Therefore, VO = ±(VZ+VSat) =± (9+0.7) = ±9.7 v.

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Find the input and output resistance for the circuit shown.Specification for 741 op-amp : A=400000 ; Ri = 33MΩ; Ro = 60Ω;RF = 11kΩ; R1 = 2kΩ; Supply voltage = ± 15v; Maximum output voltage swing = ± 13v.

a) RIF = 66MΩ, ROF = 30Ωb) RIF = 30MΩ, ROF = 6kΩc) RIF = 15kΩ, ROF = 50MΩd) None of the mentionedView Answer

Answer: aExplanation: AF = 1+(RF/R1) = 1+(11kΩ/2kΩ) = 6.5;B= 1/ AF = 1/6.5 = 0.154;Input resistance of RIF = R1(1+AB) = 33MΩ[1+(6.5*0.154) ]= 66MΩ;Output resistance of ROF = Ro/(1+AB) = 60/[1+(6.5*0.154) ]= 29.98 ≅30Ω.

2. The output resistance of the op-amp with feedback isa) Same as that of the output resistance without feedbackb) Greater than that of the output resistance without feedbackc) Smaller than that of the output resistance without feedbackd) None of the mentionedView Answer

Answer: cExplanation: In voltage series feedback amplifier, the output resistance is (1/(1+AB)) times the output resistance of the op-amp. Therefore, the output resistance of the op-amp with feedback is much smaller than the output resistance without feedback.

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3. Find the output current in the voltage series feedback amplifier.a) io ={ [Vo+(A*Vid)]/Ro}b) io ={ [Vo-(A*Vid)]/Ro}c) io =(Vo/Ro)*A

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d) io =[A*(Vo-Vid)]/Ro

View Answer

Answer: bExplanation: The output current in voltage series feedback amplifier is given as io ={[Vo-(A*Vid)]/Ro}.

4. Find the unity gain bandwidth for voltage series feedback amplifier?a) UBG = Afo

b) UBG = AfF

c) UBG = Afo fF

d) UBG = AFfo

View Answer

Answer: aExplanation: The unity gain bandwidth is given as product of open loop voltage gain and break frequency of an op-amp.

5. The bandwidth of a non-inverting amplifier with feedback is equal toa) fo(AB)b) fo(AB-1)c) fo(1+AB)d) fo(1-AB)View Answer

Answer: cExplanation: The bandwidth of the non-inverting amplifier with feedback is equal to its bandwidth without feedback times (1+AB). i.e. fF=fo(1+AB).

6. How are the saturation voltage specified on the manufacture’s datasheet?a) Negative voltageb) Output voltage swingc) Supply voltaged) None of the mentionedView Answer

Answer: bExplanation: In an open loop op-amp, the total output offset voltage (i.e. output voltage swing) is equal to either the positive or negative saturation voltage.

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7. What is the formula for total output offset voltage with feedback?a) VooT = ± Vo/(1+AB)b) VooT = ± Vsat*(1+AB)c) VooT = ± Vsat/(1+AB)

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d) VooT = ± Vo*(1+AB)View Answer

Answer: cExplanation: The total output offset voltage with feedback = (Total output offset voltage witput feedback) / (1+AB). i.e. VooT = ± Vsat/(1+AB).

8. Which of the following has the same characteristic as that of non-inverting amplifier with feedback?a) Perfect feedback amplifierb) Voltage followerc) Perfect voltage amplifierd) All of the mentionedView Answer

Answer: cExplanation: A perfect voltage amplifier has very high input resistance, very low output resistance, stable voltage gain, large bandwidth and very little output offset voltage.From the analysis of the characteristic of non-inverting amplifier with feedback, it is clear that it exhibits the characteristics of a perfect voltage amplifier.

9. What is the gain of voltage follower?a) Gain > ∞b) Gain –>1c) Gain <1d) Gain -->∞View Answer

Answer: bExplanation: Voltage follower is non-inverting amplifier configured for unity gain. Such that the output voltage is equal to and in phase with the input.

10. Which is preferred to attain higher input resistance and the output amplitude equal to input?a) Voltage followerb) Voltage series feedback amplifierc) Voltage shunt feedback amplifierd) InverterView Answer

Answer: aExplanation: In the voltage follower the output follow the input due to unity gain. Therefore, it is attained to get higher input resistance and output amplitude equal to input.

11. Find the input and output voltage in voltage follower circuit?a) Vin=2v and Vout = 3vb) Vin=10v and Vout = 11v

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c) Vin=9v and Vout = 9vd) Vin=4v and Vout = 7vView Answer

Answer: cExplanation: Voltage follower has input voltage equal to output voltage. The closed loop voltage gain is equal to one. For example, take the input and output voltage to be 2v, then AF = Vout/Vin = 2v/2v = 1.

12. Voltage follower is also called asa) None of the mentionedb) Non-inverting amplifierc) Inverting amplifierd) Normal bufferView Answer

Answer: bExplanation: The voltage follower is also called as a non-inverting buffer because, when placed between two networks, it removes the loading on the first network.

13. Find the bandwidth and total output offset voltage of a voltage follower? The following are the specifications for the op-amp 741: A=200000, fo =5hz and supply voltage =±15v.

a) fF = 1000hz, VooT = ± 7.5µv.b) fF = 100khz, VooT = ± 7.5µv.c) fF = 10khz, VooT = ±7.5µv.d) fF = 1000khz, VooT = ± 7.5µv.View Answer

Answer: dExplanation: Bandwidth fF =A* fF = 200000*5= 1Mhz.Total output offset voltage, VooT= ±Vsat/A= ±15/200000 =± 7.5µv.

Which among the following circuit has the highest input resistance?a) Voltage followerb) Inverting amplifier

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c) Differential amplifierd) None of the mentionedView Answer

2. Find the bias current from the given circuit

a) 30mAb) 3mAc) 0.30mAd) 0.03mAView Answer

Answer: cExplanation: The bias current is given as Iin =Vin/Rin = 3v/10kΩ.Where, Iin= Ib =0.3mA.

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3. How to choose an op-amp when working with high input source resistance?a) Op-amp with low bias currentb) Op-amp with higher slew ratec) Buffer or voltage followerd) All of the mentionedView Answer

Answer: dExplanation: When the op-amp is driven by a high input source resistance, the output and input voltage will not be equal due to error at the input. A remedy to this problem is an op-amp with low input bias current and high slew rate should be chosen as a voltage follower.

4. What must be done to block the ac input voltage riding on a dc level?a) Use RC network

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b) Use coupling capacitorc) Use resistive transducerd) None of the mentionedView Answer

Answer: bExplanation: In order to block the dc level a coupling capacitor must be used in series with the input of the voltage follower.

5. To get higher input resistance in AC coupled voltage follower,a) The output resistance is bootstrappedb) The input resistance is bootstrappedc) The bias resistance is bootstrappedd) The feedback resistance is bootstrappedView Answer

Answer: cExplanation: Bias resistor connected to ground to provide path in an AC coupled voltage follower, drastically reduces the input resistance of the circuit. Therefore, to get high input resistance, the bias resistance is bootstrapped.

Which of the following functions does the antilog computation required to perform continuously with log-amps?a) In(x)b) log(x)c) Sinh(x)d) All of the mentionedView Answer

Answer: dExplanation: Log-amp can easily perform function such as In(x), Log(x), Sinh(x) to have direct dB display on digital voltmeter and spectrum analyser.

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2. Find the circuit that is used to compress the dynamic range of a signal?

View Answer

Answer: aExplanation: Log amps are used to compress the dynamic range of a signal. The fundamental log amp circuit consists of a grounded base transistor in the feedback path.

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3. Find the output voltage of the log-amplifiera) VO = -(kT)×ln(Vi/Vref)b) VO = -(kT/q)×ln(Vi/Vref)c) VO = -(kT/q)×ln(Vref/Vi)d) VO = (kT/q)×ln(Vi/Vref)View Answer

Answer: bExplanation: the output voltage is proportional to the logarithm of input voltage.VO =-(kT/q)×ln(Vi / Vref).

4. How to provide saturation current and temperature compensation in log-amp?a) Applying reference voltage alone to two different log-ampsb) Applying input and reference voltage to same log-ampsc) Applying input and reference voltage to separate log-ampsd) None of the mentionedView Answer

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Answer: cExplanation: The emitter saturation current varies from transistor to transistor with temperature. Therefore, the input and reference voltage are applied to separate log-amps and two transistors are integrated close together in the same silicon wafer. This provides a close match of the saturation currents and ensures good thermal tracking.

5. The input voltage, 6v and reference voltage, 4 v are applied to a log-amp with saturation current and temperature compensation. Find the output voltage of the log-amp?a) 6.314(kT/q)vb) 0.597(kT/q)vc) 0.405(kT/q)vd) 1.214(kT/q)vView Answer

Answer: cExplanation: The output voltage of saturation current and temperature compensation log-amp, VO = (kT/q)×ln(Vi / Vref) =(kT/q)×ln(6v/4v) =(kT/q)×ln(1.5)VO = 0.405(kT/q)v.

6. Find the circuit used for compensating dependency of temperature in the output voltage?

View Answer

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Answer: cExplanation: The temperature dependence on the output voltage is compensated by connecting an op-amp which provide a non-inverting gain of [1+ (R2/ RTC)] at the output of the log-amp with saturation current compensation.Now the output voltage becomes,VO = [1+ (R2/ RTC)]×[(kT/q)×ln(Vi / Vref)]Where, RTC –> temperature sensitive resistance with a positive co-efficient of temperature.

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7. Determine the output voltage for the given circuit

a) VO = Vref/(10-k’vi)

b) VO = Vref+(10-k’vi)

c) VO = Vref×(10-k’vi)

d) VO = Vref-(10-k’vi)

View Answer

Answer: cExplanation: The output voltage of an antilog amp is given as, VO = Vref (10-k’v

i)Where k’ = 0.4343 (q/kt)×[(RTC/ (R2 +RTC)].

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8. Calculate the base voltage of Q2 transistor in the log-amp using two op-amps?

a) 8.7vb) 5.3vc) 3.3vd) 6.2vView Answer

Answer: cExplanation: The base voltage of Q2 transistor, VB = [RTC / (R2 +RTC)]×(Vi) = [10kΩ/(5kΩ+10kΩ)]×5v =3.33v.

9. Compute the reference voltage for a fundamental log-amp, if it’s internal resistance=5MΩ.a) 0.5µvb) 0.05µvc) 5µvd) None of the mentionedView Answer

Answer: aExplanation: Reference voltage, Vref = R1 × Is

Where, Is~10-13A (for an emitter saturation current).∴ Vref = 10-13 × 5MΩ = 5×10-7 = 0.5µv.

This set of Linear Integrated Circuit Multiple Choice Questions & Answers (MCQs) focuses on “Very High Input Impedance Circuit”.

1. Which among the following circuit has the highest input resistance?a) Voltage follower

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b) Inverting amplifierc) Differential amplifierd) None of the mentionedView Answer

Answer: aExplanation: Voltage follower has the highest positive input resistance of any op-amp circuit. For this reason it is used to reduce voltage error caused by source loading.

2. Find the bias current from the given circuit

a) 30mAb) 3mAc) 0.30mAd) 0.03mAView Answer

Answer: cExplanation: The bias current is given as Iin =Vin/Rin = 3v/10kΩ.Where, Iin= Ib =0.3mA.

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3. How to choose an op-amp when working with high input source resistance?a) Op-amp with low bias currentb) Op-amp with higher slew ratec) Buffer or voltage followerd) All of the mentionedView Answer

Answer: dExplanation: When the op-amp is driven by a high input source resistance, the output and input

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voltage will not be equal due to error at the input. A remedy to this problem is an op-amp with low input bias current and high slew rate should be chosen as a voltage follower.

4. What must be done to block the ac input voltage riding on a dc level?a) Use RC networkb) Use coupling capacitorc) Use resistive transducerd) None of the mentionedView Answer

Answer: bExplanation: In order to block the dc level a coupling capacitor must be used in series with the input of the voltage follower.

5. To get higher input resistance in AC coupled voltage follower,a) The output resistance is bootstrappedb) The input resistance is bootstrappedc) The bias resistance is bootstrappedd) The feedback resistance is bootstrappedView Answer

Answer: cExplanation: Bias resistor connected to ground to provide path in an AC coupled voltage follower, drastically reduces the input resistance of the circuit. Therefore, to get high input resistance, the bias resistance is bootstrapped.

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6. Find out AC-coupled voltage follower?

View Answer

Answer: bExplanation: An AC coupled voltage follower consists of coupling capacitor at the input of non-inverting terminal.

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7. Voltage follower circuit are used ina) Active filterb) All of the mentionedc) Sample and hold circuitd) Bridge circuit with transducerView Answer

Answer: bExplanation: Voltage followers are useful for all the above mentioned applications, because they involve working with high-input source resistance.

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6. Find out AC-coupled voltage follower?

View Answer

Answer: bExplanation: An AC coupled voltage follower consists of coupling capacitor at the input of non-inverting terminal.

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7. Voltage follower circuit are used ina) Active filterb) All of the mentionedc) Sample and hold circuitd) Bridge circuit with transducerView Answer

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Answer: bExplanation: Voltage followers are useful for all the above mentioned applications, because they involve working with high-input source resistance.

Which type of amplifier has output voltage equal to the average of all input voltages?a) Inverting averaging amplifierb) Non-inverting averaging amplifierc) Non-inverting summing amplifierd) Inverting scaling amplifierView Answer

Answer: bExplanation: In non-inverting averaging amplifier, the non-inverting input voltage is the average of all inputs, with a positive sign.

2. Expression for output voltage of non-inverting summing amplifier with five input voltage?a) Vo = 5×( Va + Vb+ Vc+ Vd+ Ve)b) Vo = [1+( Rf/R1)]× ( Va + Vb+ Vc+ Vd+ Ve)c) Vo = Va + Vb+ Vc+ Vd+ Ve

d) Vo = ( Va + Vb+ Vc+ Vd+ Ve) /5View Answer

Answer: cExplanation: The output voltage of non-inverting summing amplifier is (1+ ( Rf / R1 )) times the average of all input voltages in the circuit.Since there are five input voltages => (1+ ( Rf / R1 )) =5Therefore, Vo = 5×( Va + Vb+ Vc+ Vd+ Ve) /5=> Vo = (Va + Vb+ Vc+ Vd+ Ve).

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3. Find the value of V1 in the circuit shown below?

a) None of the mentionedb) 2vc) 3vd) 4vView Answer

Answer: aExplanation : Using the superposition theorem the voltage V1 at non-inverting terminal is V1 = Va/4 + Vb/4+ Vc/4+ Vd/4 = [Va + Vb+ Vc+ Vd] /4 = [4+(-3v)+6v+(-1v) ] /4 = 1.5v.

4. If the gain of a non-inverting averaging amplifier is one, determine the input voltages if the output voltage, if the output voltage is 3v?a) V1 =6v ,V2=3v and V3=2vb) V1 =9v ,V2=5v and V3=-4vc) V1 =8v ,V2=-6v and V3=1vd) V1 =7v ,V2=4v and V3=-3vView Answer

5. In the circuit shown, supply voltage = ±15v, Va= +3v , Vb= -4v , Vc= +5v, R= R1= 1kΩ and RF= 2kΩ. 741 op-amp has A= 2×105 and R1= 10kΩ. Determine the output voltage internal resistance of the circuit?

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a) Vo ≅3v , RiF=6.67MΩb) Vo ≅3v , RiF= 7MΩc) Vo ≅3v , RiF=9.2MΩd) Vo ≅3v , RiF= 3.5MΩView Answer

Answer: aExplanation: The output voltage Vo= [1 + (RF/R1)] × [ (Va+Vb+Vc/3)] = [1+(2kΩ/1kΩ)] ×[(3-4+5)/3]= 2.67 ≅ 3v.Internal resistance of circuit, RiF =R i [A×R1/ (R1+ RF)] = 100Ω×[(200000×1kΩ)/(1kΩ+2kΩ)]=> RiF= 6.67 MΩ.

6. Find the type of amplifier that cannot be constructed in differential configuration?a) Summing amplifierb) Scaling amplifierc) Averaging amplifierd) SubtractorView Answer

Answer: cExplanation: In differential op-amp configuration, an amplifier produces sum or difference between two input terminals of op-amp. So, averaging is not possible in this type of configuration.

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7. Calculate the output voltage, when a voltage of 12mv is applied to the non-inverting terminal and 7mv is applied to inverting terminal of a subtractor.a) 19mvb) 5mvc) 1.7mvd) 8.4mvView Answer

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Answer: bExplanation: Output voltage of a subtractor Vo = Vnon-inverting terminal – Vinverting terminal = 12mv-7mv =5mv.

8. In differential op-amp configuration a subtractor is called asa) Summing amplifierb) All of the mentionedc) Scaling amplifierd) Difference amplifierView Answer

Answer: cExplanation: In a subtractor input signals can be scaled to the desired values by selecting appropriate values for the external resistors. Therefore, this circuit is referred to as scaling amplifier.

9. Find the differential amplifier configured as a subtractor from the given circuit.

View Answer

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10. How many additional sources are connected to each input terminal to obtain an eight input summing amplifier?a) Sixb) Threec) Fourd) EightView Answer

Answer: bExplanation: An eight input summing amplifier can be constructed using basic differential amplifier, if six additional input sources are used by connecting three input sources to inverting and non-inverting input terminal through resistors.

11. Calculate the output voltage for the summing amplifier given below, where R=2kΩ and RL =10kΩ.

a) 4vb) 18vc) 8vd) None of the mentionedView Answer

Answer: aExplanation: The output voltage for summing amplifier is given Vo =-Va -Vb +Vc +Vd =3-4+6+5 =4v.

12. The output voltage of a summing amplifier is equal to (assume sum of input voltage as Vn )a) Vn (non-inverting terminal)+ Vn (inverting terminal)b) Vn (non-inverting terminal)+ (-Vn (inverting terminal)c) -Vn (non-inverting terminal)+ (-Vn (inverting terminal)

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d) -Vn (non-inverting terminal)+ Vn (inverting terminal)View Answer

Answer: bExplanation: The output voltage of summing amplifier is equal to sum of the input voltage applied to the non-inverting terminal plus the negative sum of the input voltage applied to the inverting terminal.

1. In which amplifier the output voltage is equal to the negative sum of all the inputs?a) Averaging amplifierb) Summing amplifierc) Scaling amplifierd) All of the mentionedView Answer

Answer: bExplanation: In summing amplifier the output voltage is equal to the sum of all input. Since the total input is a sum of negative input, the amplifier is an inverting summing amplifier.

2. Determine the expression of output voltage for inverting summing amplifier consisting of four internal resistors? (Assume the value of internal resistors to be equal)a) Vo= -(Rf/R )×(Va +Vb+Vc+Vd)b) Vo= (RF/R)×(Va +Vb+Vc+Vd)c) Vo= (R/ RF)×(Va +Vb+Vc+Vd)d) None of the mentionedView Answer

Answer: aExplanation: If the internal resistors of the circuit is same i.e Ra=Rb=Rc=Rd=R (since there are four internal resistor)Then, the output voltage for inverting amplifier is given as Vo= -(Rf/R)×(Va +Vb+Vc+Vd).

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3. An inverting amplifier with gain 1 have different input voltage: 1.2v,3.2v and 4.2v. Find the output voltage?a) 4.2vb) 8.6vc) -4.2vd) -8.6vView Answer

Answer: dExplanation: When the gain of the inverting summing amplifier gain is 1 then, the internal resistors and feedback resistors have the same value. So, the output is equal to the negative sum of all input voltages.VO= -(Va+Vb+Vc) =-(1.2+3.2+4.2)= -8.6v.

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4. In which type of amplifier, the input voltage is amplified by a scaling factora) Summing amplifierb) Averaging amplifierc) Weighted amplifierd) Differential amplifierView Answer

Answer: cExplanation: The weighted amplifier is also called as scaling amplifier. Here each input voltage is amplified by a different factor i.e. Ra,Rb and Rc are different in values ( which are the input resistors at each input voltage).

5. An inverting scaling amplifier has three input voltages Va, Vb and Vc. Find it output voltage?a) VO= – {[(RF/Ra)×Va] +[(RF/Rb)×Vb]+[(RF/Rc)×Vc]}b) VO= – [(RF/Ra)+(RF/Rb)+(RF/Rc)]×[( Va +Vb+Vc)]c) VO = – {[(Ra/RF)×Va] +[(Rb/RF)×Vb]+[(Rc/RF)×Vc]}d) None of the mentionedView Answer

Answer: aExplanation: Since three input voltages are given assume the input resistors to be Ra,Rb and Rc. In a scaling amplifier, the input voltages are amplified by a different factor=> ∴ RF/Ra ≠ RF/Rb ≠ RF/Rc

Therefore, output voltage Vo = -{[(RF/Ra) Va] +[(RF/Rb) Vb]+[(RF/Rc) Vc]}.

6. An amplifier in which the output voltage is equal to average of input voltage?a) Summing amplifierb) Weighting amplifierc) Scaling amplifierd) Averaging amplifierView Answer

Answer: dExplanation: An averaging amplifier can be used as an averaging circuit, in which the output voltage is equal to the average of all the input voltages.

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7. Find out the gain value by which each input of the averaging amplifier is amplified ?( Assume there are four inputs)a) 0.5b) 0.25c) 1d) 2View Answer

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Answer: bExplanation: In an averaging amplifier, the gain by which each input is amplified must be equal to lower number of input.=> RF /R =1/n , where n=number of inputs∴ RF /R=1/4 = 0.25 (Four inputs)So, each input in the averaging amplifier must be amplified by 0.25.

8. 3v, 5v and 7v are the three input voltage applied to the inverting input terminal of averaging amplifier. Determine the output voltage?a) -5vb) -10vc) -15vd) -20vView Answer

Answer: aExplanation: The output voltage, Vo = -[(Va+Vb+Vc)/3] = -[(3+5+7)/3] =-5v.

9. When does the offset voltage compensating network must be used in inverting configuration?a) When the input is AC voltageb) When the input is DC voltagec) When the input is either AC or DC voltaged) None of the mentionedView Answer

Answer: bExplanation: To reduce the output offset voltage to zero, the offset minimizing resistor is used to minimize the effect of input bias currents on the output offset voltage. However, when the inputs are DC voltages, the offset compensating network must be used.

10. State the application in which summing, scaling or averaging amplifiers are used?a) Multiplexersb) Countersc) Audio mixersd) All of the mentionedView Answer

Answer: cExplanation: Summing, scaling or averaging amplifiers are commonly used in audio mixers, in which a number of inputs are added up to produce a desired output.

11. The following circuit represents an inverting scaling amplifier. Compute the value of RoM and VO?

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a) VO = -0.985v ; RoM = 111.11Ωb) VO = -2.567v ; RoM = 447.89Ωc) VO = -1.569v ; RoM = 212.33Ωd) VO = -1.036v ; RoM = 320.56ΩView Answer

Answer: dExplanation: VO = – {[(RF/Ra)×Va]+[(RF/Rb)×Vb]+[(RF/Rc)×Vc]}= – {[(10kΩ/1kΩ)×3.3mv]+[(10kΩ/1.25kΩ)×5mv]+[(10kΩ/820Ω)×7.9mv]} = -1.036v.RoM = [Ra||Rbc||RF]= [(Ra×Rb)/(Ra+ Rb)] || [(Rc×RF)/( Rc+ RF)] =[(1kΩ×1.25kΩ)/(1kΩ+1.25kΩ)] || [(820Ω×10kΩ)/(820Ω+10kΩ)] = 555.55||757.85 =[(555.55 ×757.85)/(555.55+757.85)] =320.56Ω.

1. A Differential Amplifier should have collector resistor’s value (RC1 & RC2) asa) 5kΩ, 5kΩb) 5Ω, 10kΩc) 5Ω, 5kΩd) 5kΩ, 10kΩView Answer

Answer: aExplanation: The values of collector current will be equal in differential amplifier (RC1=RC2).

2. A Differential Amplifier amplifiesa) Input signal with higher voltageb) Input voltage with smaller voltagec) Sum of the input voltaged) None of the MentionedView Answer

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Answer: dExplanation: The purpose of differential amplifier is to amplify the difference between two signals.

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3. The value of emitter resistance in Emitter Biased circuit are RE1=25kΩ & RE2=16kΩ. Find REa) 9.756kΩb) 41kΩc) 9.723kΩd) 10kΩView Answer

Answer: aExplanation: In emitter biased circuit, RE1 & RE2 is connected in parallel combination.⇒ RE = RE1 II RE2 = (RE1× RE2)/(RE1+RE2) = (25kΩ×16kΩ)/(25kΩ+16kΩ) = 9.7561kΩ.

4. If output is measured between two collectors of transistors, then the Differential amplifier with two input signal is said to be configured asa) Dual Input Balanced Outputb) Dual Input Unbalanced Outputc) Single Input Balanced Outputd) Dual Input Unbalanced OutputView Answer

Answer: aExplanation: When two input signals are applied to base of transistor, it is said to be Dual Input. When both collectors are at same DC potential with respect to ground, then it is said to be Balance Output.

5. A differential amplifier is capable of amplifyinga) DC input signal onlyb) AC input signal onlyc) AC & DC input signald) None of the MentionedView Answer

Answer: cExplanation: Direct connection between stages removes the lower cut off frequency imposed by coupling capacitor; therefore it can amplify both AC and DC signal.

6. In ideal Differential Amplifier, if same signal is given to both inputs, then output will bea) Same as inputb) Double the inputc) Not equal to zero

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d) ZeroView Answer

Answer: dExplanation: In ideal amplifier, Output voltage⇒ Vout = Vin1-Vin2.

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7. Find the Single Input Unbalance Output configuration in following circuit diagrams :

a)

b)

c)

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d) View Answer

Answer: cExplanation: Circuit c has only single input (V1) and output is measure only at one of the collector with respect to ground.

8. An emitter bias Dual Input Balanced Output differential amplifier has VCC=20v, β=100, VBE=0.7v, RE=1.3kΩ. Find IEa) 7.42mAb) 9.8mAc) 10mAd) 8.6mAView Answer

9. Find IC, given VCE=0.77v, VCC=10v, VBE=0.37v and RC=2.4kΩ in Dual Input Balanced Output differential amplifiera) 0.4mAb) 0.4Ac) 4mAd) 4AView Answer

Answer: cExplanation: Substitute the values in collector to emitter voltage equation,VCE= VCC+ VBE-RC IC⇒IC = (VCC-VCE+VBE)/RC = (10v-0.77v+0.37v)/2.4kΩ = 4mA

10. Find the correct match

Configuration Voltage gain and Input resistance1. Single Input Unbalanced Output i. Ad = Rc/re , Ri1 Ri2 = 2βacRE2. Dual Input Balanced Output ii. Ad= Rc/2re , Ri1 Ri2 = 2βacRE

3. Single Input Balanced Output iii. Ad= Rc/re , Ri = 2βacRE4. Dual Input Unbalanced Output iv. Ad = Rc/2re , Ri = 2βacRE

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a) 1-i , 2-iii, 3-iv, 4-iib) 1-iv, 2-ii, 3-iii, 4-ic) 1-ii, 2-iv, 3-i , 4-iiid) 1-iii, 2-i, 3-ii, 4-ivView Answer

Answer: dExplanation: Properties of differential amplifier circuit configuration.

11. Obtain the collector voltage, for collector resistor (RC) =5.6kΩ, IE=1.664mA and VCC=10v for single input unbalanced output differential amplifiera) 0.987vb) 0.682vc) 0.555vd) None of the mentionedView Answer

12. For the circuit shown below, determine the Output voltage (Assume β=5, differential input resistance=12 kΩ)

a) 4.33vb) 2.33vc) 3.33vd) 1.33vView Answer

Answer: cExplanation: From the circuit dig, RC=10kΩ, Vin1= 1.3v and Vin2=0.5v,Differential input resistance = 2 βre,⇒ 12kΩ = 2×5×Re⇒ Re = 1.2 kΩOutput voltage Vo = RC/2Re(Vin1-Vin2)⇒ Vo = 10kΩ/(2 ×1.2kΩ) × (1.3v-0.5v)⇒ Vo = 3.33v.

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13. In a Single Input Balanced Output Differential amplifier, given VCC=15v, RE = 3.9kΩ, VCE=2.4 v and re=250Ω. Determine Voltage gaina) 26b) 56c) 38d) 61View Answer

Answer: aExplanation: In single Input Balance Output amplifier,⇒ IE = (VEE-VBE)/2RE=(15v-0.7v)/(2×3.9kom)= 1.83mA (∵VCC=VEE)From the equation, VCE = VCC +VBE-RC×IC⇒ RC = (14.3v – 2.4v)/1.83mA = 6.5kΩThe voltage gain, Vo⇒ Vo = RC/re= 6.5kΩ/250Ω = 26(no units).

1. Open loop op-amp configuration hasa) Direct network between output and input terminalsb) No connection between output and feedback networkc) No connection between input and feedback networkd) All of the mentionedView Answer

Answer: aExplanation: In an open loop configuration, the output signal is not fed back in any form as part of the input signal and the loop that would have been formed with feedback is open.

2. In which configuration does the op-amp function as a high gain amplifier?a) Differential amplifierb) Inverting amplifierc) Non-inverting amplifierd) All of the mentionedView Answer

Answer: dExplanation: An op-amp functions as a high gain amplifier when connected in open loop configuration. These three are the open loop configuration of an op-amp.

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3. How does the open loop op-amp configuration classified?a) Based on the output obtainedb) Based on the input appliedc) Based on the amplification

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d) Based on the feedback networkView Answer

Answer: bExplanation: Open loop configurations are classified according to the number of inputs used and the terminal to which the input is applied when a single input is used.

4. What will be the voltage drop across the source resistance of differential amplifier when connected in open loop configuration?a) Zerob) Infinityc) Oned) Greater than oneView Answer

Answer: aExplanation: The source resistances are normally negligible compared to the input resistance. Therefore, the voltage drop across input resistors can be assumed to be zero.

5. The output voltage of an open-loop differential amplifier is equal toa) Double the difference between the two input voltagesb) Product of voltage gain and individual input voltagesc) Product of voltage gain and the difference between the two input voltagesd) Double the voltage gain and the difference between two input voltagesView Answer

Answer: cExplanation: The output voltage is equal to the voltage gain times the difference between the two input voltages.

6. Calculate the output voltage for the given circuit.

a) Vo = 7v

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b) Vo = 5.9vc) Vo = 12vd) Vo = 11.4vView Answer

Answer: cExplanation: The output voltage, Vo = A*(Vin1-Vin2).(Since, Rin1 and Rin2 are negligible compared to input resistance in open loop differential amplifier).=> Vo = 4*(12v-9v) = 12v.

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7. Select the specifications that implies the inverting amplifier?a) V1 = -3v, V2 = -4vb) V1 = -2v, V2 = 3vc) V1 = 5v, V 2 = 15vd) V1 = 0v, V2 = 5vView Answer

Answer: dExplanation: In inverting amplifier, the input is applied to the inverting terminal and the non-inverting terminal is grounded. So,the input applied to inverting amplifier can be V1 = 0v, V2 = 5v.

8. Find the output of inverting amplifier?a) Vo = AVin

b) Vo = -AVin

c) Vo = -A(Vin1– Vin2)d) None of the mentionedView Answer

Answer: bExplanation: In an inverting amplifier the input signal is amplified by gain A and is also inverted at the output. The negative sign indicates that the output voltage is of opposite polarity.

9. Determine the output voltage for the non-inverting amplifier input voltage 37µVpp sinewave. Assume that the output is a 741.a) -7.44 Vpp sinewaveb) 74 Vpp sinewavec) 7.4Vpp sinewaved) 0.7 Vpp sinewaveView Answer

Answer: cExplanation: The output voltage for non-inverting amplifier Vo = A*Vin = 200000 * 37µ = 7.4 Vpp sinewave.

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10. Find the non-inverting amplifier configuration from the given circuit diagram?

View Answer

Answer: cExplanation: In a non-inverting amplifier, the input is applied to the non-inverting input terminal and the inverting terminal is connected to ground.

11. What happen if any positive input signal is applied to open-loop configuration?a) Output reaches saturation levelb) Output voltage swing’s peak to peakc) Output will be a sine waveformd) Output will be a non-sinusoidal waveformView Answer

Answer: aExplanation: In open-loop configuration, due to very high gain of the op-amp, any input signal slightly greater than zero drives the output to saturation level.

12. Why open-loop op-amp configurations are not used in linear applications?a) Output reaches positive saturationb) Output reaches negative saturationc) Output switches between positive and negative saturation

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d) Output reaches both positive and negative saturation.View Answer

Answer: cExplanation: When operated in open loop, the output switches between positive and negative saturation levels. For this reason, open loop op-amp configurations are not used in linear applications.

Which of the following functions does the antilog computation required to perform continuously with log-amps?a) In(x)b) log(x)c) Sinh(x)d) All of the mentionedView Answer

Answer: dExplanation: Log-amp can easily perform function such as In(x), Log(x), Sinh(x) to have direct dB display on digital voltmeter and spectrum analyser.

2. Find the circuit that is used to compress the dynamic range of a signal?

View Answer

Answer: aExplanation: Log amps are used to compress the dynamic range of a signal. The fundamental log amp circuit consists of a grounded base transistor in the feedback path.

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3. Find the output voltage of the log-amplifiera) VO = -(kT)×ln(Vi/Vref)b) VO = -(kT/q)×ln(Vi/Vref)c) VO = -(kT/q)×ln(Vref/Vi)d) VO = (kT/q)×ln(Vi/Vref)View Answer

Answer: bExplanation: the output voltage is proportional to the logarithm of input voltage.VO =-(kT/q)×ln(Vi / Vref).

4. How to provide saturation current and temperature compensation in log-amp?a) Applying reference voltage alone to two different log-ampsb) Applying input and reference voltage to same log-ampsc) Applying input and reference voltage to separate log-ampsd) None of the mentionedView Answer

Answer: cExplanation: The emitter saturation current varies from transistor to transistor with temperature. Therefore, the input and reference voltage are applied to separate log-amps and two transistors are integrated close together in the same silicon wafer. This provides a close match of the saturation currents and ensures good thermal tracking.

5. The input voltage, 6v and reference voltage, 4 v are applied to a log-amp with saturation current and temperature compensation. Find the output voltage of the log-amp?a) 6.314(kT/q)vb) 0.597(kT/q)vc) 0.405(kT/q)vd) 1.214(kT/q)vView Answer

Answer: cExplanation: The output voltage of saturation current and temperature compensation log-amp, VO = (kT/q)×ln(Vi / Vref) =(kT/q)×ln(6v/4v) =(kT/q)×ln(1.5)VO = 0.405(kT/q)v.

The center frequency of a band-pass filter is always equal to theA.

bandwidth

B.–3 dB frequencyC.bandwidth divided by QD.

geometric average of the critical frequencies

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Answer & Explanation

Answer: Option D

Explanation:

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2. 

The formula shows that for a given capacitor, if the voltage changes at a constant rate with respect to time, the current willA.increaseB.decreaseC.be constantD.decrease logarithmicallyAnswer & Explanation

Answer: Option C

Explanation:

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3. A zero-level detector is aA.comparator with a sine-wave outputB.comparator with a trip point referenced to zeroC.peak detectorD.limiterAnswer & Explanation

Answer: Option B

Explanation:

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4. A digital-to-analog converter is an application of theA.scaling adderB.voltage-to-current converter

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C.noninverting amplifierD.adjustable bandwidth circuitAnswer & Explanation

Answer: Option A

Explanation:

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5. If the value of resistor Rf in an averaging amplifier circuit is equal to the value of one input resistor divided by the number of inputs, the output will be equal toA.the average of the individual inputsB.the inverted sum of the individual inputsC.the sum of the individual inputsD.the inverted average of the individual inputsAnswer & Explanation

Answer: Option DIf the input to a comparator is a sine wave, the output is aA.

ramp voltage

B.sine waveC.rectangular waveD.

sawtooth wave

Answer & Explanation

Answer: Option C

Explanation:

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7. A basic series regulator hasA.an error detectorB.a loadC.a reference voltageD.both an error detector and a reference voltageAnswer & Explanation

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Answer: Option D

Explanation:

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8. A comparator is an example of a(n)A.active filterB.current sourceC.linear circuitD.nonlinear circuitAnswer & Explanation

Answer: Option D

Explanation:

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9. Initially, the closed-loop gain (Acl) of a Wien-bridge oscillator should beA.Acl < 3B.Acl > 3C.0D.Acl 1Answer & Explanation

Answer: Option B

Explanation:

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10. In an averaging amplifier, the input resistances areA.

equal to the feedback resistance

B.less than the feedback resistanceC.greater than the feedback resistanceD.

unequal

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Answer & Explanation

Answer: Option CA triangular-wave oscillator can consist of an op-amp comparator, followed by a(n)A.

differentiator B.amplifier

C.integrator D.multivibratorAnswer & Explanation

Answer: Option C

Explanation:

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12. The ramp voltage at the output of an op-amp integratorA.

increases or decreases at a linear rate

B.increases or decreases exponentiallyC.is always increasing and never decreasingD.

is constant

Answer & Explanation

Answer: Option A

Explanation:

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13. A two-pole high-pass active filter would have a roll-off rate ofA.

40 dB/decade

B.–40 dB/decadeC.20 dB/decadeD.

–20 dB/decade

Answer & Explanation

Answer: Option B

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Which is not the internal circuit of operational amplifier?a) Differential amplifierb) Level translatorc) Output driverd) ClamperView Answer

Answer: dExplanation: Clamper is an external circuit connected at the output of Operational amplifier, which clamp the output to desire DC level.

2. The purpose of level shifter in Op-amp internal circuit is toa) Adjust DC voltageb) Increase impedancec) Provide high gaind) Decrease input resistanceView Answer

Answer: aExplanation: The gain stages in Op-amp are direct coupled. So, level shifter is used for adjustment of DC level.

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3. How a symmetrical swing is obtained at the output of Op-ampa) Providing amplifier with negative supply voltageb) Providing amplifier with positive voltagec) Providing amplifier with positive& negative voltaged) None of the mentionedView Answer

Answer: cExplanation: For example, consider a single voltage supply +15v. During positive half cycle the output will be +5v and -10v during negative half cycle.Therefore, the maximum peak to peak output swing, -5v (-10v) = -15v (Asymmetrical swing).So, to get symmetrical swing both positive and negative supply voltage with bias point fixed suitably is required.

4. What is the purpose of differential amplifier stage in internal circuit of Op-amp?a) Low gain to differential mode signalb) Cancel difference mode signalc) Low gain to common mode signald) Cancel common mode signalView Answer

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Answer: dExplanation: Any undesired noise, common to both of the input terminal is suppressed by differential amplifier.

5. Which of the following is not preferred for input stage of Op-amp?a) Dual Input Balanced Outputb) Differential Input Single ended Outputc) Cascaded DC amplifierd) Single Input Differential OutputView Answer

Answer: cExplanation: Cascaded DC amplifier suffers from major problem of drift of the operating point, due to temperature dependency of the transistor.

6. What will be the emitter current in a differential amplifier, where both the transistor are biased and matched? (Assume current to be IQ)a) IE = IQ/2b) IE = IQ

c) IE = (IQ)2/2d) IE = (IQ)2

View Answer

Answer: aExplanation: Due to symmetry of differential amplifier circuit, current IQ divides equally through both transistors.

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7. From the circuit, determine the output voltage (Assume αF=1)

a) VO1=3.9v , VO2=12vb) VO1=12v , VO2=3.9vc) VO1=12v , VO2=0v

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d) VO1=3.9v , VO2=-3.9vView Answer

Answer: bExplanation: The voltage at the common emitter ‘E’ will be -0.7v, which make Q1 off and the entire current will flow through Q2.⇒ VO1 = VCC VO2= VCC-αF×IQ×RC,⇒ VO1 = 12v , VO2=12v-1×3mA×2.7k = 3.9v.

8. At what condition differential amplifier function as a switcha) 4VT < Vd < -4VT

b) -2VT ≤ Vd ≤ 2VT

c) 0 ≤ Vd < -4VT

d) 0 ≤ Vd ≤ 2VT

View Answer

Answer: aExplanation: For Vd > 4VT, the output voltage are VO1 = VCC, VO2= VCC-αF IQRC. Therefore, a transistor Q1 will be ON and Q2 will be OFF. Similarly for Vd> -4VT, both transistors Q2 & Q1 will be ON.

9. For Vd > ±4VT, the function of differential amplifier will bea) Switchb) Limiterc) Automatic gain controld) Linear AmplifierView Answer

Answer: bExplanation: At this condition, input voltage of the amplifier is greater than ±100mv and thus acts as a limiter.

10. Change in value of common mode input signal in differential pair amplifier makea) Change in voltage across collectorb) Slight change in collector voltagec) Collector voltage decreases to zerod) None of the mentionedView Answer

Answer: aExplanation: In differential amplifier due to symmetry, both transistors are biased and matched. Therefore, Voltage at each collector will be same.

11. Find collector current IC2, given input voltages are V1=2.078v & V2=2.06v and total current IQ=2.4mA. (Assume α=1)

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a) 0.8mAb) 1.6mAc) 0.08mAd) 0.16mAView Answer

Answer: aExplanation: Collector current, IC2=αF×IQ/(1+eV

d⁄V

T),VT = Volts equivalent of temperature = 25mv,⇒ Vd = V1-V2 =2.078v-2.06v=0.018v (equ1)Substituting equation 1,⇒ Vd/VT = 0.018v/25mv = 0.72v (equ2)Substituting equation 2,⇒ IC2= 1×2.4mA/(1+e0.72) = 2.4mA/(1+2.05) = 0.8mA.

12. A differential amplifier has a transistor with β0= 100, is biased at ICQ = 0.48mA. Determine the value of CMRR and ACM, if RE =7.89kΩ and RC = 5kΩ.a) 49.54 dbb) 49.65 dc) 49.77 dbd) 49.60 dbView Answer

Answer: bExplanation: Differential mode gain, ADM= -gmRC and Common mode gain,⇒ ACM= -(gmRC)/(1+2gmRE)(for β0≫1).Substituting the values,⇒ gm= ICQ/VT = 0.48mA/25mv=19.2×10-3Ω-1⇒ ADM= -gm×RC= -19.2×10-3Ω-1×5kΩ= -96⇒ ACM= -(gmRC)/(1+2gmRE)= -(19.2×10-3Ω-1×5kΩ) /(1+2×-⇒ 19.2×10-3Ω-1×7.89kΩ) = -0.3158CMRR = -96/-0.3158= 303.976

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=20log303.976=49.65db

Choose the compensating network design for non-inverting amplitude

View Answer

Answer: aExplanation: If an op-amp is used as an non-inverting amplifier, the compensating network should be connected to the inverting input terminal of the op-amp.

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2. Find the thevenin’s equivalent for resistance and voltage?

a) 1-iii, 2-ii, 3-1b) 1-ii, 2-I, 3-iiic) 1-I, 2-ii, 3-iiid) 1-ii, 2-iii, 3-iView Answer

Answer: bExplanation: The maximum thevenin equivalent resistance Rmax occurs when the wiper is at the center of the potentiometer and the maximum thevenin equivalent voltage Vmax is equal to +Vcc or –Vee, when wiper is uppermost or lowest in the potentiometer.

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3. What is done to compensate the voltage, when V1 > V2?

a) Move the wiper towards +Vccb) Move the wiper towards –Veec) Keep the wiper at the center of potentiometerd) None of the mentionedView Answer

Answer: aExplanation: V1 > V2 implies that output offset voltage is positive. This means that V2 should be increased until it is equal to V1. The wiper can be moved towards +Vcc until output offset voltage is reduced to zero.

4. Calculate the maximum thevenin equivalent resistance, if a 10kΩ potentiometer is used?a) 0.4kΩb) 5 kΩc) 2.5kΩd) 4kΩView Answer

Answer: cExplanation: Rmax= Ra/2 || Ra/2 = Ra/4.Given potentiometer, Ra = 10kΩ=> Therefore, Rmax = 10kΩ/4 =2.5kΩ.

5. Find the input offset voltage for the circuit shown

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a) Vio = (Rb*Vmax)/( Rmax+ Rb+ Rc)b) Vio = Rmax/( Rmax+ Rb+ Rc)c) Vio = (Rc*Vmax)/( Rmax+ Rb+ Rc)d) Vio = Vmax/( Rmax+ Rb+ Rc)View Answer

Answer: cExplanation: compensating network using maximum thevenin’s equivalent for resistance and voltage circuit is shown. Since |V1-V2|- Vio, the maximum value of V2 can be equal to Vio.

6. Find the value of Ra and Rb from the circuit shown?

a) Ra =4.6kΩ ; Rb= 9kΩb) Ra =7.3kΩ ; Rb= 3.4kΩc) Ra =2.5kΩ ; Rb= 5.1kΩd) Ra =4kΩ ; Rb= 10kΩView Answer

Answer: dExplanation: We know that input offset voltage, Vio =(Rc*Vmax)/ Rb

=> Rb = Vmax*(Rc / Rb ) = (10v/10mv)*10Ω (∵ Vio specified on the datasheet is 10mv for LM307 op-amp).=> Rb =10000 = 10kΩ.Since Rb > Rmax let us choose Rb = 10*Rmax. (Where Rmax = Ra/4).∴ Rb = (10*Rb)/4 and Ra = Rb/2.5 = 10kΩ/2.5=4kΩ.

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7. Why does an op-amp without feedback is not used in linear circuit application?a) Due to high current gainb) Due to high voltage gainc) Due to high output signald) All of the mentionedView Answer

Answer: bExplanation: In an op-amp without feedback, the voltage gain is extremely high (ideally infinite).

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Because of the high risk of distortion and clipping of the output signal, an op-amp in open loop configuration is not used in linear circuit application.

8. When the input voltage is reduced to zero in a closed loop configuration the circuit acts asa) Inverting amplifierb) Non-inverting amplifierc) Inverting and non-inverting amplifierd) None of the mentionedView Answer

Answer: cExplanation: Since, the input signal voltage is reduced to zero, the internal resistance is negligibly small. The output offset voltage is expressed in terms of external resistance and the specified input offset voltage for a given op-amp.If the non-inverting input terminal is connected to ground, it acts as inverting op-amp and vice versa.

9. How the value of output offset voltage is reduced in closed loop op-amp?a) By increasing gainb) By reducing gainc) By decreasing bandwidthd) By reducing bandwidthView Answer

Answer: bExplanation: The output offset voltage is a product of gain and specified input offset voltage for a given op-amp. Voo= Aoo*Vio. So, the value of output offset voltage can be reduced by reducing the gain value.

Input bias current is defined asa) Average of two input bias currentb) Summing of two input bias currentc) Difference of two input bias currentd) Product of two input bias currentView Answer

Answer: aExplanation: Input bias current is the average of two input bias current flowing into the non-inverting and inverting input of an op-amp.

2. Although the value of input bias current is very small, it causesa) Output voltageb) Input offset voltagec) Output offset voltaged) All of the mentionedView Answer

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Answer: cExplanation: Even a very small value of input bias current can cause a significant output offset voltage in circuits using relatively large feedback resistors.

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3. The formula for output offset voltage of an op-amp due to input bias currenta) VOIB= RF*IB

b) VOIB= (RF+R1)/IB

c) VOIB= (1+RF)*IB

d) VOIB= [1+(RF/R1)]*IB

View Answer

Answer: aExplanation: The output offset voltage due to input bias current is VOIB = RF*IB.4. Find the input bias current for the circuit given below

a) 10mAb) 2mAc) 5mAd) None of the mentionedView Answer

Answer: cExplanation: Input bias current, IB=(IB1+ IB2)/2=> IB =(4mA+6mA)/2 = 5mA.

5. Mention a step to reduce the output offset voltage caused due to input bias current?a) Use small feedback resistor and resistance at the input terminalb) Use small feedback resistorsc) Reduce the value of load resistorsd) None of the mentionedView Answer

6. Given below is a differential amplifier in which V1=V2. What happens to VOIB at this condition?

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a) VOIB= 0b) VOIB= VOIB×10-10

c) VOIB= VOIB/2d) VOIB= -1View Answer

Answer: aExplanation: The voltage V1 and V2 are caused by the current IB1 and IB2. Although this bias current are very small, if they are made equal, then there will be no output voltage VOIB.

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7. Name the resistor that is connected in the non-inverting terminal of op-amp which is in parallel combination of resistor connected in inverting terminal and feedback resistor.a) Random minimizing resistorb) Offset minimizing resistorc) Offset reducing resistorsd) Output minimizing resistorsView Answer

Answer: bExplanation: The voltage is product of resistors and input bias current. Therefore, the value of the resistors are adjusted such that the resistors are connected at the inverting input terminal is made equal to resistor connected in non-inverting input terminal. The use of this resistors minimize the amount of output offset voltage and therefore, they are referred to as offset minimizing resistors.

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8. Calculate ROM, if the value of IB1 = IB2 in the given circuit.

a) 1173.11Ωb) 171.31Ωc) 1171.43Ωd) 1071.43ΩView Answer

Answer: dExplanation: Offset minimizing resistor, ROM =(R1* RF)/( R1+RF).=> ROM = (1.2kΩ*10kΩ)/(1.2kΩ+10Ω) = 1071.43Ω.

9. Calculate the output voltage for the given circuit using the specification: R1 = 820Ω; ROM=811.882Ω; Vin=10mVpp; VOIB≅0.

a) 1.025Vppb) 1.8Vppc) 1Vppd) 2VppView Answer

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Answer: cExplanation: Offset minimizing resistor, ROM = (R1*RF)/(R1+ RF)=> RF = (ROM* R1)/( R1- ROM) = (812Ω*811.882Ω)/(820Ω-811.882Ω) = 82kΩ.∴ Vo = -(RF/ R1)* Vin = -(82kΩ/820Ω)*10mVpp = 1Vpp.

10. Analyse the given circuit and determine the correct option

a) Voo ≥ VIOB

b) Voo = VIOB

c) Voo >> VIOB

d) Voo << VIOB

View Answer

Answer: cExplanation: 741op-amp has Vio = 6mvdc and IB =500nA.The output offset voltage due to input offset voltage is given as Voo =[1+(RF/R1)]*Vio = [1+(4.7kΩ/47Ω)]*6mv = 0.606v.The output offset voltage due to input bias current is given as VIOB = RF*IB =4.7kΩ*500nA = 2.35mv.=>∴ Voo >> VIOB.

11. The specification for LM101A op-amp is given as IB =75nA. Determine the value of VIOB- V1.

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a) 0.112vb) 0.750vc) 0.374vd) 0.634vView Answer

Answer: aExplanation: The voltage at non-inverting terminal is given as V1 = ROM*IB1 = 148Ω*7.5nA = 1.11µv.=> ∵ ROM = (R1*RF)/(R1+ RF) = (15kΩ*150Ω)/(15kΩ+150Ω) =148ΩThe output offset voltage is given as VIOB = RF*IB

=> VIOB = 15kΩ*7.5nA = 112.5mv=> ∴ VIOB- V1 = 0.112v.

The maximum amount by which the two input bias current may differ is known asa) Input null currentb) Average input bias currentc) Input offset currentd) None of the mentionedView Answer

2. A 741 type op-amp has a maximum input offset current of 200nA dc. What conclusion can be derived from this statement?{ IB1 – Input bias current at inverting input terminal and IB2 – Input bias current at non-inverting input terminal}a) IB1 may be larger than IB2 by 200nAb) IB2 may be larger than IB1 by 200nAc) Iio and IB2 may be equal to 200nAd) All of the mentionedView Answer

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Answer: dExplanation: In a 741 op-amp, Iio = 200nA dc, which means that the maximum difference between IB1 and IB2 can be as large as 200nA.

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3. The maximum magnitude of the output offset voltage isa) VOIio = RF*Iio

b) VOIio = RF*( IB1+IB2)c) VOIio = RF*IB1

d) VOIio = RF*( IB1-IB2)View Answer

Answer: aExplanation: The output offset voltage due to input offset current is given as VOIio = RF*Iio.

4. Find the output offset voltage of an 741 op-amp; If the gain of the non-inverting amplifier is 8.5 and feedback resistor = 15kΩ? (IB=200nA for 741 op-amp)a) 1µvb) 4 µvc) 3 µvd) 2 µvView Answer

Answer: cExplanation: The circuit diagram of inverting amplifier is given below

Gain, A=1+(RF/R1)=> R1 = RF/(A-1) = 15kΩ/(8.5-1) = 2kΩ.=> ROM =(R1* RF)/( R1+RF) = 1.76kΩ.The output offset voltage, VOIB1= VOIB= RF*IB

=> VOIB1= 1.76kΩ*200nA*8.5 = 2.9×10-6 ≅ 3 µv.

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5. Find out the input offset current from the circuit

a) Iio = |IBA*IBC|b) Iio = |IBA+ IBC|c) Iio = |IBA/ IBC|d) Iio = |IBA- IBC|View Answer

Answer: dExplanation: the input offset current is Iio = |IBA- IBC|.

6. Determine the maximum output offset voltage caused by input offset current

a) 5.4mvb) 7.3mvc) 6.9mvd) 8.1mvView Answer

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Answer: aExplanation: For a 741 op-amp, Iio = 200nA(Maximum).=> Therefore, VOIio = RF*Iio = 27kΩ*200nA =5.4mv.

Which factor affect the input offset voltage, bias current and input offset current in an op-ampa) Change in temperatureb) Change in supply voltagec) Change in timed) All of the mentionedView Answer

Answer: dExplanation: Any change in the mentioned parameters affect the values of input offset voltage, bias current and input offset current from remaining constant.

2. Thermal voltage drift is defined asa) △Vio/△Tb) △VF/△Tc) △Iio/△Td) △IB/△TView Answer

Answer: aExplanation: The average rate of change of input offset voltage per unit change in temperature is called thermal voltage drift, i.e. △Vio/△T.

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3. A completely compensated inverting amplifier is nulled at room temperature 25oC, determine the temperature at which the total output offset voltage will be zero?a) 50oCb) 25oCc) 75oCd) 125oCView Answer

Answer: bExplanation: When amplifier is nulled at room temperature, the effect of input offset voltage and current is reduced to zero. Change in the total output offset voltage occurs only, if there is any change in the value of Vio and Iio. Therefore, the total output offset voltage will be zero at room temperature.

4. How the effect of voltage and current drift on the performance of an amplifier is determined?a) △VooT/△T = {[1-RF/R1)]×(△Vio/△T)} + RF×(△Iio/△t)b) △VooT/△T = {(-RF/R1)×(△Vio/△T)} + RF×(△Iio/△t)c) △VooT/△T = {[1+(RF/R1)]×(△Vio/△T)} + RF×(△Iio/△t)

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d) None of the mentionedView Answer

Answer: cExplanation: As the amplifier is used in inverting configuration, the effect of voltage and current drift is given as, the average change in total output offset voltage per unit change in temperature.△VooT/△T = {[1+(RF/R1)]×(△Vio/△T)} + RF×(△Iio/△t).

5. The error voltage in a compensating inverting amplifier is obtained bya) Multiplying △T to total output offset voltageb) Multiplying △T to input offset voltagec) Multiplying △T to input offset currentd) All of the mentionedView Answer

Answer: aExplanation: The maximum possible change in the total output offset voltage △VooT results from a change in temperature △t. Therefore, error voltage is obtained by multiplying △T in the average total output offset voltage.Ev =( △VooT/△T)×△T = [1+(RF/R1)]×(△Vio/△T)×△T + RF×(△Iio/△T)×△T.

6. A 7.5kΩ internal resistor and a 12kΩ feedback resistor are connected to an inverting amplifier. Find the error voltage, if the output voltage is 3.99mv for an input of 1.33mv.a) ±0.6vb) ±0.6mvc) ± 60mvd) ±6mvView Answer

Answer: dExplanation: The output voltage of inverting amplifier is Vo= -(RF/R1)×Vin±Ev

=> Ev= ± Vo+(RF/R1)×Vin = 3.99mv+(12kΩ/7.5kΩ)×1.33mv = ±6.118 ≅ ±6mv. advertisements

7. Consider the amplifier is nulled at 27oC. Calculate the output voltage , if the input voltage is 6.21mv dc at 50oC. Assume LM307 op-amp with specification: △Vio/△T=30µV/oC ; △Iio/△T = 300pA/oC; VS =±15v.

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a) +0.53v or -0.68vb) +0.52v or -0.78vc) +0.54v or -0.90vd) +0.51v or -0.86vView Answer

Answer: dExplanation: Change in temperature △T = 50oC-27oC = 23oC.=> Error voltage, Ev =[1+(RF/R1)]×(△Vio/△T)×△T + RF×(△Iio/△T)×△T = [1+(100kΩ/1kΩ)]×(30µv/1oC)× 23oC + 100kΩ×(300pA/1oC)× 23oC = 0.06969+ 6.9×10-9

=> Ev= 0.0704 = 70.4mv.For an input voltage of 6.21mv dc, the output voltage,Vo=-(RF/R1)×Vin±Ev = -(100kΩ/1kΩ)×6.21mv±70.4mv = +0.69v or -0.55v.

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8.

The error voltage for the above circuit is 0.93v. Compute the output voltage?a) None of the mentionedb) +17v or -15vc) -17v or +15vd) +15v to +17vView Answer

Answer: bExplanation: The output voltage for the non-inverting amplifier isVo=[1+(RF/R1+R2)]×Vin±Ev

= [1+(50kΩ/3kΩ+10kΩ)]×3.3±0.93v = 15.99±0.93=> Vo = +16.92v or -15.06v ≅ +17v or -15v.

How to obtain a desired amount of multiplication in frequency multiplier?a) By decreasing the multiplication factorb) By increasing the input frequencyc) By selecting proper divide by N-networkd) None of the mentionedView Answer

Answer: cExplanation: The desired amount of multiplication can be obtained by properly selecting a divide by N-network. For example, to obtain the output frequency fout=5×fin, a divide by N = 5 network is needed.

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2. Calculate the output frequency in a frequency multiplier if, fin = 200Hz is applied to a 7 divide by N-network.a) 1.2kHzb) 1.6kHzc) 1.2kHzd) 1.9kHzView Answer

Answer: cExplanation: Since the VCO is actually running at a multiple of input frequency. fout=divide by N-network x fin=7x200Hz=1400Hz=>fout=1.4kHz.

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3. For what kind of input signal, the frequency divider can be avoided frequency multiplier?a) Triangular waveformb) Square waveformc) Saw tooth waveformd) Sine waveformView Answer

Answer: aExplanation: VCO can be directly locked to the nth harmonic of the input signal without connecting any frequency divider in between the input signal rich in harmonics like square wave.

4. What must the typical value of n for a frequency multiplication / division? (n->order of harmonics)a) n ≤ 12b) n >11c) n <10d) n =7View Answer

Answer: dExplanation: As the amplitude of the higher order harmonics becomes less, effective locking may not take place for high values of n. So, the typical value of n is less than 10 for frequency multiplication / division.

5. Determine the offset frequency of frequency translation, when the output and input frequency are given as 75kHz and 1000Hz.a) 35 kHzb) 20 kHzc) 29 kHzd) 14 kHzView Answer

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Answer: bExplanation: The output of the frequency translation fo= fs+f1

=> f1 = fo- fs= 75kHz-55kHz =20kHz.

6. The frequency corresponding to logic 1 state in FSK is calleda) Space frequencyb) Mark frequencyc) Both mark and space frequencyd) None of the mentionedView Answer

Answer: bExplanation: Frequency shift is usually accomplished by dividing a VCO with binary data signal. Therefore, the logic 1 state of the binary data signal corresponds to mark frequencies.

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7. Find the frequency shift in FSK generator?a) 230 Hzb) 250 Hzc) 180 Hzd) 200 HzView Answer

Answer: dExplanation: Frequency shift is the difference between FSK signals of 1070 Hz and 1270 Hz frequency, which is 200 Hz.

8. Which filter is chosen to remove the carrier component in the frequency shift keying?a) Three stage filterb) Two stage filterc) Single stage filterd) All of the mentionedView Answer

Answer: aExplanation: The high cut-off frequency of ladder filter is chosen to be approximately halfway between the maximum keying rate of 150Hz & twice the input frequency (≅ 2200Hz) which can be obtained using three stage filters.

What is the conversion ratio of the phase detector in 565 PLL?a) 0.14b) 0.35c) 0.4458d) 0.7View Answer

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Answer: cExplanation: The conversion ratio of the phase detector of 565 PLL (Monolithic PLL) Kφ = 1.4/π = 0.4458.

2. Given fo = 1.2kHz and V = 13v, find the lock-in range of monolithic Phase-Locked Loop.a) ±575Hzb) ±720Hzc) ±150Hzd) ±1kHzView Answer

Answer: bExplanation: The lock-in range of monolithic PLL, △fL = ±(7.8×fo)/V = ±(7.8×1.2kHz)/13 = ±720Hz.

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3. Find out the incorrect statement.Monolithic phase detector is preferred for critical applications as it is:1. Independent of variation in amplitude2. Independent of variation in duty cycle of the input waveform3. Independent of variation in response timea) 1 & 2b) 1 & 3c) 2 & 3d) 1, 2 & 3View Answer

Answer: aExplanation: Monolithic phase detectors are not sensitive to harmonics of the input signal and change in duty cycle of input and output frequency. 4. Determine the capture range of IC PLL 565 for a lock-in range of ± 1kHz.

a) △fc = ±31.453Hzb) None of the mentionedc) △fc = ±87.653Hzd) △fc = ±66.505HzView Answer

Answer: dExplanation: The capture range is △fc = ±[△fL/ (2π×3.6×103×C]0.5 = ±[1kHz/(2π×3.6×kΩ×10µF)]0.5 = ±[1kHz/226.08×-6]0.5 = [4423]0.5 = ±66.505Hz.

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5. Find the lock-in range of monolithic Phase-Locked Loop from the given diagram.

a) -fo-△fL to fo-△fL

b) -fo-△fL to -fo-△fC

c) fo-△fL to fo-△fC

d) -fo-△fC to fo-△fC

View Answer

Answer: aExplanation: Lock-in range of monolithic PLL is from -fo-△fL to fo-△fL.

Variation in the operating frequency of op-amp causesa) Variation in gain amplifierb) Variation in gain phase anglec) Variation in gain amplitude and its phase angled) None of the mentioned.View Answer

Answer: cExplanation: The gain of the op-amp is a function of frequency. It will have a specific magnitude as well as a phase angle.

2. A graph of the magnitude of the gain versus frequency is calleda) Break frequencyb) Frequency response plotc) Frequency stability plotd) Transient response plotView Answer

Answer: bExplanation: A frequency response plot is obtained by plotting the gain of the op-amp responding to different frequencies.

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3. In the frequency response plot, the frequency is expressed ina) Anti-logarithmic scaleb) Logarithmic scale

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c) Linear scaled) Exponential scaleView Answer

Answer: bExplanation: To accommodate large frequency ranges the frequency is assigned to a logarithmic scale.

4. Why the gain magnitude in frequency response plot is expressed in decibels (dB)a) To obtain gain > 105

b) To obtain gain < 105

c) To obtain gain = 0d) To obtain gain = ∞View Answer

Answer: aExplanation: In frequency response plot, gain magnitude is assigned a linear scale and is expressed in decibels to accommodate very high gain ( ≅ of the order 105 or higher).

5. Which technique is used to determine the stability of op-amp?a) Frequency response plotb) Transient response plotc) Bode plotd) All of the mentionedView Answer

Answer: cExplanation: Although frequency response and bode plots indicate the effect of frequency variation on gain, the Bode plot is generally used for stability determination and network design.

6. How many types of plots can be obtained in the AC analysis of network using Bode plot?a) Fiveb) Fourc) threed) TwoView Answer

Answer: dExplanation: Two types of plots can be obtained using Bode plot. They are magnitude versus frequency and phase angle versus frequency plots.

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7. What happens when the operating frequency of an op-amp increase?a) Gain of the amplifier decreaseb) Phase shift between output and input signal decreasec) Gain and phase shift of amplifier decreases.

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d) None of the mentioned.View Answer

Answer: aExplanation: When the operating frequency is increased the gain of the amplifier decrease. As it is linearly related to frequency, the phase shift is logarithmically related to frequency.

8. Which of the following causes change in gain and phase shift?a) All of the mentionedb) Internally integrated inductorsc) Internally integrated Capacitord) Internally integrated ResistorView Answer

Answer: cExplanation: The change in function of frequency is attributed to the internally integrated capacitor as well as stray capacitor. These capacitors are due to the physical characteristic of semiconductor device.

9. Which plot is not provide by the manufactures?a) Magnitude plotb) Phase angle plotc) Frequency response plotd) None of the mentioned.View Answer

Answer: bExplanation: Phase angle plot are not generally provided because phase shift of later generation op-amp are less than 90o even at cross over frequency.

10. How the performance of an op-amp circuit can be improved?a) By using non-compensating networkb) By using frequency networkc) By using compensating networkd) None of the mentionedView Answer

Answer: cExplanation: The compensating networks are used to improve /modify the performance of an op-amp circuit over the desired frequency range by controlling it gain and phase shift.

11. Which op-amp require external compensating network?a) Op-amp 771b) Op-amp 351c) Op-amp 709

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d) Op-amp 741View Answer

Answer: cExplanation: Op-amp 709 is a first generation op-amp. Generally first generation op-amp are required for external compensating network.

12. IC 741c op-amp belongs toa) None of the mentionedb) Uncompensated op-ampc) Non-compensated op-ampd) Compensated op-ampView Answer

Answer: dExplanation: 741c belongs to later generation op-amp and it has internal compensating network. In internal compensated op-amp, the compensating network is designed into the circuit to control the gain and phase shift of the op-amp and they are called as compensating op-amp.

13. Find out the non-compensating op-amp from the given circuit

View Answer

Answer: cExplanation: Non-compensating op-amp has external compensating components, that is ,

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resistors and / or capacitors, are added at designated terminals. The mentioned op-amp has three compensating components: a resistor and two capacitors.

Open loop op-amp configuration hasa) Direct network between output and input terminalsb) No connection between output and feedback networkc) No connection between input and feedback networkd) All of the mentionedView Answer

Answer: aExplanation: In an open loop configuration, the output signal is not fed back in any form as part of the input signal and the loop that would have been formed with feedback is open.

2. In which configuration does the op-amp function as a high gain amplifier?a) Differential amplifierb) Inverting amplifierc) Non-inverting amplifierd) All of the mentionedView Answer

Answer: dExplanation: An op-amp functions as a high gain amplifier when connected in open loop configuration. These three are the open loop configuration of an op-amp.

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3. How does the open loop op-amp configuration classified?a) Based on the output obtainedb) Based on the input appliedc) Based on the amplificationd) Based on the feedback networkView Answer

Answer: bExplanation: Open loop configurations are classified according to the number of inputs used and the terminal to which the input is applied when a single input is used.

4. What will be the voltage drop across the source resistance of differential amplifier when connected in open loop configuration?a) Zerob) Infinityc) Oned) Greater than oneView Answer

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Answer: aExplanation: The source resistances are normally negligible compared to the input resistance. Therefore, the voltage drop across input resistors can be assumed to be zero.

5. The output voltage of an open-loop differential amplifier is equal toa) Double the difference between the two input voltagesb) Product of voltage gain and individual input voltagesc) Product of voltage gain and the difference between the two input voltagesd) Double the voltage gain and the difference between two input voltagesView Answer

Answer: cExplanation: The output voltage is equal to the voltage gain times the difference between the two input voltages.

Which filter type is called a flat-flat filter?a) Cauer filterb) Butterworth filterc) Chebyshev filterd) Band-reject filterView Answer

Answer: bExplanation: The key characteristic of the butterworth filter is that it has a flat pass band as well as stop band. So, it is sometimes called a flat-flat filter.

2. Which filter performs exactly the opposite to the band-pass filter?a) Band-reject filterb) Band-stop filterc) Band-elimination filterd) All of the mentionedView Answer

Answer: dExplanation: A band reject is also called as band-stop and band-elimination filter. It performs exactly the opposite to band-pass because it has two pass bands: 0 < f < fL and f > fH.

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3. Given the lower and higher cut-off frequency of a band-pass filter are 2.5kHz and 10kHz. Determine its bandwidth.a) 750 Hzb) 7500 Hzc) 75000 Hzd) None of the mentionedView Answer

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Answer: bExplanation: Bandwidth of a band-pass filter is Bandwidth= fH- fL=10kHz-2.5kHz=7.5kHz=7500Hz.

4. In which filter the output and input voltages are equal in amplitude for all frequencies?a) All-pass filterb) High pass filterc) Low pass filterd) All of the mentionedView Answer

Answer: aExplanation: In all-pass filter, the output and input voltages are equal in amplitude for all frequencies. This filter passes all frequencies equally well and with phase shift and between the two function of frequency.

5. The gain of the first order low pass filtera) Increases at the rate 20dB/decadeb) Increases at the rate 40dB/decadec) Decreases at the rate 20dB/decaded) Decreases at the rate 40dB/decadeView Answer

Answer: cExplanation: The rate at which the gain of the filter changes in the stop band is determined by the order of filter. So, for a low pass filter the gain decreases at the rate of 20dB/decade.

6. Which among the following has the best stop band response?a) Butterworth filterb) Chebyshev filterc) Cauer filterd) All of the mentionedView Answer

Answer: cExplanation: The cauer filter has a ripple pass band and a ripple stop band. So, generally cauer filter gives the best stop band response among the three.

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7. Determine the order of filter used, when the gain increases at the rate of 60dB/decade on the stop band.a) Second-order low pass filterb) Third-order High pass filterc) First-order low pass filterd) None of the mentionedView Answer

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Answer: bExplanation: The gain increases for high pass filter. So, for a third order high pass filter the gain increases at the rate of 60dB/decade in the stop band until f=fL.

8. Name the filter that has two stop bands?a) Band-pass filterb) Low pass filterc) High pass filterd) Band-reject filterView Answer

Answer: aExplanation: A band-pass filter has two stop bands: 1) 0 < f < fL and 2) f > fH.

9. The frequency response of the filter in the stop band.i. Decreases with increase in frequencyii. Increase with increase in frequencyiii. Decreases with decrease in frequencyiv. Increases with decrease in frequencya) i and ivb) ii and iiic) i and iid) ii and ivView Answer

Answer: cExplanation: The order of frequency of the filter in the stop band determines either steady decreases or increases or both with increase in frequency.

How many types of band elimination filters are presenta) Threeb) Twoc) Fourd) None of the mentionedView Answer

Answer: bExplanation: Band-reject filters are also called as band elimination filters. They are classified into two types.i) Wide band-reject filter andii) Narrow band-reject filter.

A narrow band-reject filter is commonly called asa) Notch filter

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b) Band step filterc) Delay filterd) All of the mentionedView Answer

Answer: aExplanation: A narrow band-reject filter is also called as notch filter because of its higher quality factor, Q (>10).

4. Find the expression for notch-out frequency?a) fN = 2πRCb) fN = 2π/RCc) fN = 1/2π×√(R/C)d) fN = 1/2πRCView Answer

Answer: dExplanation: The notch-out frequency is the frequency at which maximum attenuation occurs: it is given by fN =1/2πRC.

5. The quality factor of passive twin T-network is increased by usinga) Inverting amplifierb) Non-inverting amplifierc) Voltage followerd) Differential amplifierView Answer

Answer: cExplanation: The passive twin T-network has a selectively low figure of merit. The Q of the network can be increased significantly, if it is used with the voltage follower.

6. Find out the application in which narrow band-reject filter can be used?a) Embedded systemb) Biomedical instrumentc) Digital computerd) None of the mentionedView Answer

Answer: bExplanation: Notch filters or narrow band-reject filters are used in biomedical instruments for eliminating undesired frequencies.

Find the application of area where all-pass filters are used?a) Cathode ray oscilloscopeb) Television

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c) Telephone wired) None of the mentionedView Answer

Answer: cExplanation: When signals are transmitted in transmission lines like telephone wire, they undergo change in phase, all-pass filters are used to compensate these phase changes.

9. Determine the output voltage for all the all-pass filter and express it in complex form?a) VO =Vin/ [(1-j2πfRC) /(1+ j2πfRC)]b) VO =Vin× [(1+j2πfRC) /(1- j2πfRC)]c) VO =Vin ×[(1- j2πfRC) /(1+ j2πfRC)]d) None of the mentionedView Answer

Answer: cExplanation: The output voltage of all-pass filter is given as VO =Vin× [(1-j2πfRC) /(1+j2πfRC)] .

10. Determine the input frequency for all-pass filter with phase angle as 62o. Consider the value of resistor and capacitor are 3.3kΩ and 4.7µF.a) Input frequency= -7.65Hzb) Input frequency= -6.77Hzc) Input frequency= -3.89Hzd) Input frequency= -9.65HzView Answer

Answer: dExplanation: The phase angle is given as Φ = -2tan-1×(2πfRC)=> f=-tanΦ/4πRC =-tan(62o)/(4π×3.3kΩ×4.7µF)= -1.88/0.1948 =-9.65Hz.

The voltage gain magnitude of all-pass filter isa) Zerob) Onec) Infinityd) None of the mentionedView Answer

Answer: bExplanation: The magnitude of voltage gain of all-pass filter |VO /Vin| = √(1+(2π/RC)2) / √(1+(2 π/RC)2) =1

Choose the incorrect statement “In wide band-reject filter” .a) Low cut-off frequency of low pass filter must be larger than the high cut-off frequency of the high pass filter.b) Low cut-off frequency of high pass filter must be equal than the high cut-off frequency of the

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high pass filter.c) Low cut-off frequency of high pass filter must be smaller than the high cut-off frequency of the low pass filter.d) None of the mentionedView Answer

Answer: dExplanation: In wide band-reject filter, low cut-off frequency of high pass filter must be larger than the high cut-off frequency of the low pass filter.

Which filter attenuates any frequency outside the pass band?a) Band-pass filterb) Band-reject filterc) Band-stop filterd) All of the mentionedView Answer

Answer: aExplanation: A band- pass filter has a pass band between two cut-off frequencies fH and fL. So, any frequency outside this pass band is attenuated.

2. Narrow band-pass filters are defined asa) Q < 10b) Q = 10c) Q > 10d) None of the mentionedView Answer

Answer: cExplanation: Quality factor (Q) is the measure of selectivity, meaning higher the value of Q, the narrower its bandwidth.

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3. A band-pass filter has a bandwidth of 250Hz and center frequency of 866Hz. Find the quality factor of the filter?a) 3.46b) 6.42c) 4.84d) None of the mentionedView Answer

Answer: aExplanation: Quality factor of band-pass filter, Q =fc/bandwidth= 566/250=3.46.

4. Find the center frequency of wide band-pass filtera) fc= √(fh ×fL)

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b) fc= √(fh +fL)c) fc= √(fh -fL)d) fc= √(fh /fL)View Answer

Answer: aExplanation: In a wide band-pass filter, the product of high and low cut-off frequency is equal to the square of center frequencyi.e. ( fc)2 =fH×fL

=> fc= √(fh×fL).

5. Find out the voltage gain magnitude equation for the wide band-pass filter.a) AFt×( f/fL)/√[(1+(f/fh)2]×[1+(f/fL)2]b) AFt/ √{[1+(f/fh)2]×[1+(f/fL)2]}c) AFt/ √{[1+(f/fh)2]/[1+(f/fL)2]}d) [AFt/(f/fL)]/ √{[1+(f/fh)2]/[1+(f/fL)2]}View Answer

6. When a second order high pass filter and second order low pass sections are cascaded, the resultant filter is aa) ±80dB/decade band-pass filterb) ±40dB/decade band-pass filterc) ±20dB/ decade band-pass filterd) None of the mentionedView Answer

Answer: bExplanation: The order of the band-pass filter depends on the order of the high pass and low pass filter sections.

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7. Find the voltage gain magnitude of the wide band-pass filter?Where total pass band gain is=6, input frequency = 750Hz, Low cut-off frequency =200Hz andhigh cut-off frequency=1khz.a) 13.36 dBb) None of the mentionedc) 11.71 dBc) 14.837dBView Answer

Answer: dExplanation: Voltage gain of the filter,|VO/Vin|=[AFt×(f/fL)]/{√[1+(f/fL)2]×[1+f/fL)2]} =[6×(750/20)]/√{[1+(750/200)2]×[1+(750/200)2]}=22.5/√(15.6×1.56) =5.519.|VO/Vin|= 20log(5.519) =14.837dB.

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8. Compute the quality factor of the wide band-pass filter with high and low cut-off frequencies equal to 950Hz and 250Hz.a) 0.278b) 0.348c) 0.696d) 0.994View Answer

Answer: cExplanation: Quality factor Q=√(fh×fL)/(fh-fL) = √(950Hz×250Hz)/(9950Hz-250Hz) =0.696.

9. The details of low pass filter sections are given as fh =10kHz, AF= 2 and f=1.2kHz. Find the voltage gain magnitude of first order wide band-pass filter, if the voltage gain magnitude of high pass filter section is 8.32dB.a) 48.13dBb) 10.02dBc) 14.28dBd) 65.99dBView Answer

Answer: cExplanation: |VO/Vin|(high pass filter) = 8.32dB=10(8.32/20) =2.606.Therefore, the voltage gain of wide band-pass filter |VO/Vin|= AFt×(f/fL)/√[1+(f/fh)2)]×[1+(f/fL)2)]={Af/√[(1+(f/fh)2]}×{(Af×f/fL)/√[1+(f/fL)2]} =Aft /√[1+(f/fh)2]×(2.606)= [2/√(1+(1.2kHz/10kHz)2]×( 2.606) = 1.986×2.606 =5.17 =20log×(5.17) =14.28dB.

10. The quality factor of a wide band-pass filter can bea) 12.6b) 9.1c) 14.2d) 10.9View Answer

Answer: bExplanation: A wide band-pass filter has quality factor less than 10.

If the gain at center frequency is 10, find the quality factor of narrow band-pass filtera) 1b) 2c) 3d) None of the mentionedView Answer

Answer: cExplanation: The gain of the narrow band-pass filter must satisfy the condition, AF= 2×Q2

When Q=3,

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=> 2×Q2 =2×(32) =18.=> 10<18. Hence condition is satisfied when Q=3.

13. The advantage of narrow band-pass filter isa) fc can be changed without changing gainb) fc can be changed without changing bandwidthc) fc can be changed without changing resistorsd) All of the mentionedView Answer

Answer: dExplanation: As the narrow band-pass filter has multiple filters. The center frequency can be changed to a new frequency without changing the gain or bandwidth and is accomplished by changing the resistor to a new value which is given asR’=R×(fL/fc)2.

An electrical filter is aa) Phase-selective circuitb) Frequency-selective circuitc) Filter-selective circuitd) None of the mentionedView Answer

Answer: bExplanation: An electric filter is often a frequency selective circuit that passes a specified band of frequencies and blocks or alternates signal of frequencies outside this band.

2. Filters are classified asa) Analog or digitalb) Passive or activec) Audio or radio frequencyd) All of the mentionedView Answer

Answer: dExplanation: Filters are classified based on the design technique (analog or digital), elements used for construction (active or passive) and operating range (audio or radio frequency).

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3. Why inductors are not preferred for audio frequency?a) Large and heavyb) High power dissipationc) High input impedanced) None of the mentionedView Answer

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Answer: aExplanation: At audio frequencies, inductor becomes problematic, as the inductors become large, heavy and expensive.

4. The problem of passive filters is overcome by usinga) Analog filterb) Active filterc) LC filterd) A combination of analog and digital filtersView Answer

Answer: bExplanation: The active filters enclose as a capacitor in the feedback loop and avoid using inductors, this way inductorless active filter are obtained.

5. What happens if inductors are used in low frequency applications?a) Enhance inductor usageb) No losses occursc) Degrades inductor performanced) Low power dissipationView Answer

Answer: cExplanation: For low frequency applications more number of turns of wire must be used, which in turn adds to the series resistance degrading inductor’s performance.

6. Find out the incorrect statement about active and passive filters.a) Gain is not attenuated in active filterb) Passive filters are less expensivec) Active filter does not cause loading of sourced) Passive filters are difficult to tune or adjustView Answer

Answer: bExplanation: Typically active filters are more economical than passive filters. This is because of the variety of cheaper op-amp and the absence of inductor’s.

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7. What are the most commonly used active filters?a) All of the mentionedb) Low pass and High pass filtersc) Band pass and Band reject filtersd) All-pass filtersView Answer

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Answer: aExplanation: All the mentioned filters use op-amp as active element and capacitors & resistors as passive elements.

8. Choose the op-amp that improves the filter performance.a) µA741b) LM318c) LM101Ad )MC34001View Answer

Answer: bExplanation: LM318 is a high speed op-amp that improves the filter’s performance through increased slew rate and higher unity gain-bandwidth.

9. Ideal response of filter takes place ina) Pass band and stop band frequencyb) Stop band frequencyc) Pass band frequencyd) None of the mentionedView Answer

Answer: cExplanation: The ideal response indicates the practical filter response and it lies within the pass band frequencies.10. Find out the low pass filter from the given frequency response characteristics.

View Answer

Answer: aExplanation: A low pass filter has a constant gain from 0Hz to high cut-off frequency fH.

Select the specifications that implies the inverting amplifier?a) V1 = -3v, V2 = -4vb) V1 = -2v, V2 = 3vc) V1 = 5v, V 2 = 15vd) V1 = 0v, V2 = 5vView Answer

Answer: dExplanation: In inverting amplifier, the input is applied to the inverting terminal and the non-inverting terminal is grounded. So,the input applied to inverting amplifier can be V1 = 0v, V2 = 5v.

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8. Find the output of inverting amplifier?a) Vo = AVin

b) Vo = -AVin

c) Vo = -A(Vin1– Vin2)d) None of the mentionedView Answer

Answer: bExplanation: In an inverting amplifier the input signal is amplified by gain A and is also inverted at the output. The negative sign indicates that the output voltage is of opposite polarity.

9. Determine the output voltage for the non-inverting amplifier input voltage 37µVpp sinewave. Assume that the output is a 741.a) -7.44 Vpp sinewaveb) 74 Vpp sinewavec) 7.4Vpp sinewaved) 0.7 Vpp sinewaveView Answer

Answer: cExplanation: The output voltage for non-inverting amplifier Vo = A*Vin = 200000 * 37µ = 7.4 Vpp sinewave.

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10. Find the non-inverting amplifier configuration from the given circuit diagram?

View Answer

Answer: cExplanation: In a non-inverting amplifier, the input is applied to the non-inverting input terminal and the inverting terminal is connected to ground.

11. What happen if any positive input signal is applied to open-loop configuration?a) Output reaches saturation levelb) Output voltage swing’s peak to peakc) Output will be a sine waveformd) Output will be a non-sinusoidal waveformView Answer

Answer: aExplanation: In open-loop configuration, due to very high gain of the op-amp, any input signal slightly greater than zero drives the output to saturation level.

12. Why open-loop op-amp configurations are not used in linear applications?a) Output reaches positive saturationb) Output reaches negative saturationc) Output switches between positive and negative saturation

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d) Output reaches both positive and negative saturation.View Answer

Answer: cExplanation: When operated in open loop, the output switches between positive and negative saturation levels. For this reason, open loop op-amp configurations are not used in linear applications.

Which filter performs exactly the opposite to the band-pass filter?a) Band-reject filterb) Band-stop filterc) Band-elimination filterd) All of the mentionedView Answer

Answer: dExplanation: A band reject is also called as band-stop and band-elimination filter. It performs exactly the opposite to band-pass because it has two pass bands: 0 < f < fL and f > fH.

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3. Given the lower and higher cut-off frequency of a band-pass filter are 2.5kHz and 10kHz. Determine its bandwidth.a) 750 Hzb) 7500 Hzc) 75000 Hzd) None of the mentionedView Answer

Answer: bExplanation: Bandwidth of a band-pass filter is Bandwidth= fH- fL=10kHz-2.5kHz=7.5kHz=7500Hz.

4. In which filter the output and input voltages are equal in amplitude for all frequencies?a) All-pass filterb) High pass filterc) Low pass filterd) All of the mentionedView Answer

Answer: aExplanation: In all-pass filter, the output and input voltages are equal in amplitude for all frequencies. This filter passes all frequencies equally well and with phase shift and between the two function of frequency.

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5. The gain of the first order low pass filtera) Increases at the rate 20dB/decadeb) Increases at the rate 40dB/decadec) Decreases at the rate 20dB/decaded) Decreases at the rate 40dB/decadeView Answer

Answer: cExplanation: The rate at which the gain of the filter changes in the stop band is determined by the order of filter. So, for a low pass filter the gain decreases at the rate of 20dB/decade.

6. Which among the following has the best stop band response?a) Butterworth filterb) Chebyshev filterc) Cauer filterd) All of the mentionedView Answer

Answer: cExplanation: The cauer filter has a ripple pass band and a ripple stop band. So, generally cauer filter gives the best stop band response among the three.

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7. Determine the order of filter used, when the gain increases at the rate of 60dB/decade on the stop band.a) Second-order low pass filterb) Third-order High pass filterc) First-order low pass filterd) None of the mentionedView Answer

8. Name the filter that has two stop bands?a) Band-pass filterb) Low pass filterc) High pass filterd) Band-reject filterView Answer

Answer: aExplanation: A band-pass filter has two stop bands: 1) 0 < f < fL and 2) f > fH.

9. The frequency response of the filter in the stop band.i. Decreases with increase in frequencyii. Increase with increase in frequencyiii. Decreases with decrease in frequencyiv. Increases with decrease in frequency

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a) i and ivb) ii and iiic) i and iid) ii and ivView Answer

Answer: cExplanation: The order of frequency of the filter in the stop band determines either steady decreases or increases or both with increase in frequency.

Free running multivibrator is also called asa) Stable multivibratorb) Voltage control oscillatorc) Square wave oscillatord) Pulse stretcherView Answer

Answer: bExplanation: Free running multivibrator operates at a frequency which is determined by an external tuning capacitor and a resistor. On applying a dc control voltage the frequency can be shifted on either sides. This frequency deviation is directly proportional to the dc control voltage and hence it is called as ‘voltage controlled oscillator’.

2. The output voltage of phase detector isa) Phase voltageb) Free running voltagec) Error voltaged) None of the mentionedView Answer

Answer: cExplanation: The phase detector compares the input frequency with the feedback frequency and produces output dc voltage called as error voltage.

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3. At which state the phase-locked loop tracks any change in input frequency?a) Free running stateb) Capture statec) Phase locked stated) All of the mentionedView Answer

Answer: cExplanation: In the phase-locked, the output frequency is exactly same as the input signal frequency. So the circuit tracks any change in the input frequency through its repetitive action.

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What is the function of low pass filter in phase-locked loop?a) Improves low frequency noiseb) Removes high frequency noisec) Tracks the voltage changesd) Changes the input frequencyView Answer

Answer: bExplanation: The output voltage of a phase detector is a dc voltage and is often referred to as error voltage. This output is applied to the low pass filter which removes the high frequency noise and produces a dc level.

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6. What is the need to generate corrective control voltage?a) To maintain the lockb) To track the frequency changec) To shift the VCO frequencyd) All of the mentionedView Answer

Answer: dExplanation: The output frequency(fo) of VCO is identical to input frequency(fs) except for a finite phase difference(φ), which generates a corrective control voltage to shift VCO frequency from fo to fs, thereby maintains the lock once locked and PLL tracks the frequency changes of the input signal.

7. At what range the PLL can maintain the lock in the circuit?a) Lock in rangeb) Input rangec) Feedback loop ranged) None of the mentionedView Answer

Answer: aExplanation: The change in frequency of the incoming signal can be tracked when the PLL is locked. So, the range of frequencies over which PLL maintains the lock with the incoming signal is called as the lock in range.

8. The pull-in time depends ona) Initial phase and frequency difference between two signb) Overall loop gainc) Loop filter characteristicsd) All of the mentionedView Answer

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Answer: dExplanation: The pull-in time depends on the above mentioned characteristics to establish lock in the PLL circuit.

Open loop bandwidth of an op-amp extend its bandwidth froma) 0Hz to fo

b) 20dB to fo

c) 3dB to fo

d) 0.704dB to fo

View Answer

Answer: aExplanation: The gain of the op-amp remains essentially constant from 0 to the break frequency fo and therefore rolls off at a constant rate of 20dB per decade. Thus, the open-loop bandwidth is the frequency band extending from 0Hz to fo.

2. What happens if 741 op-amp is configured as a closed loop inverting amplifier?a) Gain increasesb) Gain roll-off at a rate 20dB/decadec) No gain roll-off takes placed) Gain decreasesView Answer

Answer: bExplanation: Whether the op-amp is inverting / non-inverting the gain will always roll-off at a rate of 20dB/decade, using only resistive components regardless of the value of its closed loop gain.

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3. Op-amp requiring external compensating components is called asa) Tailored frequency response op-ampb) Compensating op-ampc) Transient op-ampd) High frequency op-ampView Answer

Answer: aExplanation: Op-amp using external components like resistor and capacitor to form the compensating network are sometimes called tailored frequency response op-amps because the user has to provide the compensation if it is needed to tailor the response.

4. In the first generation op-amp 709c, the open loop bandwidth of gain versus frequency curvea) Increases from the innermost compensated curve to the outermostb) Decrease from the innermost compensated curve to the outermostc) Increases from the outermost compensated curve to the innermost

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d) Decreases from the outermost compensated curve to the innermostView Answer

Answer: dExplanation: The gain versus frequency curve of 709c decreases from the outermost compensated curve to the innermost. For example, if C1 =10pF, R1 = 0Ω and C2 = 3pF, the bandwidth ≅ 5kHz. While if C1 =5000pF, R1 =1.5Ω and C2= 200pF, the bandwidth will be 100Hz.

5. Which type of op-amp offer relatively broader open-loop bandwidth?a) Compensated op-ampb) Uncompensated op-ampc) Tailored frequency response op-ampd) Non-compensated op-ampView Answer

Answer: bExplanation: The uncompensated op-amps offer broader open loop bandwidth whereas; the internally compensated op-amps have very small open-loop bandwidth.

Which device is used for diagnostic purposes and for recording?a) Low pass filterb) Monolithic PLLc) Voltage Controlled Oscillatord) None of the mentionedView Answer

Answer: cExplanation: A Voltage Controlled Oscillator (VCO) is used for converting low frequency signals such as EEGs, EKG into an audio frequency range. These audio signals can be transmitted over two way radio communication systems for diagnostic purposes or can be recorded on a magnetic tape for further reference.

2. If the output of the Schmitt trigger is given below. Estimate the output at the pin 3 of VCO.

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View Answer

Answer: aExplanation: In VCO, the output of Schmitt trigger is fed to the input of inverter. Therefore, the output at pin3 would be an inverted output. As the input is a square wave, the output obtained will be an inverted square wave.

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3. Write the equation for time period of VCO?a) (2×Vcc×CT)/ib) (Vcc CT)/(2×i)c) (Vcc×CT×i)/2d) (2×Vcc)/(i×CT)View Answer

Answer: bExplanation: The time period of VCO is given as T=2×△t =(2×0.25×Vcc ×CT)/i =(0.5 V×cc×CT)/i = (Vcc×CT)/(2×i).

4. Determine the value of current flow in VCO, when the NE566 VCO external timing resistor RT =250Ω and the modulating input voltage Vc=3.25V.(Assume Vcc=+5v).a) 3mAb) 12mAc) 7mAd) 10mAView Answer

Answer: cExplanation: Current flowing in VCO, i =(Vcc- Vc)/ RT = (5V-3.25V)/250 = 1.75/250=>i =7mA.

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5. From the circuit given, find the value of output frequency?

a) 178.484 Hzb) 104.84 Hzc) 145.84 Hzd) 110.88 HzView Answer

Answer: bExplanation: Output frequency, fo =[2×(Vcc- Vc) ]/(CT×RT×Vcc )= [2x(8-1.5)]/(0.47µFx33kΩx8v) =13/0.124=> fo=104.84 Hz.

6. The output frequency of the VCO can be changed by changinga) External tuning resistorb) External tuning capacitorc) Modulating input voltaged) All of the mentionedView Answer

Answer: dExplanation: The output frequency of VCO, fo = [2×(Vcc- Vc)]/(CT×RT×Vcc).From the equation, it is clear that the fo is inversely proportional to CT & RT and directly proportional to Vc.Therefore, the output frequency can be changed by changing either voltage control, CT or RT.

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7. Calculate the value of external timing capacitor, if no modulating input signal is applied to VCO. Consider fo=25 kHz and RT=5 kΩ.

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a) 6nFb) 100µFc) 2nFd) 10nFView Answer

Answer: cExplanation: When modulating input signal is not applied to VCO, the output frequency becomes fo=1/(4×RT×CT)=> CT =1/(4×RT×fo) =1/(4×5kΩ×25kHz) = 2×10-9 =2nF.

8. What is the advantage of using filter?a) High noise immunityb) Reduce the bandwidth of PLLc) Provides dynamic range of frequenciesd) None of the mentionedView Answer

Answer: aExplanation: The charge on the filter capacitor gives a short time memory to the PLL. So, even if the signal becomes less than the noise for a few cycles, the dc voltage on the capacitor continues to shift the frequency of VCO, till it picks up the signal again. This produces high noise immunity.

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9. Which filter is used in VCO?

View Answer

Answer: dExplanation: The loop filter used in the VCO can be one of the three types of filter shown above.

10. Choose the VCO for attaining higher output frequency.a) NE566b) SE566c) MC4024d) All of the mentionedView Answer

Answer: cExplanation: MC4024 is used for attaining high output frequency, because the maximum output frequency of NE566 and SE566 is 500kHz.

11. Voltage to frequency conversion factor for VCO isa) Kv = △Vc/ △fo

b) Kv = △fo/△Vc

c) Kv = △fo × △Vc

d) Kv = 1/(△fo×△Vc)View Answer

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Answer: bExplanation: The voltage to frequency conversion factor is defined as the change in frequency to the change in modulating input voltage.=> Kv=△fo/△Vc.

12. Calculate the voltage to frequency conversion factor, where fo=155Hz and Vcc=10V.a) 130b) 124c) 134d) 116View Answer

Answer: bExplanation: The voltage to frequency conversion factor, Kv = △fo/△Vcc= 8×fo/Vcc = (8×155)/10=124.

13. Find the equation for change in frequency of VCO?a) △fo = (2×△Vc)/(RT×CT×Vcc)b) △fo = △Vc/(4×RT×CT×Vcc)c) △fo = △Vc/(2×RT×CT×Vcc)d) △fo = (4×△Vc)/(RT×CT×Vcc)View Answer

14. Using the given specifications, determine the voltage to frequency conversion factor.

a) 8.32

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b) 8.90c) 8.51d) 8.75View Answer

Answer: cExplanation: △fo = 2×△Vc/(RT×CT×Vcc)=>△Vc= (△fo×RT×CT×Vcc)/2 = (4.7µFx10kΩx5x112)/2 = 13.16V.Kv= △fo/ △Vc = 112Hz/13.16V=>Kv=8.51.

To obtain a faster slew rate the op-amp should havea) High current and large compensating capacitorb) Small compensating capacitorc) High current or small compensating capacitord) Low current or large compensating capacitorView Answer

Answer: cExplanation: The slew rate is given as, SR =dVc/dt|max = I/CTherefore the higher current should be given a small compensating capacitor is used internally or outside an op-amp.

2. Find the expression for full power response.a) fmax(Hz) =(slew rate×106)/(6.28×Vm)b) fmax(Hz) =slew rate /(628×106×Vm)c) fmax(Hz) =(slew rate×Vm×106)/6.28d) fmax(Hz) =(6.28×Vm× 106)/ slew rateView Answer

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3. Calculate the time taken by the output to swing from +14v to -14v for a 741C op-amp having a slew rate of 0.5V/µs?a) 22µsb) 42µsc) 56µsd) 70µsView Answer

Answer: cExplanation: Slew rate = dv/dt=> Time taken = 14-(-14)/ 0.5V/µs = 28v/0.5V/µs = 56µs.

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4. Consider a square wave having a peak to peak amplitude of 275mv and it is amplified to a peak to peak amplitude of 4v, with rise time of 5.2µs. Calculate the slew rate?a) 0.615 v/µsb) 0.712 v/µsc) 0.325 v/µsd) None of the mentionedView Answer

Answer: aExplanation: From the definition of rise time, the change in the output voltage is 5.2µs△v= (90%-10%)×4v= (0.9-0.1)×4v =3.2v.Therefore, slew rate = 3.2v/5.2µs =0.615v/µs.

5. Determine the maximum input signal to be applied to an op-amp to get distortion free output. If the op-amp used is an inverting amplifier with a gain of 50 and maximum output amplitude obtained is 4.2V sine wave?a) 159mvb) 0.168mvc) 207mvd) 111mvView Answer

Answer: bExplanation: Given, Vm= 4.2Vpeak∴ the output voltage = 4.2+4.2 =8.4 V peak to peak.Hence for the output to be undistorted sine wave, the maximum input signal should be less than => 8.4/50= 0.168 = 168mVpeak to peak.

6. What happens if the frequency or amplitude of the input signal is increased to exceed slew rate of the op-amp?a) All of the mentionedb) High frequency outputc) Distorted outputd) Large amplitude outputView Answer

Answer: cExplanation: Slew rate determines the maximum frequency of operation for a desired output swing. If the slew rate is greater than 2πfVm /106 then the output is distorted, whereas an increase in the frequency /amplitude of input signal distort the output.

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7. Compute the peak output amplitude, when the voltage gain verses frequency curve of 741C is flat upto 25Hz.a) 4Vpeak

b) 9Vpeak

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c) 20Vpeak

d) None of the mentionedView Answer

Answer: dExplanation: The slew rate of 741C op-amp = 0.5V/µs. So, the maximum output voltage at 25kHz is SR= (2πfVm)/ 106 V/µs=> Vm = (SR×106)/(2πf ) = (0.5×106)/(2π×25kHz)Vm = 3.18Vpeak.

8. Calculate the maximum input frequency at which the output will be distorted from the given specificationsVo = 30 Vpp ; Slew rate = 0.6v/µs.a) 1000Hzb) 10kHzc) 1kHzd) 10kHzView Answer

Answer: dExplanation: The minimum time between the two zero crossing is given as=> 30v/(0.6v/µs) =50µs. Hence the maximize input frequency fmax at which the output get distorted is fmax = 1/(2×50µs) =10000 =10kHz.

9. Match AC parameter of the op-amp in column 1 with the column 2.

Column 1 Column-21. Bandwidth i . a large signal phenomenon2. Transient response

ii. Rise time is related to bandwidth and overshoots measure stability

3. Slew rate iii. Depends on compensating components and closed loop gain

a) 1-i 2-iii 3-iib) 1-ii 2-iii 3-ic) 1-iii 2-ii 3-id) 1-iii 2-i 3-iiView Answer

Answer: cExplanation: Analysis of difference between three AC parameter; bandwidth, transient response and slew rate.

How a triangular wave generator is derived from square wave generator?a) Connect oscillator at the output

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b) Connect Voltage follower at the outputc) Connect differential at the outputd) Connect integrator at the outputView Answer

Answer: dExplanation: The output waveform of the integrator is triangular, if its input is square wave. Therefore, a triangular wave generator can be obtained by connecting an integrator at the output of the square wave generator.

2. The increase in the frequency of triangular wave generator.a) Ramp the amplitude of triangular waveb) Increase the amplitude of triangular wavec) Decrease the amplitude of triangular waved) None of the mentionedView Answer

Answer: aExplanation: As the resistor value increase or decrease, the frequency of triangular wave will decrease or increase, respectively. Therefore, the amplitude of the triangular wave decreases with an increase in it frequency and vice verse.

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3. Which among the following op-amp is chosen for generating triangular wave of relatively higher frequency?a) LM741 op-ampb) LM301 op-ampc) LM1458 op-ampd) LM3530 op-ampView Answer

Answer: bExplanation: The frequency of the triangular wave generator is limited by the slew rate of the op-amp. LM301 op-amp has a high slew rate.

4. What is the peak to peak (PP) output amplitude of the triangular wave?a) VO(pp) = + VRamp + (- VRamp)b) VO(pp) = – VRamp + (+ VRamp)c) VO(pp) = + VRamp – (- VRamp)d) VO(pp) = – VRamp – (+ VRamp)View Answer

Answer: cExplanation: The peak to peak output waveform, VO(pp) = + VRamp-(-VRamp)Where, – VRamp –> Negative going ramp ;+ VRamp–> positive going ramp.

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5. Determine the output triangular waveform for the circuit.

View Answer

Answer: bExplanation: The voltage at which A1 switch from +Vsat to -Vsat

=> -Vramp =(-R2 / R3) × (+Vsat)

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= (-10kΩ/40kΩ) ×15v =-3.75vSimilarly, the voltage at which A1 switch from -Vsat to +Vsat

=> +Vramp = (-R2 / R3) × (-Vsat)= 10kΩ/40kΩ ×15v =3.75v∴ Time period, T = (4R1C1R2) / R3

= (4×10kΩ×0.05µF×10kΩ) /40kΩ = 0.5 ms.

6. Find the capacitor value for a the output frequency, fo = 2kHz & VO(pp) = 7v , in a triangular wave generator. The op-amp is 1458/741 and supply voltage = ±15v. (Take internal resistor=10kΩ)a) 0.03nFb) 30nFc) 0.3nFd) 3nFView Answer

Answer: dExplanation: Given, Vsat =15v∴ VO(pp) = (2R2/R3) × Vsat

=> R2 =(VO(pp) ×R3) / (Vsat×2) = [7/(2×15)]×R3 = 0.233R3∵ Internal resistor, R2 = R1= 10kΩ=> R3 = 0.233×10kΩ = 2.33kΩ.So, the output frequency fO = R3 / ( 4×R1 ×C1× R2)=> 2khz = 2.33khz/ (4×10kΩ ×10kΩ×C1)=> C1 = 2.33kΩ / (8×10-11) = 2.9 ×10-9 ≅3nF.

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7. Triangular wave form hasa) Rise time < fall timeb) Rise time = fall timec) Rise time ≥ fall timed) None of the mentionedView Answer

Answer: bExplanation: The triangular wave form has rise time of the triangular wave always equal to its fall time, that is, the same amount of time is required for the triangular wave to swing from -VRamp to +VRamp as from +VRamp to -VRamp.

8. Output of an integrator producing waveforms of unequal rise and fall time are calleda) Triangular waveformb) Sawtooth waveformc) Pulsating waveformd) Spiked waveformView Answer

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Answer: bExplanation: Sawtooth waveform has unequal rise and fall times. It may rise positively many times faster than it falls negatively or vice versa.

9. Find out the sawtooth wave generator from the following circuits.

View Answer

Answer: cExplanation: The triangular wave generator can be converted into a sawtooth wave generator by inserting a variable dc voltage into the non-inverting terminal of the integrator.

10. Consider the integrator used for generating sawtooth wave form. Match the list I with the list II depending on the movement of wiper.

List-I List-II

Rise time =fall time (Triangular wave)

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Longer fall time and short rise time (Sawtooth wave)

Longer rise time and short fall time (Sawtooth wave)

a) 1-iii,2-ii,3-ib) 1-i ,2-ii ,3-iiic) 1-i, 2-iii, 3-iid) 1-ii ,2-iii ,3-iView Answer

Answer: cExplanation: Depending on the duty cycle (movement of the wiper) the type of waveform is determined.

Which circuit is used for obtaining desired output waveform in operational amplifier?a) Clipperb) Clamperc) Peak amplifierd) Sample and holdView Answer

Answer: aExplanation: In an op-amp clipper circuits a rectifier diode is used to clip off certain portions of the input signal to obtain a designed output waveform.

2. The clipping level in op-amp is determined bya) AC supply voltageb) Control voltagec) Reference voltaged) Input voltageView Answer

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Answer: cExplanation: The clipping level is determined by the reference voltage which should be less than the input voltage range of an op-amp.

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3. In a positive clipper, the diode conducts whena) Vin < Vref

b) Vin = Vref

c) Vin > Vref

d) None of the mentionedView Answer

Answer: bExplanation:In a positive clipper, the diode conducts until Vin = Vref (during the positive half cycle of the input), because when Vin < Vref, the voltage (Vref) at the negative input is higher than that at the positive input.

4. What happens if the potentiometer Rp is connected to negative supply?

a) Output waveform below -Vref will be clipped offb) Output waveform above +Vref will be clipped offc) Output waveform above -Vref will be clipped offd) Output waveform below +Vref will be clipped offView Answer

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5. Find the output waveform for when Vin < Vref

View Answer

Answer: cExplanation: The negative portion of the output voltage below -Vref is clipped off because, diode will be in off condition when Vin < Vref.

6. What happens if the input voltage is higher than reference voltage in a positive clipper?a) Output voltage = Reference voltageb) Output voltage = DC Positive voltagec) Output voltage = Input voltaged) All of the mentionedView Answer

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Answer: aExplanation: When input voltage is higher than reference voltage, the op-amp operates in open loop and diode become reverse biased. Thus, the output voltage will be equal to reference voltage.

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7. A positive small signal halfwave rectifier cana) Rectify signals with peak value onlyb) Rectify signals with value of few millivolts onlyc) Rectify signals with both peak value and down to few millivoltsd) None of the mentionedView Answer

Answer: cExplanation: A positive small signal halfwave rectifier can rectify signals with peak values down to few millivolts, because the high open loop gain of the op-amp automatically adjusts the voltage drive to the diode, so that the rectified output peak is the same as the input.

8. Determine the output waveform of negative small signal half wave rectifier.

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View Answer

Answer: dExplanation: During the positive alteration of Vin, D1 is reverse biased. Therefore, Vo =0v. On the other hand, during the negative alteration, D1 is forward biased and hence Vo follows Vin.

9. Diode in small signal positive halfwave rectifier circuit acts asa) Ideal diodeb) Clipper diodec) Clamper dioded) Rectifier diodeView Answer

Answer: aExplanation: The diode acts as an ideal diode, since the voltage across the ON diode is divided by the open loop gain of the op-amp. As the input voltage starts increasing in the positive direction, the output of the op-amp also increases positively till the diode become forward biased.

10. How to minimize the response time and increase the operating frequency range of the op-amp?a) Positive halfwave rectifier with two diodesb) Positive halfwave rectifier with one diodec) Negative halfwave rectifier with two diodesd) Negative halfwave rectifier with one diodeView Answer

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Answer: cExplanation: Negative halfwave rectifier circuit with two diodes are used so that the output of the op-amp does not saturate. Thus, minimizes the response time and increases the operating frequency range.

11. Why a voltage follower stage is connected at the output of the negative small signal half wave rectifier?a) Due to Non-uniform input resistanceb) Due to Non-uniform output resistancec) Due to Uniform output voltaged) None of the mentionedView Answer

Answer: bExplanation: The output resistance of the circuit is non-uniform as it depends on the state of diode. That is, the output impedance is low when diode is on and high when diode is off.

12. A circuit with a predetermined dc level is added to the output voltage of the op-amp is calleda) Clamperb) Positive clipperc) Halfwave rectifierd) None of the mentionedView Answer

Answer: aExplanation: A clamper clamps the output to a desired dc level.

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13. Determine the output waveform for a peak amplifier with input =4Vpsinewave and Vref=1V.

View Answer

Answer: aExplanation: In a peak amplifier the input waveform peak is clamped at Vref.The output voltage Vo=2Vp+Vref=(2×4v)+1v = 9v.

14. An op-amp clamper circuit is also referred asa) DC cutterb) DC inserterc) DC lifterd) DC levellerView Answer

Answer: bExplanation: In an op-amp clamper circuit, a pre-determined dc level is deliberately inserted at the output voltage. For this reason, the clamper is sometimes called as DC inserter.

15. At what values of Ci and Rd a precision clamping can obtained in peak clamper when the time period of the input waveform is 0.4s?a) Ci=0.1µF and Rd=10kΩb) Ci=0.47µF and Rd=10kΩ

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c) Ci=33µF and Rd=10kΩd) Ci=2.5µF and Rd=10kΩView Answer

Answer: aExplanation: For precision clamping, Ci and Rd << T/2.So,(0.1µF×10 kΩ) << (0.4/2) = 1×10-3 << 0.2.Therefore, Ci=0.1µF and Rd=10kΩ.

Determine the time period of a monostable 555 multivibrator.a) T= 0.33RCb) T= 1.1RCc) T= 3RCd) T= RCView Answer

Answer: bExplanation: The time period of a monostable 555 timer is T = RC×ln(1/3) = 1.1.RC.

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2. Find monostable vibrator circuit using 555 timer.

View Answer

Answer: aExplanation: When 555 timer is configured in monostable operation, the trigger input is applied through pin2 whereas, upper comparator threshold (pin6) & discharge (pin7) are shorted and connected at the output.

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3. How to overcome mistriggering on the positive pulse edges in the monostable circuit?a) Connect a RC network at the inputb) Connect an integrator at the inputc) Connect a differentiator at the inputd) Connect a diode at the inputView Answer

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Answer: cExplanation: To prevent the mistrigger on positive pulse edges, a resister & capacitor combined of 10kΩ and 0.001µF at the input to form a differentiator

The circuit shows the differentiator to be connected between trigger input and the +VCC.

4. A monostable multivibrator has R = 120kΩ and the time delay T = 1000ms, calculate the value of C?a) 0.9µFb) 1.32µFc) 7.5µFd) 2.49µFView Answer

Answer: cExplanation: Time delay for a monostable multivibrator, T = 1.1RC=> C = T/(1.1R) = 1000ms/(1.1×120kΩ) = 7.57µF.

5. Which among the following can be used to detect the missing heart beat?a) Monostable multivibratorb) Astable multivibratorc) Schmitt triggerd) None of the mentionedView Answer

Answer: aExplanation: A monostable multivibrator can be used as a missing pulse detector by connecting a transistor between trigger inputs. If a pulse misses, the discharge trigger input goes high & transistor become cut-off and the output goes low. So, this type of circuit can be used to detect missing heart beat.

6. A 555 timer in monostable application mode can be used fora) Pulse position modulationb) Frequency shift keyingc) Speed control and measurementd) Digital phase detectorView Answer

Answer: cExplanation: In monostable operation mode, if input trigger pulses are generated from a rotating

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wheel, the circuit will determine the wheel speed whenever it drops below a predetermined value. Therefore, it can be used for speed control and measurement.

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7. How can a monostable multivibrator be modified into a linear ramp generator?a) Connect a constant current source to trigger inputb) Connect a constant current source to trigger outputc) Replace resistor by constant current sourced) Replace capacitor by constant current sourceView Answer

Answer: cExplanation: The resistor R of the monostable circuit is replaced by a constant current source. So, that the capacitor is charged linearly and generates ramp signal.

8. Determine time period of linear ramp generator using the specificationsRE = 2.7kΩ, R1 =47kΩ , R2 100kΩ , C= 0.1µF, VCC =5v.

a) 8msb) 4msc) 2msd) 1msView Answer

Answer: dExplanation: The time period of the linear ramp generator, T= [(2/3)×(VCC×RE)×(R1+ R2)×C]/{(R1×VCC)-[VBE×(R1+R2)]}= {(2/3)×5v×[2.7kΩ×(4.7kΩ+ 100kΩ)]×(0.1µF)}/{[(47kΩ)×5v]-[(0.7)×(47kΩ+100kΩ)]}=>T= 132.3/132.100 =1.0015×10-3 = 1ms.

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9. How does a monostable multivibrator used as frequency divider?a) Using square wave generatorb) Using triangular wave generatorc) Using sawtooth wave generatord) Using sine wave generatorView Answer

Answer: aExplanation: Monostable multivibrator can be used as a frequency divider when a continuously triggered monostable circuit is triggered using a square wave generator. Provided the timing interval is adjusted to be longer than the period of triggering square wave input signal.

10. What will be the output, if a modulating input signal and continuous triggering signal are applied to pin5 and pin22 respectively in the following circuit?

a) Frequency modulated wave formb) Pulse width modulated wave formc) Both pulse and frequency modulated wave formd) None of the mentionedView Answer

Answer: bExplanation: On application of continuous trigger at pin22 and a modulated input signal at pin5, a series of output pulses are obtained. The duration of which depends on the modulating signal. Also in the pulse duration, only the duty cycle varies, keeping the frequency same as that of the continuous input pulse train trigger.

Which circuit can be used as a full wave rectifier?a) Absolute vale output circuitb) Positive clipper with two diodes

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c) Negative clipper with two diodesd) Peak clampersView Answer

Answer: aExplanation: Absolute value output circuit produces an output signal that swings positively only, regardless of the polarity of the input signal; because of the nature of its output wave form, the circuit is used as full wave rectifier.

2. For the circuit shown below find the output voltage

a) Vo (+) = +10 vb) Vo (+) = +12vc) Vo (+) = +7vd) None of the mentionedView Answer

Answer: bExplanation: The voltage at the terminal V1 = (Vp -Vd1) /2V1 = (12-0.7) /2 = 5.65 v (Vd1= voltage drop across diode=0.7)Similarly, the voltage at the negative terminal V2 = (Vo -Vd3 ) /2 = (Vo – 0.7) /2Since Vid ≅ 0v , ∴ V1 = V2

Vo = (5.65 *2 ) + 0.7 = 12v. advertisements

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3. Determine the output waveform for the circuit

Where input = 2 Vp sine wave with time period 0.2ms.

View Answer

4. What is the alternate method to measure the values of non-sinusoidal waveform other than ac voltmeter?a) Clipperb) Clamperc) Peak detectord) ComparatorView Answer

Answer: cExplanation: A conventional ac voltmeter is designed to measure rms value of the pure sine wave whereas, the peak value of the non-sinusoidal wave forms can be a peak detector.

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5. State the condition needed to be satisfied by peak detector for proper operation of circuit.a) CRd ≤ T/10 and CRL ≥ 10Tb) CRd ≤ 10T and CRL ≥ T/10c) CRd ≥ T/10 and CRL ≤ 10Td) CRd ≥ 10T and CRL ≤ T/10View Answer

Answer: aExplanation: For proper operation of the circuit, charging and discharging time constant must satisfy the following: CRd ≤ T/10 and CRL ≥ to 10T.

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6. The resistor in the peak detector are used toa) To maintain proper operationb) Protect op-amp from damagec) To get shaped non-sinusoidal waveformd) None of the mentionedView Answer

Answer: bExplanation: The resistor is used to protect the op-amp against the excessive discharge current, especially when the power supply is switched off.

7. How the recovery time of the op-amp is reduced?a) Diode is connected at the output of amplifierb) Load resistorc) Forward biased diode resistord) Discharge capacitorView Answer

Answer: aExplanation: The diode connected at the output of op-amp conducts during negative half cycle of input voltage. Hence, prevent the op-amp from going into negative saturation. This in turn helps to reduce the recovery time of the op-amp.

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8.how to detect the negative peaks of input signals in the peak detector given below?

a) Reversing D1 diodeb) Reversing D1 and D2 diodesc) Reversing D2 dioded) Charging the positions of D1 and D2

View Answer

Answer: bExplanation: The negative peaks of the input signal Vin can be detected by reversing diodes D1 and D2.

9. In the sample and hold circuit, the period during which the voltage across capacitor is equal to input voltagea) Sample periodb) Hold periodc) Delay periodd) Charging periodView Answer

Answer: aExplanation: The time periods of the sample and hold control voltage during which the voltage across capacitor is equal to the input voltage are called sample period.

10. During which period the op-amps output of sample and hold circuits is processed?a) None of the mentionedb) Sample and hold periodc) Sample periodd) Hold periodView Answer

Answer: dExplanation: Hold period is the period during which the voltage across the capacitor is constant and the output of the op-amp is processed or observed during hold periods.

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11. Which IC is mostly preferred for sample and hold circuit?a) µ771b) IC741c) LF398d) µ351View Answer

Answer: cExplanation: LF398 have significant reduction in size and improved performance and require only an external storage capacitor.

12. Sample and hold circuit are used ina) Analog to Digital modulationb) Digital to analog modulationc) Pulse position modulationd) All of the mentionedView Answer

Answer: dExplanation: All types of modulation involve taking samples of an input signal and hold on to it last sample value until the input is sampled.

Which circuit converts irregularly shaped waveform to regular shaped waveforms?a) Schmitt triggerb) Voltage limiterc) Comparatord) None of the mentionedView Answer

Answer: aExplanation: Schmitt trigger are also called as squaring circuit because, this type of circuit converts an irregularly shaped wave to a square wave or pulse.

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2. Determine the upper and lower threshold voltage

a) VUT = +14.63v, VLT= +14.63vb) VUT = -14.63v, VLT= -14.63vc) VUT = VLT= ±14.63vd) None of the mentionedView Answer

Answer: bExplanation: Upper threshold voltage, VUT = [R1/(R1+ R2)]× (+Vsat) = [10kΩ/(10kΩ +250Ω)]×(+15v)= +14.63v.Lower threshold voltage VLT = [R1/(R1+ R2)]×( -Vsat) = [10kΩ /(10kΩ+250Ω)]×(-15v)= -14.63v.

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3. What happens if the threshold voltages are made longer than the noise voltages in schmitt trigger?a) All the mentionedb) Enhance the output signalc) Reduce the transition effectd) Eliminate false output transitionView Answer

Answer: dExplanation: In schmitt trigger, if the threshold voltage VUT and VLT are made larger than the input noise voltage. The positive feedback will eliminate the false output transition.

4. To a schmitt trigger in non-inverting configuration an input triangular wave of 1Vp is applied. What will be the output waveform, if the upper and lower threshold voltages are 0.25v?a) Square waveformb) Pulse waveformc) Sawtooth waveformd) Cannot be determined.View Answer

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5. In which configuration a dead band condition occurs in schmitt triggera) Differential amplifier with positive feedbackb) Voltage follower with positive feedbackc) Comparator with positive feedbackd) None of the mentionedView Answer

Answer: cExplanation: The comparator with positive feedback is said to exhibit hysteresis, a dead band condition, when the input of comparator exceeds upper threshold voltage. At this condition, output switch from +Vsat to -Vsat. It reverts back to its original state, +Vsat when the input goes below lower threshold voltage.

6. Calculate the hysteresis voltage for the schmitt trigger from the given specification:R2 =56kΩ , R1 = 100Ω ,Vref = 0v & Vsat = ±14v.

a) 0 mvb) 25 mvc) 50 mvd) -25 mvView Answer

Answer: cExplanation: Upper threshold voltage, VUT =[R1/(R1+R2)]×( +Vsat) = [100kΩ/(56kΩ +100 Ω)]×(+14v)= +25mv.Lower threshold voltage VLT = [R1/(R1+ R2)]×(-Vsat) = [100kΩ /(56kΩ+100Ω)]×(-14v)= -25 mv.∴ Hysteresis voltage = VUT-VLT = 25-(-25) = 50mv.

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7. How to limit the output voltage swing only to positive direction?a) Combination of two zener diodesb) Combination of zener and rectifier diodec) All of the mentioned

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d) Combination of two rectifier diodesView Answer

Answer: bExplanation: To limit the output voltage swing to positive or negative direction, the basic op-amp comparator should be connected with a combination of zener and rectifier diode in the feedback path.

8. For the circuit shown below, obtain output waveform. Assume zener voltage to be 4.78v and voltage drop across the forward biased zener to be 0.7v.

View Answer

9. A basic op-amp circuit has a zener and rectifier diode connected in the feedback path. Calculate the maximum positive voltage. Where, zener voltage = 5.1 v and voltage drop across

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the forward biased zener = 0.7v?a) VO= 5.8vb) VO= 9.9vc) VO= 4.7vd) VO= 7.1vView Answer

Answer: dExplanation: Initially, rectifier diode will be reverse biased and makes the op-amp to operate in open loop configuration. So, the output voltage is obtained till the rectifier diode is forward bias and zener goes into avalanche condition. Hence, the maximum positive output voltage VOz +VD (VD –> voltage drop across rectifier diode).=> VO= 5.1v+0.7 v= 5.8v.

What is Barkhausen criterion for oscillation?a) Aß>1b) Aß<1c) Aß=1d) Aß≠1View Answer

Answer: cExplanation: The Barkhausen criterion for oscillation is Aß=1.Where, A-> gain of amplifier and ß-> transfer ratio.

2. At what condition the output signal can be continuously obtained from input signal?a) When the product of input voltage and feedback voltage is equal to 1b) When the product of amplifier gain and transfer ratio is equal to 1c) When the product of feedback voltage and transfer ratio is equal to 1d) When the product of amplifier gain and input voltage is equal to 1View Answer

Answer: bExplanation: When Aß=1, the feedback signal will be equal to the input signal. At this condition, the circuit will continue to provide output, even if the external signal is disconnected. This is because the amplifier cannot distinguish between external signal and signal from the feedback circuit. Thus, output signal is continuously obtained.

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3. An oscillator is a type ofa) Feedforward amplifierb) Feedback amplifierc) Waveform amplifierd) RC amplifierView Answer

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Answer: bExplanation: An oscillation is a type of feedback amplifier in which a part of output is fed back to the input via a feedback circuit.

4. Find the basic structure of feedback oscillator.

a)

b)

c) d) None of the mentionedView Answer

Answer: cExplanation: The above mentioned diagram is the basic structure of feedback oscillator. It consists of an amplifier, to the external input (vi) is applied and it have a feedback network from which the feedback signal (vf) is obtained.

5. What is the condition to achieve oscillations?a) |Aß|=1b) ∠Aß=0o

c) ∠Aß=multiples of 2πd) All the mentionedView Answer

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Answer: dExplanation: All the conditions should be simultaneously satisfied to achieve oscillations.

6. What happens if |Aß|<1a) Oscillation will die downb) Oscillation will keep on increasingc) Oscillation remains constantd) Oscillation fluctuatesView Answer

Answer: aExplanation: If |Aß| becomes less than unity, the feedback signal goes on reducing in each feedback cycle and oscillation will die down eventually.

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7. How sustained oscillation can be achieved?a) Maintaining |Aß| slightly greater than unityb) Maintaining |Aß| equal to unityc) Due to non-linearity of transistord) Due to use of feedback networkView Answer

Answer: cExplanation: When |Aß| is kept slightly greater than unity the signal, however, cannot go on increasing and get limited due to non-linearity of the device (that is transistor enters into saturation). Thus, it is the non-linearity of the transistor because of which the sustained oscillation can be achieved.

8. Why it is difficult to maintain Barkhausen condition for oscillation?a) Due to variation in temperatureb) Due to variation in supply voltagec) Due to variation in components life timed) All of the mentionedView Answer

Answer: dExplanation: The Barkhausen condition |Aß|=1 is usually difficult to maintain in the circuit as the value of A and ß vary due to temperature variations, aging of components, change of supply voltage etc.

9. Name the type of noise signal present in the oscillation?a) Schmitt noiseb) Schottky noisec) Saturation noised) None of the mentionedView Answer

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Answer: bExplanation: Schottky noise is the noise signal always present at the input of the transistor due to variation in the carrier concentration.

10. A basic feedback oscillator is satisfying the Barkhausen criterion. If the ß value is given as 0.7072, find the gain of basic amplifier?a) 2.1216b) 0.7072c) 1d) 1.414View Answer

Answer: dExplanation: Barkhausen criterion for oscillation is given as Aß=1=> A=1/ ß = 1/0.7072 = 1.414.

11. The feedback signal of basic sine wave oscillator is given asa) Vf = Aß ×Vo

b) Vf = Aß ×Vi

c) Vf = Aß × (Vo/ Vi)d) Vf = Aß × (Vi/ Vo)View Answer

Answer: bExplanation: The feedback signal of an oscillator is given as the product of external applied signal & the loop gain of the system.=> Vf= Aß ×Vi.

12. Express the requirement for oscillation in polar forma) Aß =1∠360o

b) Aß =1∠90o

c) Aß =1∠πo

d) Aß =1∠270o

View Answer

Answer: aExplanation: There are two requirements for oscillation1. The magnitude of Aß=12. The total phase shift of Aß=0o or 360o.

Which is not considered as a linear voltage regulator?a) Fixed output voltage regulatorb) Adjustable output voltage regulatorc) Switching regulator

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d) Special regulatorView Answer

Answer: cExplanation: In linear regulator’s the impedance of active element may be continuously varied to supply a desired current to the load. But in the switching regulator, a switch is turned on and off.

2. What is the dropout voltage in a three terminal IC regulator?a) |Vin| ≥ |Vo|+2vb) |Vin| < |Vo|-2vc) |V in| = |Vo|d) |Vin| ≤ |Vo|View Answer

Answer: aExplanation: The unregulated input voltage must be atleast 2V more than the regulated output voltage. For example, if Vo=5V, then Vin=7V.

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3. To get a maximum output current, IC regulation are provided witha) Radiation sourceb) Heat sinkc) Peak detectord) None of the mentionedView Answer

Answer: bExplanation: The load current may vary from 0 to rated maximum output current. To maintain this condition, the IC regulator is usually provided with a heat sink; otherwise it may not provide the rated maximum output current.

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4. For the given circuit, let VEB(ON)=1v, ß= 15 and IO=2mA. Calculate the load current

a) IL = 23.45Ab) IL = 46.32Ac) IL = 56.87Ad) IL = 30.75AView Answer

Answer: dExplanation: The equation for load current, IL = [(ß+1)IO]-[ß×(VEB(ON)/R1)]=[(15+1)×2]–[15×(1v/12 Ω)] =32-1.25 =30.75A.

5. Which type of regulator is considered more efficient?a) All of the mentionedb) Special regulatorc) Fixed output regulatord) Switching regulatorView Answer

Answer: dExplanation: The switching element dissipates negligible power in either on or off state. Therefore, the switching regulator is more efficient than the linear regulators.

6. State the reason for thermal shutdown of IC regulator?a) Spikes in temperatureb) Decrease in temperaturec) Fluctuation in temperatured) Increase in temperatureView Answer

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Answer: dExplanation: The IC regulator has a temperature sensor (built-in) which turn off the IC, when it becomes too hot (usually 125oC-150oC). The output current will drop and remains there until the IC has cooled significantly.

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7. Find the difference between output current having a load of 100Ω and 120Ω for 7805 IC regulator. Consider the following specification: Voltage across the load = 5v; Voltage across the internal resistor= 350mv.a) 8.4mAb) 7mAc) 9mAd) 3.4mAView Answer

Answer: aExplanation: Given the voltage across the internal resistor to be 350mv, which is less than 0.7v. Hence the transistor in 7805 is off.When load = 100Ω, IL= IO= Ii= 5v/100 Ω = 50mAWhen load=120Ω, IO= 5v/120 Ω = 41.6mA.So, the difference between the output voltage = 50-41.6mA = 8.4mA.

8. The change in output voltage for the corresponding change in load current in a 7805 IC regulator is defined asa) All of the mentionedb) Line regulationc) Load regulationd) Input regulationView Answer

Answer: cExplanation: Load regulation is defined as the change in output voltage for a change in load current and is also expressed in millivolts or as a percentage of output voltage.

9. An IC 7840 regulator has an output current =180mA and internal resistor =10Ω. Find the collector current in the output using the transistor specification: ß=15 and VEB(ON) =1.5v.a) 270mAb) 450mAc) 100mAd) 50mAView Answer

Answer: bExplanation: The collector current from transistor, IC= ßIB

Where, IB= IO-(VEB(ON)/R1) = 180mA-(1.5v-10Ω) = 0.03A.Therefore, IC= 15×0.03 = 0.45A = 450mA.

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10. How the average temperature coefficient of output voltage expressed in fixed voltage regulator?a) miilivolts/oCb) miilivoltsoCc) None of the mentionedd) oC/ miilivoltsView Answer

Answer: aExplanation: The temperature stability or average temperature coefficient of output voltage, is the change in the output voltage per unit change in temperature and expressed in miilivolts/oC.

11. In the circuit given below, let VEB(ON)=0.8v and ß=16. Calculate the output current coming from 7805 IC and collector current coming from transistor Q1 for a load of 5Ω.

a) IO =111mA, IC= 808mAb) IO =111mA, IC= 829mAc) IO =111mA, IC= 881mAd) IO =111mA, IC= 889mAView Answer

Answer: dExplanation: When load = 5Ω, IL= 5v/5Ω =1A. The voltage across R1 is 7Ω × 1A=7v. Since, IL is more than 100mA, the transistor Q1 turns on and supplies the extra current required.Therefore, IL =(ß+1)IO-[ß×(VEB(ON)/R1)IO = [IL/(ß+1)]+ [ß×(VEB(ON)/R1) = [1/(16+1)]+[16×(0.8/2Ω)] ≅111mA.=> IC=IL-IO=1A-111mA =889mA.

12. Calculate the output voltage for LM314 regulator. The current IADJ is very small in the order of 100µA. (Assume VREF=1.25v)

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a) 17.17vb) 34.25vc) 89.34vd) 23.12vView Answer

Answer: aExplanation: The output voltage, VO =VREF[1=(R2/R1)]+(IADJ×R2)=1.25Vin× [1+(3kΩ/240Ω)] +( 100µA×3kΩ )= 16.875 +0.3.=> VO=17.17v.

13. Compute the input voltage of 7805c voltage regulator with a current source that will deliver a 0.725A current to 65Ω, 10w load. (Assume reference voltage =5v)a) Vin = 84vb) Vin = 34vc) Vin = 54vd) Vin = 64vView Answer

Answer: cExplanation: VO=VREF+VL =VREF+(IL×RL) = 5v+(0.725A×65Ω) = 52.125v=> Input voltage, Vin = VO + dropout voltage = 52.125v+2v.=> Vin ≅54v.

14. Which of the following is not a characteristic of adjustable voltage regulators?a) Non-versatileb) Better performancec) Increased reliabilityd) None of the mentionedView Answer

Answer: aExplanation: Adjustable voltage regulators are versatile; it has improved over-load protection allowing greater output current over operating temperature range.

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Find out the resolution of 8 bit DAC/ADC?a) 562b) 625c) 256d) 265View Answer

Answer: cExplanation: The resolution is the value of LSBResolution =2n, where n-> number of bits∴ Resolution =28=256 possible output values.

2. Non-linearity in the output of converter is expressed ina) None of the mentionedb) Percentage of reference voltagec) Percentage of resolutiond) Percentage of full scale voltageView Answer

Answer: dExplanation: Non-linearity is the measure of deviation of actual output (ε) from the ideal straight line output (△). Therefore, it is expressed as percentage of full scale voltage (ε/△).

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3. A binary input 000 is fed to a 3bit DAC/ADC. The resultant output is 101. Find the type of error?a) Settling errorb) Gain errorc) Offset errord) Linearity errorView Answer

Answer: cExplanation: Offset error implies that the output of the DAC is not zero when the binary inputs are all zero.

4. How many equal intervals are present in a 14-bit D-A converter?a) 16383b) 4095c) 65535d) 1023View Answer

Answer: aExplanation: A 14-bit D-A converter has 2n-1 equal interval =214-1=16384-1=16383.

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5. Resolution of a 6 bit DAC can be stated asa) All of the mentionedb) 6-bit resolutionc) Resolution of 1.568% of full scaled) Resolution of 1 part in 63View Answer

Answer: aExplanation: Resolution of 6 bit DAC =VFS% /(2n-1) =(VFS×100)/(26-1) = 1.588% of VFS and the number of interval is 26-1=63.=> Thus, resolution of a 6 bit DAC can be stated as a resolution of 1 part in 63.

6. Find the resolution of a 10-bit AD converter for an input range of 10v?a) 97.7mvb) 9.77mvc) 0.977mvd) 977mvView Answer

Answer: bExplanation: Resolution (in volts) VFS /(2n -1)= 10 /(210 -1) =10/1023 =9.77mv.

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7. A good converter exhibits a linearity errora) Less than or equal to (1/2)LSBb) Greater than equal to (1/2)LSBc) Greater than or equal to (1/2)LSBd) None of the mentionedView Answer

Answer: dExplanation: A good converter exhibits a linearity error of less than ±(1/2)LSB.

8. The maximum deviation between actual and ideal converter output after the removal of error isa) Absolute accuracyb) Relative accuracyc) Relative /absolute accuracyd) LinearityView Answer

Answer: bExplanation: Relative accuracy is the maximum deviation after gain and offset error has been removed.

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9. A monotonic DAC is one whose analog output increases fora) Decreases in digital inputb) An increases in analog inputc) An increases in digital inputd) Decreases in analog inputView Answer

Answer: cExplanation: In a DAC, the analog input is converted into digital output. So, a monotonic DAC increases its analog output with increase in its digital output. For example, if the output decreases when input code change from 001 to 010, it is said to be a non-monotonic DAC.

10. All the commercially available DAC area) Monotonicb) Non-monotonicc) Either monotonic or non-monotonicd) None of the mentionedView Answer

Answer: aExplanation: All the commercially available DACs are monotonic because the linearity error never exceeds ± (1/2) LSB at each output level.

11. The time taken for the output to settle within a specified band of its final value is referred asa) Conversion timeb) Settling timec) Take off timed) All of the mentionedView Answer

Answer: bExplanation: Settling time represents the time taken for the output to settle within a specified band ± (1/2) LSB of its final value following a code change at the input (usually a full scale change).

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At what condition the digital to analog conversion is made?

a) Va > Vd

b) Va ≤ Vd

c) Va ≥ Vd

d) Va ≠ Vd

View Answer

Answer: bExplanation: When Va < Vd, the output of the comparator becomes low and the AND gate is disabled. This stops the counting at that time and the digital output of the counter represents the analog input voltage.

he Integrating type converters are used ina) Digital meterb) Panel meterc) Monitoring systemd) All of the mentionedView Answer

Answer: dExplanation: The Integrating type converters are used in application such as digital meter, panel meter and monitoring system where the conversion accuracy is critical.

4. In integrating type ADCs, thea) Input voltage is proportional to input averaged over the integration periodb) Output voltage is proportional to input averaged over the integration periodc) Output voltage is proportional to sum of input voltaged) Input voltage is proportional to sum of input voltageView Answer

Answer: bExplanation: Since the integrating type ADC do not require sample and hold circuit at the input.

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The change in input during conversion will not affect the output code and is proportional to the value of the input averaged over the integration period.

5. Which type of ADC is chosen for noisy environment?a) Successive approximation ADCb) Dual slopec) Charge balancing ADCd) All of the mentionedView Answer

Answer: cExplanation: The main advantage of these converters is that it is possible to transmit frequency even in noisy environment or in isolated form.

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6. How to overcome the drawback of the charge balancing ADC?a) By using precision integratorb) By using Voltage to frequency converterc) By using voltage comparatord) By using dual slope converterView Answer

Answer: dExplanation: Charge balancing ADC depend up on RC product whose value cannot be easily maintained with temperature and time. This is eliminated using dual slope ADC as it is independent of R, C and T.

7. Which among the following has long conversion time?a) Servo converterb) Dual ramp converterc) Flash converterd) None of the mentionedView Answer

Answer: bExplanation: The main disadvantage of dual slope ADC is the long conversion time. For instance, if 2n-T=1/50 is used to reject line pick-up, the conversion time will be 20ms.

8. In which application dual slop converter are used.a) Thermocoupleb) All of the mentionedc) Weighting scaled) Digital panel meterView Answer

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Answer: bExplanation: Dual slope converters are particularly suitable for accurate measurement of slow varying signals.

9. A dual slope has the following specifications:16bit counter; Clock rate =4 MHz; Input voltage=12v; Output voltage =-7v and Capacitor=0.47µF.If the counters have cycled through 2n counts, determine the value of resistor in the integrator.a) 60kΩb) 50kΩc) 120kΩd) 100kΩView Answer

10. A 12 bit dual ramp generation has a maximum output voltage of +12v. Compute the equivalent digital number for the analog signal of +6v.a) 1000000000b) 10000000000c) 1000000000000d) 100000000000View Answer

Answer: dExplanation: since Va =VR (N/2n) so the digital count N= 2n×(Va/VR)N= 212×(6/12v) = 4096×0.5 =2048.Binary equivalent for 2048 => 100000000000.

For the given circuit find the output voltage?

a) -5.625vb) -3.50vc) -4.375vd) -3.125vView Answer

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2. Which type of switches are not preferable for a simple weighted resistor DAC?a) Bipolar Transistorb) Voltage switchesc) MOSFETd) All of the mentionedView Answer

Answer: aExplanation: Bipolar transistor does not perform well as voltage switches and MOSFET, due to the inherent offset voltage when in saturation.

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3. The inverted R-2R ladder can also be operated ina) Inverted modeb) Current Modec) Voltage moded) Non inverted modeView Answer

Answer: bExplanation: The inverted mode R-2R ladder circuit works on the principle of summing current. Therefore, it is said to operate in current mode.

4. Which of among the following circuit is considered to be linear?a) Weighted Resistor type DACb) R-2R ladder type DACc) Inverter R-2R ladder DACd) All of the mentionedView Answer

5. Multiplying DAC usesa) Varying reference voltageb) Varying input voltagec) Constant reference voltaged) Constant input voltageView Answer

Answer: aExplanation: A digital to analog converter which uses a varying reference voltage is called a multiplying D-A converter.

6. Calculate the value of LSB and MSB of a 12-bit DAC for 10v?a) LSB =7.8mv, MSB =5vb) LSB =9.3mv, MSB =5vc) LSB =14.3mv, MSB =5v

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d) LSB =2.4mv, MSB =5vView Answer

Answer: dExplanation: LSB=1/2n=1/212=1/4096.For 10v range, LSB =10v/4096=2.4mv and MSB = (1/2)×full scale =(1/2)×10v =5v.

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7. A multiplying DAC is given a reference voltage VR = Vom cos2πft. Determine the output voltage?a) Vo(t) = Vom sin(2πft+180o)b) Vo(t) = Vom cos(2πft+180o)c) Vo(t) = Vom tan(2πft+180o)d) Vo(t) = Vom sec(2πft+180o)View Answer

Answer: bExplanation: Vo(t) = Vom cos2πft+180o. The 180ophase shift is added, since the VR is connected to inverting input terminal and Vom = 0v to (1-2-n)×Vim depends on the input code.

8. Multiplying digital to analog converters are used ina) All of the mentionedb) Digitally programmable filterc) Digitally programmable oscillatord) Digitally controlled audio attenuatorView Answer

Answer: dExplanation: In multiplying DAC, the output voltage is a fraction of the voltage representing the input digital code and the attenuator setting can be controlled by digital logic.

9. A 10-bit D/A converter have an output range from 0-9v. Calculate the output voltage produced when the input binary number is 1110001010.a) ±7.96vb) -7.96vc) 7.96vd) None of the mentionedView Answer

Answer: cExplanation: Vo=9v[(1×1/2)+ (1×1/22) +(1×1/23)+(0×1/24)+(0×1/25)+ (0×1/26)+(1×1/27)+(0×1/28)+(1×1/29)+( 0×1/210)]=9v×(0.5+0.25+0+0.125+7.8125×10-3+1.95 ×10-3) =9v×0.8547 =7.96v.

10. The basic step of a 8-bit DAC is 12.4mv.If the binary input 00000000 represents 0v. Determine the output, if the input is 101101111?

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a) 1.36vb) 2.27vc) 5.45vd) None of the mentionedView Answer

Answer: bExplanation: The output voltage for input 10110111 = 12.4mv ×[(1×27)+(0×26) + (1×25) + (1×24) + (0×23)+ (1×22) +(1×21)+ (1×20)] = 12.4× (128+32+16+4+2+1) =12.4mv×183=2.27v.

. Express the output voltage of digital to analog converter?a) Vo =KVFS(d12-1+d22-2+….dn2-n)b) Vo =VFS/k(d12-1+d22-2+….dn2-n)c) Vo =VFS(d12-1+d22-2+….dn2-n)d) Vo =K(d12-1+d22-2+….dn2-n)View Answer

Answer: aExplanation: The input is an n-bit binary word D and is combined with the reference voltage VR to give on analog output signal. Mathematically it is described asVo =KVFS(d12-1+d22-2+….dn2-n) where, K -scaling factor, VFS-full scale output voltage.

2. Why the switches used in weighted resistor DAC are of single pole double throw (SPDT) type?a) To connect the resistance to reference voltageb) To connect the resistance to groundc) To connect the resistance to either reference voltage or groundd) To connect the resistance to outputView Answer

Answer: cExplanation: SPDT are electronic switches controlled by a binary word. If the binary input to a switch is 1, it connects the resistance to the reference voltage and if the input is 0, the switch connects the resistor to ground.

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3. Determine the output current for an n-bit weighted resistor DAC?

a) (VR/R )× (do/2 +d1/22 + ……dn/2n)b) (VR/R )× (d1/21 +d2/22 + ……dn/2n)c) (VR/R )× (d0

2/2 +d12/22 + ……dn

2/2n)d) None of the mentionedView Answer

Answer: bExplanation: The output current, Io= I1+I2+….In

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Io= (VR/2R )×(d1) +(VR/22R)× (d2) ….+(VR/2nR )×(dn)Io =(VR/R)× (d1/21 +d2/22 + ……dn/2n).

4. In a D-A converter with binary weighted resistor, a desired step size can be obtained bya) Selecting proper value of VFS

b) Selecting proper value of Rc) Selecting proper value of RF

d) All of the mentionedView Answer

Answer: cExplanation: The size of the steps depends on the value of RF, provided that the maximum output voltage does not exceed the saturation level of an op-amp.

5. Determine the Full scale output in a 8-bit DAC for 0-15v range?a) Full scale output=15.1vb) Full scale output=15.2vc) Full scale output=14.5vd) Full scale output=14.94vView Answer

Answer: dExplanation: Full scale output = (Full scale voltage -LSB)= [15v-(15v/28)] = (15v-0.0586) = 14.94v.

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6. Pick out the incorrect statement “In a 3 bit weighted resistor DAC”a) Although the op-amp is connected in inverting mode, it can also be connected in non-inverting modeb) The op-amp simply work as a current to voltage converterc) The polarity of the reference voltage is chosen in accordance with the input voltaged) None of the mentionedView Answer

Answer: cExplanation: The polarity of the reference voltage is accordance with the type of the switch used. For example, in TTL switches, the reference voltage should be +5v and the output will be negative.

7. What is the disadvantage of binary weighted type DAC?a) Require wide range of resistorsb) High operating frequencyc) High power consumptiond) Slow switchingView Answer

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Answer: aExplanation: For better resolution of output, the input binary word length has to be increased. As the number of bit increases, the range of resistance value increases.

8. The smallest resistor in a 12 bit weighted resistor DAC is 2.5kΩ, what will be the largest resistor value?a) 40.96MΩb) 10.24MΩc) 61.44 MΩd) 18.43MΩView Answer

Answer: bExplanation: The largest resistor value for 12-bit DAC= 2n×R = 212×2.5kΩ = 4096×2.5kΩ =10.24MΩ.

9. CMOS inverter is used as SPDT switch in resistor DAC and is connected to the op-amp line. Find the output of CMOS, if the input applied is 1a) Resistance is connected to groundb) Resistance is connected to input linec) Resistance is connected to bit lined) None of the mentionedView Answer

10. How to overcome the limitation of binary weighted resistor type DAC?a) Using R-2R ladder type DACb) Multiplying DACsc) Using monolithic DACd) Using hybrid DACView Answer

Answer: aExplanation: Usage wide range of resistors is the limitation of binary weighted resistor type DAC, this can be avoided by using R-2R ladder type DAC Where only two value of resistor are required.

11. Find output voltage equation for 3 bit DAC converter with R and 2R resistor?a) Vo= -RF [(b2/8R) +(b1/4R) +(b0/2R)]b) Vo= -RF [(b2/R) +(b1/2R) +(b0/4R)]c) Vo= -RF [(b2/2R)+(b1/4R) +(b0/8R)]d) Vo= -RF [(b0/4R)+(b1/2R) +(b2/R)]View Answer

Answer: cExplanation: The output voltage corresponding to all possible combination of binary input in a 3-

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bit R-2R DAC is given asVo=-RF [(b2/2R) +(b1/4R) +(b0/8R)].