578 ieee transactions on ultrasonics, ferroelectrics, and frequency control, vol. 52, no. 4, april 2005

Letters

A Solution to the Charging Problems inCapacitive Micromachined Ultrasonic

Transducers

Yongli Huang, Edward O. Hæggstrom, Xuefeng Zhuang,Arif S. Ergun, Member, IEEE,

and Butrus T. Khuri-Yakub, Fellow, IEEE

Abstract—We report on a capacitive micromachinedultrasonic transducer (CMUT) featuring isolation posts(PostCMUT) as a solution to the charging problems causedby device fabrication and operation. This design improvesthe device reliability. The PostCMUTs were fabricated us-ing a newly developed process based on the wafer-bondingtechnique. Paired tests showed the superior reliability char-acteristics of the PostCMUT design compared to those ofconventional CMUT designs. No deleterious effect of thenew design was seen in preliminary ultrasonic tests or inprocess yield. PostCMUTs, a design that serves as a solu-tion to the aforementioned reliability problem, constitutesa major contribution to CMUT commercialization.

I. Introduction

Acapacitive micromachined ultrasonic transducer(CMUT) is a parallel plate capacitor with a rigid bot-

tom electrode and a top electrode residing on or within aflexible membrane [1]. A direct current (DC) bias voltage isapplied between the electrodes to deflect the membrane toan optimum position for CMUT operation. During trans-mission an alternating current (AC) signal is applied tothe transducer. The alternating electrostatic force betweenthe electrodes actuates the membrane in order to deliveracoustic energy into the medium surrounding the CMUT.During reception, the impinging acoustic wave vibrates themembrane, thus altering the capacitance between the elec-trodes. This capacitance change is detected.

Reliability problems in the electronic and mechanicalparts of micro-electro-mechanical systems (MEMS) de-vices constitute a commercialization barrier [2]–[5]. In thisregard, CMUTs are no exception. Single-crystal, silicon-membrane CMUTs built with the wafer-bonding tech-nique [1] show improved mechanical reliability and yieldcompared to surface micro-machined CMUTs [6]. How-ever, both types of CMUTs suffer from charging prob-lems [7] caused by charges trapped in the thin dielec-tric layer (e.g., silicon nitride or dioxide) used to insulatethe electrodes [4]. There are at least two sources of thesetrapped charges: the fabrication process and the strongelectrical field within the transducer cavities during opera-tion. Charges can be trapped in surface/interface states or

Manuscript received April 23, 2004; accepted September 22, 2004.The authors are with the Edward L. Ginzton Laboratory, Stanford

University, Stanford, CA 94305-4088 (e-mail: yongli@stanford.edu).

Fig. 1. (Top) Schematic cross section of (a) conventional CMUT and(b) PostCMUT cells. (Bottom) Photograph of part of 128-element,9-point PostCMUT array. The insert shows the magnification of asingle cell.

within the dielectric layer [2], [8], [9]. The cause and effectof trapped charges seen in CMUTs are similar to those seenin CMOS devices [10]. The trapped charges may shield theelectrode surface, thus causing unpredictable changes thatdepend on both frequency and amplitude of the appliedsignal, in the DC operating point and device performance[9]. Moreover, they also may create an electrostatic forcethat prevents the membrane from snapping back after col-lapse [7].

II. Design and Fabrication

We propose a new CMUT design (Fig. 1), with isola-tion posts as a solution to the charging problems. In thisdesign, one or a few isolation posts replace the isolationlayer used to prevent shorting between the CMUT elec-trodes during operation. We set out to solve the CMUTcharging problem by incorporating isolation posts into thedevice design. The height, location, size, and shape of theposts need to meet two criteria: to prevent shorting duringthe operation, and to make the transverse area of the oxideposts small enough so that charges trapped in them have anegligible effect on device operation. Different post designscan be used to optimize a PostCMUT (isolation posts) fora specific application. Due to limited space, we presentonly one design, the 9-point PostCMUT, to demonstratethat it solves the charging problem.

A new high-yield wafer-bonding technique with few pro-cess steps was used to fabricate the PostCMUTs. In thisprocess, the membrane shape is not determined by theshape of the cavities or the posts. The PostCMUTs werefabricated as described earlier [1], with one additionallithography step to pattern the silicon oxide layer using

0885–3010/$20.00 c© 2005 IEEE

huang et al.: a solution to charging problems in cmuts 579

a designed feature mask. Fig. 1 shows a 9-point (3 µm by3 µm) post pattern device. PostCMUTs with 1-µm thick,single-crystal silicon, 82-µm thick membranes, were fab-ricated. The oxide post height was 0.3 µm, compared tothe 1-µm deep cavity. Conventional CMUTs with identicalmembrane and cavity dimensions, but with a fully coveredoxide layer, (0.3 µm) were fabricated for comparison. Thetotal transverse oxide post area of the PostCMUTs was81 µm2. That is 1.2% of the oxide area of the conventionalCMUTs with 82-µm membranes. Each device had 86 ele-ments carrying 288 membranes per element, Fig. 1.

III. Experiment Results

Capacitance-bias voltage (CV) measurements were per-formed to characterize the CMUT reliability. In each ex-periment, pair-wise tests (one PostCMUT and one con-ventional CMUT) were performed under identical mea-surement conditions to ensure a fair comparison. AnHP33120A (Hewlett-Packard, Palo Alto, CA) signal gen-erator was used as the AC source in the CV measurements.We used a negative DC bias source (PS-310, Stanford Re-search Systems, Sunnyvale, CA) and the signal genera-tor to generate a 60 mV, 5 kHz AC signal (f). This fre-quency was chosen to get a “static-like” result from theAC measurement. An AC-coupled oscilloscope (HP In-finium 500 MHz) (Hewlett-Packard, Palo Alto, CA) digi-tized the signal from a voltage divider consisting of a resis-tor (150 kΩ) and the CMUT. The bias was either monoton-ically increased or decreased for the CV-curve recording.All of the capacitance measurements reported here werecarried out in air as it was found that no significant dif-ference was seen between the measurements performed inair and in oil.

Five consecutive CV measurements were made first foran untested conventional CMUT and an untested Post-CMUT to investigate initial charging caused by the fabri-cation process. Next, each device pair was connected to anultrasound pulser to receive a controlled spiking treatmentin the form of 0.5–120 h of −140 VAC 50 ns pulses gener-ated at 2 kHz repetition rate. The bias was 30 V duringthe treatment. The CV curves were remeasured post treat-ment and compared to the pretreatment data. After thepulse test, a classical far-field ultrasonic pitch-catch (PC)test was performed in oil using a broadband hydrophoneas receiver (PZT Z44-0400, Specialty Engineering Asso-ciates, Sunnyvale, CA), to show that the post design doesnot generate unexpected features in the ultrasonic perfor-mance of the device.

Charging was observed in all of the conventionalCMUTs tested.

• The CV-curve shape changed, rather than simplyshifting along the bias voltage axis, during the initialcycling tests due to a redistribution of the trappedcharges created during the fabrication, Fig. 2(a). Theshape change was most pronounced at high-bias volt-ages, probably because a strong electrical field can

Fig. 2. (a) Initial test CV-curve and CV-curve measured after fivetest cycles. (b) CV-curves of a conventional CMUT before and afterspiking treatment show that the induced charges prevent, perma-nently, the membrane from snapping back. (c) The CV-curve of aconventional CMUT shift after spiking treatment. (d) CV-curves ofa 9-point PostCMUT.

move charges from their current trap sites more effec-tively than a weak field. In most cases the CV curvebecame stable after 10 test cycles.

• The subsequent 80-h paired spiking treatment causedall of the conventional CMUT CV to shift along thebias axis (>20 V), Fig. 2(b) and (c), or caused perma-nent stiction of the membrane with the bottom elec-trode due to the field from induced charges trapped inthe oxide layer.

Charging was never observed in the PostCMUTs. TheirCV-curve shape was nearly identical in the initial test andin the pre- and post spiking test, Fig. 2(d). Neither trans-mission nor reception tests revealed charging. No hystere-sis (i.e., dependence of the measured capacitance on bothcurrent and previous bias voltages), was observed in theultrasonic tests after membrane-post contact. Thus, thePostCMUT design also remedied another problem withconventional CMUTs operating in the collapsed region,namely hysteresis [9]. The reduced hysteresis may be ex-plained in the following way: Hysteresis usually is due tocontact forces between contacting surfaces. When using aPostCMUT, there is no hysteresis evident in precontactmode, as is the case with a conventional CMUT. Aftercontact, unlike the conventional CMUT, the contact areaof the membrane and the post is independent of the biasvoltage, as is also the contact force between the membraneand the post. There is, of course, a slight hysteresis duringmembrane-post contact. This hysteresis is negligible dueto the small post size.

The ultrasonic performance of PostCMUTs was similarto that of conventional CMUTs. Thus, the posts did not

580 ieee transactions on ultrasonics, ferroelectrics, and frequency control, vol. 52, no. 4, april 2005

Fig. 3. Comparison of uncorrected pulse response of an ultrasonictransmission test. The insert shows transmission pulse of a Post-CMUT received by hydrophone with a step function input.

degrade the postCMUT performance. The time domainsignals and their spectra showed no unexpected features(Fig. 3) either before or after spiking.

IV. Conclusions

The results indicate that, by incorporating isolationposts into the CMUT design, it was possible to providea solution to the device-charging problem seen in con-ventional CMUTs. No deleterious side effects of the newdesign were observed in the ultrasonic tests. The Post-CMUTs were fabricated using a slight modification of a

newly developed process based on the wafer-bonding tech-nique. The PostCMUT design improved the reliability ofCMUTs and, hence, constitutes a major contribution toCMUT commercialization.

References

[1] Y. Huang, A. S. Ergun, E. Hæggstrom, M. H. Badi, andB. T. Khuri-Yakub, “Fabricating capacitive micromachined ul-trasonic transducers with wafer-bonding technology,” J. Micro-electromechan. Syst., vol. 12, no. 2, pp. 128–137, Apr. 2003.

[2] C. Goldsmith, J. Ehmke, A. Malczewski, B. Pillans, S. Eshel-man, Z. Yao, J. Brank, and M. Eberly, “Lifetime characteriza-tion of capacitive RF MEMS switches,” Microwave Symp. Di-gest, IEEE MTT-S Int., May 2001, pp. 227–230.

[3] J. DeNatale and R. Mihailovich, “RF MEMS Reliability,” in 12thInt. Conf. Solid State Sens. Actuators Microsyst., June 2003,pp. 943–946.

[4] J. R. Reid, “Capacitive switch reliability issues,” in Proc.Govt. Microcircuit Appl. Critical Tech. Conf. Digest Papers,Mar. 2002, pp. 48–51.

[5] M. W. Kowarz, D. Karns, B. E. Kruschwitz, and J. C. Brazas,Jr., “Method and system for actuating electro-mechanical ribbonelements in accordance to a data stream,” U.S. Patent 6,144,481,Nov. 7, 2000.

[6] X. C. Jin, I. Ladabaum, L. Degertekin, S. Calmes, and B. T.Khuri-Yakub, “Fabrication and characterization of surface mi-cromachined capacitive ultrasonic immersion transducers,” J.Microelectromechan. Syst., vol. 8, pp. 100–114, Mar. 1999.

[7] Y. Huang, E. Haeggstrom, B. Bayram, X. Zhuang, A. S. Ergun,C. H. Cheng, and B. T. Khuri-Yakub, “Collapsed regime oper-ation of capacitive micromachined ultrasonic transducers basedon wafer-bonding technique,” in Proc. IEEE Ultrason. Symp.,Oct. 2003, pp. 1161–1164.

[8] H. Amjadi, “Charge storage in double layers of silicon dioxideand silicon nitride,” in Proc. 9th Int. Symp. Electrets, Sep. 1996,pp. 22–27.

[9] J. R. Reid, “Simulation and measurement of dielectric chargingin electrostatically actuated capacitive microwave switches,” inProc. Modeling Simulation of Microsyst., San Juan, PuertoRico, April 2002, pp. 250–253.

[10] R. F. Pierret, Semiconductor Device Fundamentals. Reading,MA: Addison-Wesley, 1996.