Lesson Plan-VLSI Design

download Lesson Plan-VLSI Design

of 6

Transcript of Lesson Plan-VLSI Design

  • 8/12/2019 Lesson Plan-VLSI Design

    1/6

  • 8/12/2019 Lesson Plan-VLSI Design

    2/6

    DOC/LP/01/28.02.02

    LESSON PLAN

    LP EC2354

    LPRev. No: 00

    Date: 13/12/10

    Page 02 of 06Sub Coe/Na!e: EC2354"#LS$ DES$%N

    &'(t : $$ )*a'+, : EC Se!e-te*: #$

    &N$ $$ C$RC&$ CARACER$7A$ON AND S$&LA$ON

    Sabu-:

    Deay esti)ation, Lo%i"a effort and *ransistor si:in%, Po9er dissi(ation,

    Inter"onne"t, Desi%n )ar%in, 'eiabiity, S"ain%- SPIC t&toria, Dei"e

    )odes, Dei"e "#ara"teri:ation, Cir"&it "#ara"teri:ation, Inter"onne"t

    si)&ation.

    Obe+t(ve:

    *o st&dy t#e "ir"&it "#ara"teri:ation and (erfor)an"e esti)ation of CMOS

    te"#noo%y .

    Se--(o'

    No.

    o(+- to be +ove*e (!e Page

    No

    Ref

    1. Deay esti)ation-'C deay )ode, Linear

    deay )ode

    0) 111-

    11,2

    1,2

    1. Lo%i"a effort 0) 118,1 1,21. *ransistor si:in% 0) 118 1

    1. Po9er dissi(ation-stati" and dyna)i" (o9er 0) 127-1 1

    1. Inter"onne"t +sti)ation of resistan"e

    "a(a"itan"e, deay and "ross ta5

    0) 1-

    1,2

    1,2

    18. Desi%n )ar%in 0) 1-18 1

    17. 'eiabiity 0) 18-17 1

    20. S"ain% 0) 17,227 1,2

    21. SPIC t&toria, Dei"e )odes 0) 181-17 1

    22. Dei"e;Cir"&it "#ara"teri:ation, Inter"onne"tsi)&ation

    0) 17-21

    1

    2. CA*-1 ) - -

    DOC/LP/01/28.02.02

  • 8/12/2019 Lesson Plan-VLSI Design

    3/6

    LESSON PLAN

    LP EC2354

    LP Rev. No: 00

    Date: 13/12/10

    Page 03 of 06SubCoe/Na!e EC2354 "#LS$ DES$%N

    &'(t : $$$ )*a'+, : EC Se!e-te*: #$

    &N$ $$$ CO)$NA$ONAL AND SE8&EN$AL C$RC&$ DES$%N

    Sabu-:

    Cir"&it fa)iies +Lo9 (o9er o%i" desi%n + "o)(arison of "ir"&it fa)iies +

    Se

  • 8/12/2019 Lesson Plan-VLSI Design

    4/6

    DOC/LP/01/28.02.02

    LESSON PLAN LP EC2354LP Rev. No: 00

    Date:13/12/10Page 04 of 06

    Sub Coe/Na!e: EC2354 "#LS$ DES$%N

    &'(t : $# )*a'+, : EC Se!e-te*: #$

    &N$ $# COS ES$N%

    Syab&s

    $eed for testin%- *esters, *e>t fi>t&res and test (ro%ra)s- Lo%i" erifi"ation-

    Sii"on deb&% (rin"i(es- Man&fa"t&rin% test + Desi%n for testabiity +

    3o&ndary s"an.

    Obe+t(ve:*o &nderstand t#e "on"e(ts of CMOS testin%

    Se--(o'

    No.

    o(+- to be +ove*e (!e Page No Ref

    . $eed for testin% 0) 1- 1

    . *e>t fi>t&res and test (ro%ra)s 0) -0 1

    . Lo%i" erifi"ation- Sii"on

    deb&% (rin"i(e

    0) 1- 1

    . Man&fa"t&rin% test 100) ,21,27 1,2,

    8. Desi%n for testabiity-ad#o" tesin% 0) 8-0 17. S"an desi%n 0) 0- 1

    0. 3&it in sef test,IDD? testin% 0) -8 1

    1. 3o&ndary s"an 0) 7-0 1

    2. CA*-2 ) - -

  • 8/12/2019 Lesson Plan-VLSI Design

    5/6

    DOC/LP/01/28.02.02

    LESSON PLAN LP EC2354

    LP Rev. No: 00

    Date: 13/12/10Page 05 of 06

    SubCoe/Na!e: EC2354 " #LS$ DES$%N

    &'(t : # )*a'+, : EC Se!e-te*: #$

    &N$ # SPEC$9$CA$ON &S$N% #ER$LO% DL

    Syab&s

    3asi" "on"e(ts- identifiers- %ate (ri)ities, %ate deays, o(erators, ti)in%

    "ontros,(ro"ed&ra assi%n)ents "onditiona state)ents, Data fo9 and '*L,

    str&"t&ra %ate ee,s9it"# ee )odein%, Desi%n #ierar"#ies, 3e#aiora and

    '*L )odein%, *est ben"#es,Str&"t&ra %ate ee des"ri(tion of de"oder,

    e

  • 8/12/2019 Lesson Plan-VLSI Design

    6/6

    DOC/LP/01/28.02.02

    LESSON PLAN LP EC2354LP Rev. No: 00

    Date:13/12/10Page 06 of 06

    SubCoe/Na!e: EC2354"#LS$ DES$%N

    )*a'+, : EC Se!e-te*: #$

    Cou*-e De(ve* Pa':

    @ee51 2 8 7 10 11 12 1 1

    I II I II I II I II I II I II I II I II I II I II I II I II I II I

    =nits

    1 1 1 1 1 1 2 2 2 2 2

    C

    A

    *

    1

    5C

    A

    *

    2

    C

    A

    *

    E )OO;S:

    1. @este and Harris CMOS !LSI DSI6$ *#ird editionB Pearson d&"ation, 200

    2. =ye)&ra 4.P Introd&"tion to !LSI "ir"&its and syste)s, @iey 2002.

    RE9ERENCES:

    . D.A P&"5ne ; .s#ra%#ian 3asi" !LSI Desi%n, *#ird edition, PHI, 200

    . @ayne @of, Modern !LSI desi%n, Pearson d&"ation, 200

    . M.4.S.S)it# A((i"ation s(e"ifi" inte%rated "ir"&its, Pearson d&"ation, 177

    . 4.3#as5er !erio% HDL (ri)er, 3S (&bi"ation,2001

    . Cietti Adan"ed Di%ita Desi%n 9it# t#e !erio% HDL, Prenti"e Ha of India, 200

    8.Sa)ir (anit5ar, !erio% HDL , Pearson d&"ation,se"ond edition

    P*ea*e b A*ove b

    Na!e .AN&SA P*of.E.% .%ov('a'

    De-(g'at(o' A--t" *ofe--o* OD< Dea*t!e't of EC

    Date