Lecture11 Decoders

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    14/11/2013

    Combinational Logic Design

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    Fall 2013 EC381/Digital Systems I 2

    Topics

    ! Decoders! Encoders! Priority Encoders

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    Fall 2013 EC381/Digital Systems I 3

    Decoders!Typically ninputs and 2noutputs!Drives high the output corresponding to

    binary code of input

    74139

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    Fall 2013 EC381/Digital Systems I 4

    2-to-4 Line Decoder

    ! Notice they are minterms

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    Fall 2013 EC381/Digital Systems I 5

    Truth Table, 3-to-8 Decoder

    !Notice they are minterms

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    Fall 2013 EC381/Digital Systems I 6

    3-to-8 Line Decoder Schematic

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    Fall 2013 EC381/Digital Systems I 7

    2-to-4 with Enable

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    Fall 2013 EC381/Digital Systems I 8

    Enable Used for Expansion

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    Fall 2013 EC381/Digital Systems I 9

    VariationsSometimes, in implementation decoders are done with NANDgates rather than AND gates.With NAND gates, the table illustrating the decoder

    operation would look like this:

    So pay attention In using a decoder, it is useful to know

    when the output is intended to be active high, or activelow!

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    Decoder Expansion

    ! A 2-to-4 Line decoder requires 4 (2-input)AND gates! A 3-to-8 line decoder requires 8(3-input)AND gates! If we want to design a 6-to-64 line decoder then we

    will need?

    ! 64(6-input)AND gates!! Unfortunately, as decoders become larger, this

    approach gives a high gate input count!

    ! If we have decoders with enables, we can usemultiple, small decoders to implement largerdecoders.

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    Decoder Expansion: Example

    !4to16 decoder Using 3to8decoders

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    Decoder Expansion Example! When w =0, the

    topdecoder isenabled and the

    other is disabled.! The bottom

    decoder outputsare all 0s, andthe top eightoutputs generate

    minterms! 0000 to 0111.

    When w =1, theenable conditionsare reversed

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    Example decoder tree: 4to16

    decoder Using 2

    to

    4 decoders

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    Uses for Decoders

    !Implement logic circuits!!Memory address lines!Decoders are used in Micro

    Computer Interfacing forKeyboard and Displayapplications.

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    Decoder generates appropriateminterm based on control signals

    (it "decodes" control signals)

    Decoders as General-purpose Logic

    ! n:2ndecoder implements any function of n variables" With the variables used as control inputs" Enable inputs tied to 1 and" Appropriate minterms summed to form the function

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    Decoders as General-purpose

    Logic! Example: Implement the following boolean functions

    1. S(x,y,z) = SUM(m(1,2,4,7))2. C(x,y,z) = SUM(m(3,5,6,7))

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    F1

    Example

    ! F1 = A' B C' D + A' B' C D + A B C D

    A B

    0 A'B'C'D'

    1 A'B'C'D

    2 A'B'CD'

    3 A'B'CD4 A'BC'D'

    5 A'BC'D

    6 A'BCD'

    7 A'BCD

    8 AB'C'D'

    9 AB'C'D

    10 AB'CD'

    11 AB'CD

    12 ABC'D'

    13 ABC'D

    14 ABCD'

    15 ABCD

    4:16

    DECEnable

    C D

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    Encoder

    ! Encoder is the opposite of decoder! 2ninputs!

    n outputs

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    Truth Table

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    Inputs are Minterms

    A0= D1+ D3+ D5+ D7

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    Whats the Problem?! What if D3 and D6 both high?! Simple OR circuit will set A to 7! Solution?

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    Priority Encoder! Chooses one with highest priority

    " Largest number, usually! Note dont cares

    What if all inputs are zero?

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    Priority Encoder

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    K Map for a priority encoder

    !X on input means we must satisfy forboth possibilities: 0, 1

    Valid (V) is OR

    of inputs

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    K Map for a priority encoder

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    Logic Diagram of a 4-input Priority

    Encoder

    X

    Y