Lecture on Computer Components - Top Level View

45
COMPUTER SYSTEM ORGANIZATION

Transcript of Lecture on Computer Components - Top Level View

Page 1: Lecture on Computer Components - Top Level View

COMPUTER SYSTEM

ORGANIZATION

Page 2: Lecture on Computer Components - Top Level View

Computer System

• Computer →it is as fast electronic

calculating device that accept digitized information, process it according to a list of internally store instruction and produce an output or useful information to the outside world.

Page 3: Lecture on Computer Components - Top Level View

• Computer System →it refers to the computer

organization and architecture.

Elements of Computer System: 1. Hardware 2. Software 3. People ware/ users

Page 4: Lecture on Computer Components - Top Level View

• Components of ComputerInput/Output Unit (I/O unit) → supervise and monitor the

function performed by the microcomputer and external devices.

a) Input Device → computer accept coded

information through input unit which read the data.

Examples: Keyboard, mouse, etc.

Page 5: Lecture on Computer Components - Top Level View

b) Output Device → its function is to send

processed result to the outside world.

•Memory → consists of large number of data locations that stores both the data and the program that are currently used by the CPU.

Page 6: Lecture on Computer Components - Top Level View

• Central Processing Unit (CPU) → control the sequence of all information exchanges within the computer and the outside world.

a) Control Unit → the memory ALU and

input/output units store and process information and perform input/output operations. It acts like the supervisor seeing that the things are done in proper fashion.

Page 7: Lecture on Computer Components - Top Level View

The control unit determines the sequence in which computer programs and instruction are executed.

b) Arithmetic and Logic Unit (ALU)

→ most computer operations are executed in this unit.

Page 8: Lecture on Computer Components - Top Level View

Bus Structure

1. Single Bus Structure

Figure 1.3. Single-bus structure.

MemoryInput Output Processor

Page 9: Lecture on Computer Components - Top Level View

2) Two-Bus Structure

input

cpu memory

output

Page 10: Lecture on Computer Components - Top Level View

Von Neumann Architecture→ known as three bus-system

DATA BUS

MEMORY CPU I/O UNIT

ADDRESS BUS

Control

Bus Bus

Page 11: Lecture on Computer Components - Top Level View

DATA BUS – it carries the information being transmitted

ADDRESS BUS – it identifies where the information is being sent

CONTROL BUS – it describes aspects of how the information is being sent, and in what manner

SYSTEM BUS

A shared pathway, a set of wire or physical path that serves to interconnect the registers, I/O unit, CPU and the memory unit

Page 12: Lecture on Computer Components - Top Level View

Harvard Architecture

Program Memory CPU

Data Memory

Program

Address Address

Data

Page 13: Lecture on Computer Components - Top Level View

The Harvard Architecture uses physically separate memories for their instruction and data, required dedicated buses for each of them. Instructions and operands can therefore be fetched simultaneously.

Different program and data widths are possible allowing program and data memory to be better optimized to the architectural.

Page 14: Lecture on Computer Components - Top Level View

Harvard Architecture are frequently Harvard Architecture are frequently used in:used in:

→ specialized digital signal processor commonly used in audio or video processing products. → electronic application such as the PIC (programmable interface controller/ programmable intelligent computer).

Page 15: Lecture on Computer Components - Top Level View

Basic Structures of Computer• Functional Units• Basic Operational Concepts• Bus structures

Page 16: Lecture on Computer Components - Top Level View

Content Coverage

Page 17: Lecture on Computer Components - Top Level View

Functional Units

Computer consists of three main parts:

• Processor (CPU)• Main-memory system• I/O system

Page 18: Lecture on Computer Components - Top Level View

The information handled by a computer:

• Instruction → Govern the transfer information

within a computer as well as between the computer and its I/O devices. → Specify the arithmetic and logic operations to be performed.

• Data → Numbers and encoded characters that are used as operands by the instructions.

Page 19: Lecture on Computer Components - Top Level View

Programs→it is a list of instructions that performs a task.

• The program usually is stored in a memory called program memory.

• The computer is completely controlled by the stored program, except for possible external interruption by an operator or by I/O devices connected to the machine.

• Information handled by a computer must be encoded in a suitable format. Most present-day hardware employs digital circuits that have only two stable states, 0 (OFF) and 1 (ON).

Page 20: Lecture on Computer Components - Top Level View

Memory UnitMemory

The storage area in which programs are kept when they are running and that contains the data needed by the running programs.

Types of memory:• Volatile memory → storage that retains data

only if it is receiving power, such as dynamic random access memory (DRAM).

• Nonvolatile memory → a form of memory that retains data even in the absence of a power source and that is used to store programs between runs, such as flash memory.

Page 21: Lecture on Computer Components - Top Level View

Two Classes of Storage:• Primary memory

→ Also called main memory. Volatile memory used to hold programs while they are running; typically consists of DRAM in today’s computers.

• Secondary memory → Nonvolatile memory used to store programs and data between runs; typically consists of magnetic disks in today’s computers.

Page 22: Lecture on Computer Components - Top Level View

SECONDARY MEMORY

PRIMARYMEMORY

CACHE

REGISTERS

SizeMemoryAccess Time

Page 23: Lecture on Computer Components - Top Level View

• The storage cells are processed in groups of fixed size called words.

• The number of bits in each word is often referred to as the word length of the computer

• Typical word length from 16 to 64 bits• The capacity of the memory is one factor

that characterizes the size of a computer• The time required to access one word is

called the memory access time.

Page 24: Lecture on Computer Components - Top Level View

Operation of Memory

• Each memory location has a unique address

• Address from an instruction is copied to the MAR which finds the location in memory

• CPU determines if it is a store or retrieval

• Transfer takes place between the MDR and memory

• MDR is a two way register

Page 25: Lecture on Computer Components - Top Level View

Memory Capacity

• Determined by two factors 1. Number of bits in the MAR

• LMC = 100 (00 to 99)• 2K where K = width of the register in bits

2. Size of the address portion of the instruction

• 4 bits allows 16 locations• 8 bits allows 256 locations• 32 bits allows 4,294,967,296 or 4 GB

• Important for performance– Insufficient memory can cause a processor

to work at 50% below performance

Page 26: Lecture on Computer Components - Top Level View

CPU: Three (3) Major Components• Arithmetic Logic Unit(ALU)

• Control Unit (CU)• Registers

– Example: Program counter (PC) or instruction pointer determines next instruction for execution

Page 27: Lecture on Computer Components - Top Level View

Arithmetic and Logic Unit (ALU)

• Most computer operations are executed in ALU of the processor.

• Load the operands into memory – bring them to the processor – perform operation in ALU – store the result back to memory or retain in the processor.

• Registers• Fast control of ALU

Page 28: Lecture on Computer Components - Top Level View

Control Unit• All computer operations are controlled by the

control unit.• The timing signals that govern the I/O

transfers are also generated by the control unit.

• Control unit is usually distributed throughout the machine instead of standing alone.

Operations of a computer: Accept information in the form of programs and

data through an input unit and store it in the memory

Fetch the information stored in the memory, under program control, into an ALU, where the information is processed

Output the processed information through an output unit

Page 29: Lecture on Computer Components - Top Level View

• Small, permanent storage locations within the CPU used for a particular purpose

• Manipulated directly by the Control Unit• Wired for specific function• Size in bits or bytes (not MB like

memory) • Can hold data, an address or an

instruction• How many registers does the LMC

have?

Registers

Page 30: Lecture on Computer Components - Top Level View

Computer Components: Top Level View

Page 31: Lecture on Computer Components - Top Level View

Special-Purpose Registers

• Program Count Register (PC)– Also called instruction pointer

• Instruction Register (IR)– Stores instruction fetched from memory

• Memory Address Register (MAR)• Memory Data Register (MDR) • Status Registers

– Status of CPU and currently executing program

– Flags (one bit Boolean variable) to track condition like arithmetic carry and overflow, power failure, internal computer error

Page 32: Lecture on Computer Components - Top Level View

Relationship between MAR, MDR and Memory

Address Data

Page 33: Lecture on Computer Components - Top Level View

MAR-MDR Example

Page 34: Lecture on Computer Components - Top Level View
Page 35: Lecture on Computer Components - Top Level View

Instruction Cycle• Two steps:

– Fetch– Execute

Page 36: Lecture on Computer Components - Top Level View

Fetch Cycle• Program Counter (PC) holds address

of next instruction to fetch• Processor fetches instruction from

memory location pointed to by PC• Increment PC

– Unless told otherwise

• Instruction loaded into Instruction Register (IR)

• Processor interprets instruction and performs required actions

Page 37: Lecture on Computer Components - Top Level View

Execute Cycle• Processor-memory

– data transfer between CPU and main memory

• Processor I/O– Data transfer between CPU and I/O

module

• Data processing– Some arithmetic or logical operation on

data

• Control– Alteration of sequence of operations– e.g. jump

• Combination of above

Page 38: Lecture on Computer Components - Top Level View

Characteristics of Hypothetical Machine

Page 39: Lecture on Computer Components - Top Level View
Page 40: Lecture on Computer Components - Top Level View
Page 41: Lecture on Computer Components - Top Level View

1. PC -> MAR Transfer the address from the PC to the MAR

2. MDR -> IR Transfer the instruction to the IR

3. IR(address) -> MAR Address portion of the instruction loaded in MAR

4. MDR -> A Actual data copied into the accumulator

5. PC + 1 -> PC Program Counter incremented

LOAD FETCH /EXECUTE CYCLE

Page 42: Lecture on Computer Components - Top Level View

1. PC -> MAR Transfer the address from the PC to the MAR

2. MDR -> IR Transfer the instruction to the IR

3. IR(address) -> MAR Address portion of the instruction loaded in MAR

4. A -> MDR* Accumulator copies data into MDR

5. PC + 1 -> PC Program Counter incremented

*Notice how Step #4 differs for LOAD and STORE

STORE FETCH /EXECUTE CYCLE

Page 43: Lecture on Computer Components - Top Level View

1. PC -> MAR Transfer the address from the PC to the MAR

2. MDR -> IR Transfer the instruction to the IR

3. IR(address) -> MAR Address portion of the instruction loaded in MAR

4. A + MDR -> A Contents of MDR added to contents of accumulator

5. PC + 1 -> PC Program Counter incremented

ADD FETCH /EXECUTE CYCLE

Page 44: Lecture on Computer Components - Top Level View

SUBTRACT

PC MAR

MDR IR

IR[addr] MAR

A – MDR A

PC + 1 PC

IN

PC MAR

MDR IR

IOR A

PC + 1 PC

OUT

PC MAR

MDR IR

A IOR

PC + 1 PC

HALT

PC MAR

MDR IR

BRANCH

PC MAR

MDR IR

IR[addr] PC

BRANCH on Condition

PC MAR

MDR IR

If condition false: PC + 1 PC

If condition true: IR[addr] PC

Page 45: Lecture on Computer Components - Top Level View

Ex. Suppose that the following instructions are found at

the given locations in memory: 17 LDA 90 18 ADD 91 90 1000 91 3020

Show the contents of each register as each step of the fetch-execute cycle performed for instruction at address 17.  PC MAR MDR IR APC MAR 17 17 000 000 0000MDR IR 17 17 590 590 0000IR[address] MAR 17 90 590 590 0000MDR A 17 90 1000 590 1000PC + 1 PC 18 90 1000 590 1000