Lecture No. 14 Combinational Functional Devices svbitec.wordpress.com.

Lecture No. 14

Combinational Functional Devices

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Digital Logic &Design

Vishal Jethva

Lecture 14

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Recap

Odd-Prime Number Detector Circuit Using Quine-McCluskey Method

Combinational Logic Implemented in SOP and POS form Design and Implementation Steps Timing Diagram Active High/Low inputs/outputs


Odd-Parity Function

Input Output Input Output

D3 D2 D1 D0 P D3 D2 D1 D0 P

0 0 0 0 1 1 0 0 0 0

0 0 0 1 0 1 0 0 1 1

0 0 1 0 0 1 0 1 0 1

0 0 1 1 1 1 0 1 1 0

0 1 0 0 0 1 1 0 0 1

0 1 0 1 1 1 1 0 1 0

0 1 1 0 1 1 1 1 0 0

0 1 1 1 0 1 1 1 1 1


SOP Expression SImplification

D3D2\D1D0

00 01 11 10

00 1 0 1 0

01 0 1 0 1

11 1 0 1 0

10 0 1 0 1


Simplifying Expression

DCBADCBAABCDDCABDBCADCBACDBADCBA

)()()()( DCDCBACDDCABDCDCBACDDCBA

)()()()( DCDCBADCDCBACDDCABCDDCBA

))(())(( BABADCDCABBACDDC

))(())(( BADCBADC )( YXXYYX

)()( DCBA


Odd-Parity Generator Circuit

A

DC

B P


Operation of Odd-Parity circuit

A

B

C

D

P

t0 t1 t2 t3 t4 t5 t6 t7 t8


XOR & XNOR Gates

XOR function

XNOR function

BABA

ABBA


XOR Gate

A

BF


XNOR Gate

A

BF


Combinational Functional Devices

Comparators BCD to 7-Segment Parity Generator Circuit


Half & Full Adders

Half Adder Full Adder


Half & Full Adders

A

B

Cout

Inpu

t Bits

Out

put B

its

Half-Adder

A

B

Cin

CoutIn

put B

its

Out

put B

its

Full-Adder


Half-Adder

Function Table Expression Logic Circuit


Half-Adder Function Table

Input Output

A B Sum Carry Out

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1


Half-Adder Circuit

A

B

Cout

BABABASum ABCarryOut


Full-Adder

Function Table Expression Logic Circuit


Full-Adder Function Table

Input Output

A B Carry In (C)

Sum Carry Out

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1svbitec.wordpress.comsvbitec.wordpress.com

Sum Expression

ABCCBACBACBASum

)()( BCCBACBCBASum

)()( CBACBASum

CBASum


Carry Out Expression

ABCCABCBABCACarryOut

)()( CCABBABACCarryOut

ABBACCarryOut )(


Full-Adder Circuit

A

B

Cout

C

CBASum ABBACCarryOut )(


Full-Adder

Full-Adder = Half-Adder + Half-Adder


Full-Adder based on Two Half-Adders

A

B

Cout

Half-Adder

A

B

Cout

Half-Adder

Cin

A

B

Cout


Parallel Binary Adder

Multiple Single bit Full-Adder connected in Parallel


4-bit Parallel Adder

ABC

in

Cou

t

ABC

in

Cou

t

ABC

in

Cou

t

ABC

in

Cou

t

A0B0A1B1A2B2A3B3

S0S1S2S3Cout

0


Carry Propagation

Carry Ripple Look-Ahead Carry Circuits


Look-Ahead Carry Circuit

A

B

Cout

Cin

P

G


Sum & Carry Expressions

CPSum

GCPCarryOut


Carry Expressions

0100112 CPPGPGC

0001 GPCC

100011112 )( GGPCPGPCC

0321003211322334 CPPPPGPPPGPPGPGC

nnn BAP nnn BAG

201001122223 )( GCPPGPGPGPCC

02100211223 CPPPGPPGPGC


Look-Ahead Carry Generator

A0

B0

P0

G0

A1

B1

P1

G1

A2

B2

P2

G2

A3

B3

P3

G3

Look-AheadCarry

Generator

C0

P0

C0

S0

P1

C1

S1

P2

C2

S2P2

C2

S3

P3

C3

C4svbitec.wordpress.comsvbitec.wordpress.com

MSI-Adders

74LS83A 74LS283 16-pin ICs 4-bit A input 4-bit B input 4-bit Sum output 1-bit Carry in 1-bit Carry Out


12-bit Parallel Adder

74LS283

Sum (8-11)

A (8-11) B (8-11)

74LS283

Sum (4-7)

B (4-7)

74LS283

Sum (0-3)

B (0-3)A (4-7) A (0-3)

C0=0C4C8C12


Lecture No. 14 Combinational Functional Devices svbitec.wordpress.com.

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