Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.
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Transcript of Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.
![Page 1: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/1.jpg)
Lecture 5
Block Diagrams
Modes of Operation of
Block Ciphers
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ECE 448 – FPGA and ASIC Design with VHDL
Modes of Operationof Block Ciphers
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Block vs. stream ciphers
Stream cipher
Internal state - ISBlock cipher
KK
M1, M2, …, Mn m1, m2, …, mn
C1, C2, …, Cn c1, c2, …, cn
Ci=fK(Mi) ci = fK(mi, ISi) ISi+1=gK(mi, ISi)
Every block of ciphertext is a function of only one
corresponding block of plaintext
Every block of ciphertext is a function of the current block
of plaintext and the current internal state of the cipher
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Typical stream cipher
Sender Receiver
PseudorandomKeyGenerator
mi
plaintext
ci
ciphertext
kikeystream
keyinitialization vector (seed)
PseudorandomKeyGenerator
mi
plaintext
ci
ciphertext
ki keystream
key initializationvector (seed)
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Standard modes of operation of block ciphers
Block cipher Block cipherturned into
a stream ciphers
ECB mode Counter modeCFB modeCBC mode
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ECB (Electronic CodeBook) mode
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Electronic CodeBook Mode – ECBEncryption
M1 M2 M3
E
Ci = EK(Mi) for i=1..N
MN-1 MN
E E E E. . .
C1 C2 C3 CN-1 CN
K K K K K
![Page 8: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/8.jpg)
Electronic CodeBook Mode – ECBDecryption
C1 C2 C3
D
Mi = DK(Ci) for i=1..N
CN-1 CN
D D D D. . .
M1 M2 M3 MN-1 MN
K K K K K
![Page 9: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/9.jpg)
Electronic CodeBook Mode – ECB(simplified block diagram)
EK
IN
OUT
Ci
Mi
DK
IN
OUT
Ci
Mi
Ci = EK(Mi)
Mi = DK(Ci)
![Page 10: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/10.jpg)
Electronic CodeBook Mode – ECB(combined block diagram)
EK
IN
OUT
DK
IN
OUT
bdo
bdi
bdi = Mi for Encryption Ci for Decryption
bdo = Ci for Encryption Mi for Decryption
![Page 11: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/11.jpg)
Counter Mode
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Counter Mode - CTREncryption
m1m2 m3
E
ci = mi ki
ki = EK(IV+i-1) for i=1..N
mN-1 mN
. . .
E E E E. . .
c1 c2 c3 cN-1 cN
IV IV+1 IV+2 IV+N-2 IV+N-1
k1k2 k3
kN-1 kN
K K K K K
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Counter Mode - CTRDecryption
c1c2 c3
E
mi = ci ki
ki = EK(IV+i-1) for i=1..N
cN-1 cN
. . .
E E E E. . .
m1 m2 m3 mN-1 mN
IV IV+1 IV+2 IV+N-2 IV+N-1
k1k2 k3
kN-1 kN
K K K K K
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Counter Mode – CTR(simplified block diagram)
EK
IN
OUT
counter
IV
ci
mi
EK
IN
OUT
counter
IV
ci
mi
IS1 = IVci = EK(ISi) mi
ISi+1 = ISi+1
IS1 = IVmi = EK(ISi) ci
ISi+1 = ISi+1
ISi ISi
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Counter Mode – CTR(combined block diagram)
EK
IN
OUT
counter
IV
bdo
bdi
ISi
bdi = mi for Encryption ci for Decryption
bdo = ci for Encryption mi for Decryption
![Page 16: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/16.jpg)
CFB (Cipher FeedBack) Mode
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Cipher Feedback Mode - CFBEncryption
m1 m2 m3
E
mN-1 mN
. . .
E E E E. . .
c1 c2 c3 cN-1 cN
IV
ci = mi ki
ki =EK(ci-1) for i=1..N, and c0 = IV
k1 k2 k3 kN-1kN
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Cipher Feedback Mode - CFBDecryption
m1 m2 m3
E
mN-1 mN
. . .
E E E E. . .
c1 c2 c3 cN-1 cN
IV
mi = ci ki
ki =EK(ci-1) for i=1..N, and c0 = IV
k1 k2 k3 kN-1kN
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Cipher Feedback Mode – CFB(simplified block diagram)
EK
IN
OUT
ci
mi
EK
IN
OUT
ci
mi
IV
IS1 = IVci = EK(ISi) mi
ISi+1 = ci
IV
ISi ISi
register register
IS1 = IVmi = EK(ISi) ci
ISi+1 = ci
![Page 20: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/20.jpg)
Cipher Feedback Mode – CFB(combined block diagram)
EK
IN
OUT
bdo
bdi
IV
ISi
register
bdi = mi for Encryption ci for Decryption
bdo = ci for Encryption mi for Decryption
bdi
![Page 21: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/21.jpg)
CBC (Cipher Block Chaining) Mode
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Cipher Block Chaining Mode - CBCEncryption
m1 m2 m3
E
IV
ci = EK(mi ci-1) for i=1..N c0=IV
mN-1 mN
. . .
E E E E. . .
c1 c2 c3cN-1
cN
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Cipher Block Chaining Mode - CBCDecryption
mi = DK(ci) ci-1 for i=1..N c0=IV
m1 m2 m3 mN-1 mN
IV . . .
D D D D D. . .
c1 c2 c3cN-1
cN
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Cipher Block Chaining Mode – CBC(simplified block diagram)
EK
IN
OUT
ci
mi
DK
IN
OUT
ci
mi
IV
IS1 = IVci = EK(ISi mi)
ISi+1 = ci
IS1 = IVmi = DK(ci) ISi
ISi+1 = ci
IV
ISi
ISi
register
register
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Cipher Block Chaining Mode – CBC(combined block diagram)
EK
IN
OUT
DK
IN
OUT
IV
ISi
register
ci
bdi
bdo
bdi
bdi
![Page 26: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/26.jpg)
ECE 448 – FPGA and ASIC Design with VHDL
Advanced Encryption Standard (AES)
Pseudocode
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AES Encryption
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AES Decryption
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ECE 448 – FPGA and ASIC Design with VHDL
AES: Symbols, Block Diagrams,
Interfaces
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AES_Enc
•Encryption Only•Key scheduling done as a part of initialization
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Symbol
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Block Diagram – AES_Enc
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Block Diagram – Round
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Block Diagram – KeyUpdate
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AES_Enc: Interface with the Division into the Datapath and Controller
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AES_Enc_KOF
•Encryption Only•Key scheduling done On the Fly
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Symbol
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Block Diagram – AES_Enc_KOF
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Block Diagram – Round
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Block Diagram – KeyUpdate
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AES_Enc_KOF: Interface with the Division into the Datapath and Controller
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AES_EncDec
•Encryption and Decryption•Key scheduling done as a part of initialization
![Page 43: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/43.jpg)
Symbol
![Page 44: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/44.jpg)
Block Diagram – AES_EncDec
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Block Diagram – Round
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Block Diagram – InvRound
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Block Diagram – KeyUpdate
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AES_EncDec: Interface with the Division into the Datapath and Controller
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ECE 448 – FPGA and ASIC Design with VHDL
Example of a HierarchicalBlock Diagram
JH hash function
![Page 50: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/50.jpg)
Top Level
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R8/R6
![Page 52: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/52.jpg)
L
![Page 53: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/53.jpg)
ECE 448 – FPGA and ASIC Design with VHDL
Example of a HierarchicalBlock Diagram
BLAKE hash function
![Page 54: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/54.jpg)
Top Level
![Page 55: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/55.jpg)
Permute8
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Core8
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G_mod
![Page 58: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/58.jpg)
ECE 448 – FPGA and ASIC Design with VHDL
Interface ofCipherCore
Datapath
![Page 59: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/59.jpg)
59
Block Diagram of AEAD
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Input Ports
(nonce, IV)
(only few candidates)
(AD, M, C)(we will not use it)
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ECE 448 – FPGA and ASIC Design with VHDL
Timeline
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Thursday 10/15, 12 noon:
First draft of block diagrams (Blackboard)
Thursday 10/15, 1:00-4:30pm
Friday 10/16, 1:00-8:00pm
Discussion of draft block diagrams
(30 minutes per person,
60 minutes per group,
electronic sign-up using Doodle)
Project Timeline: Draft Block Diagrams
![Page 63: Lecture 5 Block Diagrams Modes of Operation of Block Ciphers.](https://reader031.fdocuments.in/reader031/viewer/2022033020/56649f555503460f94c7966f/html5/thumbnails/63.jpg)
Thursday 10/22, 12 noon
Revised block diagrams due (Blackboard)
Thursday 10/22, 1:00-4:30pm
Friday 10/23, 1:00-8:00pm
Discussion of revised block diagrams
(30 minutes per person,
60 minutes per group,
electronic sign-up using Doodle)
Project Timeline: Revised Block Diagrams