Lecture-4 –Logicsajid.buet.ac.bd/courses/EEE_303_2020/Lecture_4-6.pdf · EEE 303 -Digital...

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EEE 303 - Digital Electronics - Lecture 4-6 3/5/20 1 Lecture-4 –Logic Dr. Sajid Muhaimin Choudhury Dept of EEE, BUET EEE 303 – Digital Electronics 1 If a given switch is controlled by an input variable x, then we will say that the switch is open if x = 0 and closed if x = 1. Such switches are implemented with transistors. 2

Transcript of Lecture-4 –Logicsajid.buet.ac.bd/courses/EEE_303_2020/Lecture_4-6.pdf · EEE 303 -Digital...

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Lecture-4 –Logic

Dr. Sajid Muhaimin ChoudhuryDept of EEE, BUET

EEE 303 – Digital Electronics

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• If a given switch is controlled by an input variable x, then we will say that the switch is open if x = 0 and closed if x = 1. Such switches are implemented with transistors.

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Variable and States• The output is defined as

the state (or condition) of the light L. If the light is on, we will say that L = 1. If the light is off, we will say that L = 0.

• Since L = 1 if x = 1 and L = 0 if x = 0, we can say that L(x) = x.We say that L(x) = x is a logic function and that x is an input variable.

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Logical AND Operation

Symbol

Operation: A.B

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AND operation

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Application of AND logic

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Logical OR Operation

Symbol

Operation: A+B

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OR operation

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Application of OR logic

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Logical NOT Operation

Symbol

Operation: !A

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Application of NOT logic

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NAND Operation

NOR Operation

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Example of NAND

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Example of NOR

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XORExclusive OR

XNOR

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Application of XOR gate

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Logic IC

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AND ICs

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NAND ICs

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OR, NOR ICs

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Programmable Logic Classification

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SPLD (Simple Programmable Logic Device)

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CPLD (Complex Programmable Logic Device)

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FPGA (Field Programmable Gate Array)

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Programming Gate Array

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Fuse vs Antifuse

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EPROM

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SRAM

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Lecture-5 –Boolean Algebra

Dr. Sajid Muhaimin ChoudhuryDept of EEE, BUET

EEE 303 – Digital Electronics

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• Addition

• Multiplication

Boolean Operators

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• Commutative Laws: A+B = B+AAB = BA

• Associative Laws: (AB)C = A(BC)A+(B+C)=(A+B)+C

• Distributive Law: A(B+C) = AB+AC

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DeMorgan’s Theorem

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Boolean Analysis

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Boolean Expression of a Logic Circuit

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Equivalent Circuit

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Boolean Synthesis

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Example

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Standard forms of Boolean Expressions

• Sum of Products (SOP)• Minterm: a product term where each

variable or its complement appears once• SOP = Sum of Minterms

• Product of Sums (POS)• Maxterm: a sum term where each variable

or its complement appear once• POS = Product of Maxterms

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Truth Table: Minterm and Maxterms

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Example: Synthesize the Following Truth Table with a Logic Circuit

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Analysis and Synthesis

1. For a given logic network, find a truth table to describes it2. For a given logic network, find a set of logical expressions that

describes its behavior. 3. Transform a logical expression into the equivalent truth table

representation. 4. Transform a truth table into an equivalent logical expression

representation. 5. Transform a logical expression into an equivalent (and possibly

simpler) logical expression. 6. Design a logic network to have the behavior specified by a

given set of logical expressions. 7. Design a logic network to have the behavior specified by a

given truth table.

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Lecture-6 – Logic Circuit Simplification

Dr. Sajid Muhaimin ChoudhuryDept of EEE, BUET

EEE 303 – Digital Electronics

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Logic Circuit Minimization

• Karnaugh Map• Quine-McCluskey Method • Espresso

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Karnaugh map • Karnaugh map is an array of cells in which

each cell represents a binary value of the input variables.

• The cells are arranged in a way so that simplification of a given expression is simply a matter of properly grouping the cells.

• Similar to a truth table because it presents all of the possible values of input variables and the resulting output for each value.

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3 Variable K-map

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4 Variable K-map

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Minimal Sum-Of-Products Expressions

• Ordering of Squares • The important feature of the ordering of squares is

that the squares are numbered so that the binary representations for the numbers of two adjacent squares differ in exactly one position.

• This is due to the use of a Gray code (one in which adjacent numbers differ in only one position) to label the edges of a type 2 map.

• The labels for the type 1 map must be chosen to guarantee this property.

• Note that squares at opposite ends of the same row or column also have this property (i.e., their associated numbers differ in exactly one position)

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Merging Adjacent Product Terms

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• For k-variable maps, this reduction technique can also be applied to groupings of 4,8,16,...,2k rectangles all of whose binary numbers agree in (k-2),(k-3),(k- 4),...,0 positions, respectively.

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Basic Karnaugh Map Groupings for Three-Variable Maps.

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Basic Karnaugh Map Groupings for Four-Variable Maps

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Rules for Grouping: • The number of squares in a grouping is 2i for some i

such that 1 ≤ i ≤ k. • There are exactly k-i variables that have constant

value for all squares in the grouping. • Resulting Product Terms:

• If X is a variable that has value 0 in all of the squares in the • grouping, then the literal X' is in the product term. • If X is a variable that has value 1 in all of the squares in the

grouping, then the literal X is in the product term. • If X is a variable that has value 0 for some squares in the

grouping and value 1 for others, then neither X' nor X are in the product term.

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Invalid Karnaugh Map Groupings

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• In order to minimize the resulting logical expression, the groupings should be selected as follows:

• Identify those groupings that are maximal in the sense that they are not contained in any other possible grouping. The product terms obtained from such groupings are called prime implicants.

• A distinguished 1-cell is a cell that is covered by only one prime implicant.

• An essential prime implicant is one that covers a distiquished 1-cell.

• Use the fewest possible number of maximal groupings needed to cover all of the squares marked with a 1.

• Examples:

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