Lecture 2

PART II: BASIC MICRO FABRICATION

PART 2. BASIC FABRICATIONS (F)

KUO-SHEN CHEN 1999-2002 KUO-SHEN CHEN, ALL RIGHT RESERVED

Major references:

1. S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era, Vol. 1: Process Technology, Lattice Press, 1986

2. R. C. Jeager, Introduction to Microelectronic Fabrication, Addison-Wesley, 1988

3. S. K. Gandhi, VLSI Fabrication Principle, Willey, 1983

4. S. M. Sze, VLSI Technology, 2nd Ed. McGraw-Hill, 1988

5. S. A. Campbell, The Science and Engineering of Micro Electronics Fabrication, Oxford, 1996

6. M. Madou, Fundamental of Microfabrication, CRC Press, 1997

7. , VLSI , , 2002


2.1 PROCESS OVERVIEW

Process overview This part will address the basic microfabrication in microelectronics and MEMS

fabrication. From the wafer preparation to device packaging.

MEMS materials MEMS materials must be micromachiningable. That is, etching, CVD, or PVD

compatible. Major MEMS materials are almost identical to these IC materials, that is, silicon and oxide. Other MEMS materials are metals and refractory ceramics such as silicon nitride.

Silicon

Atomic number 14

Crystalline structures: diamond cubic lattice

Properties:

Mechanical: brittle, strength is determined by flaw distribution, Youngmodulus is between 190 - 130 GPa. Thermal conductivity is 200 - 50 W/m K. Expansion coefficient ~ 2.6 10 -6 /K. Melting point ~ 1700 K

Chemical: inert to most chemicals. Can be etched with F- based chemicals such as SF6. Can form solid solution with Au (fundamental of gold eutectic bond).

Electrical: semiconductor. The resistively is a function of doping.

Applications: Si based electronics, MEMS

Oxide

Chemical reaction: wet or dry oxidization from silicon

Crystalline structures: amorphous (fused silica), crystalline (quartz)

Properties:

Mechanical: Melting point ~ 2000 K, glassy temperature ~ 1100 K. Highly brittle. Young modulus ~ 70 GPa. Strength ~ 100 MPa. Thermal

conductivity ~ 1 W/m K. Expansion coefficient ~ 0.5 10-6 /K.

Chemical: can be etched by HF based chemical

Electrical: highly insulated. Break down voltage ~ 1 MV/m, relative dielectric constant = 3.9

Applications: insulator, sacrificial layer in surface micromachining, etch stop, mask


2.2 CRYSTAL GROWTH

Czochralski growth Setup

Start with ultra-pure polysilicon

Typical pull rate for 100 mm dia ~ 20 cm/hr

Problem with oxygen impurities from crucible. In addition, ~ 1014 - 1015 cm-3 of minority impurity concentration is intended to form the light doped silicon.

Basic principle

Starting with a single crystal seed, rotating and pulling to form ingots. The pulling is controlled such that there is enough time for thermal equilibrium. That is, to avoid thermal gradient and thermal activation process to form grain boundary.

Mechanical engineering challenge

As the required wafer diameter getting bigger, time for quasi-static heat transfer increases. How to grow single silicon fast with no grain boundary forming.

Float-Zone crystal growth This method eliminates oxygen impurities. Such ultra-pure silicon is used for detector

and power devices. (Minority concentration ~ 1013 cm-3).

O2 precipitation will result bad etch results.

Basic principle

Direct RF melting the polysilicon rods. No crucible.


Other substrates GaAs

Pyrex Glass (used for anodic bonding)

Ceramics (e.g., silicon carbide)

Wafer preparation Will result ~ 50% material loss

1. Diameter sizing

2. Orientation (X-ray, 5%)

3. Slicing and laser marking

4. Lapping and edge treatment

5. Damage removal etch

6. Polishing

7. Cleaning

Typical specs (100 mm diameter wafer)

100 mm 1mm, 500 mm 10 mm, 1

Wafer orientations


2.3 LITHOGRAPHY

Pattern transfer Pattern transfer from masks to thin films on planar substrate via lithographic process

Device fabrication accomplished by registration of successive patterns

Two-dimensional pattern transfer: limited tolerance for non-planar topography on wafer

2-D pattern transfer imposes a constraint on microsensor process design

Types of lithography:

* Optical, electron beam, X-ray

Basic pattern transfer step:

Comment: lithography requires precise pattern transfer. As a result, precision mechanical systems and optical systems are required. The position control of the lithography machine needs 10 times better than the achieved electronic resolution level. E.g., 1 mm technology requires 0.1 mm position control accuracy.

Precision machine design strongly depends on semiconductor industry.

Photoresist (PR) Optical resists: photosensitive polymers

Positive resist: PR will be removed after developing if it is exposure


Negative resist: PR will be removed if it is not exposure

PR usually coated via spun-cast

Positive PR vs. negative PR

Exposure systems Contact printing

* High resolution ( 1mm)

* Mask deterioration

Proximity printing

* 10 - 25 mm gap --> longer mask life

* Diffraction effect --> 2 - 4 mm resolution

Projection printing

* Image of mask usually reduced

* Scanning or stepping of small field (~ 1cm)

* VLSI standard (0.25 mm possible with deep-UV source)

However, all three methods have depth of focus limitations when working with high aspect ratios (e.g., > 5mm)

* Trade-off minimum feature and depth


Alignment Issues Must be able to repeat the patterning process on the patterned wafers

* Pattern transfer to the right locations

Methods

* Design alignment marks

Front-back alignment

* Some micro machining processes requires double side lithography

* Front-back alignment is required

Typical options for front-back alignment

* Pre-etched reference holes (undesirable)

* Infrared aligner

* Double-side aligner


2.4 OXIDATION

Basic thermal oxidation Chemical reaction between oxidizing species and substrate

Substrate = silicon; oxidant = water or oxygen

Process involves:

* Gas phase transport of oxidant to surface

* Diffusion through existing oxide

* Oxidation reaction

* The ratio of silicon thickness converted, Xs, to resulting oxide thickness, Xox, is proportional to their respective densities: Xs = 0.46 Xox

Dry oxidation (~950 C)

Si + O2 ---> SiO2

Wet oxidation (1000 C)

Si + 2H2O ---> SiO2 + 2H2

Deal and Grove law

X A BA

tox = + + -0 5 14

12

. ( ( ) )t

Where B/A is called the linear rate constant, B is called the parabolic rate constant, and

t = +XB

XB A

i i2

/. Where Xi is the initial oxide thickness.

Linear and parabolic oxide growth

Linear:

For thin oxides (short oxidation time) the process is reaction rate limited

XBA

tox = +( )t . This is referred to as the linear growth regime

Parabolic

For thick oxides (long oxidation times) the process is diffusion limited


X Btox = . This is referred to as the parabolic growth regime.

The rate constants are a function of oxidation ambient and substrate orientation, and are strongly temperature dependent. They can be represented using an Arrhenius relationship.

Oxidation equipment Usually performed in a horizontal quartz tube, which is heated resistively.

Oxide thickness measurement Usually performed by ellipsometer

The color of oxide can be used for quick thickness estimation.


2.5 ETCHING

Selectivity Selectivity is defined as the ratio between the etch rate of two materials subject to a

particular etchant. Especially one is the thin film (or substrate); the other one is the mask material.

Wet subtractive Three step process

* Reactant transport to surface

* Surface reaction

* Reaction product removal from surface

Common examples

* Buffered HF: thermal oxide ~ 100 nm/min, LPCVD SiN ~ 1 nm/min, Si ~ 0

* PAN: Aluminum ~ 100 nm/min, Si ~ 0

* Piranha: attacks most organic films (as PR)

Advantages of wet subtractive

* High selectivity

* Inexpensive

Disadvantage of wet subtractive

* Isotropic, loss of resolution through undercut

* Temperature/agitation sensitivity

* Surface tension, bubble formation, wetting, solution degradation

* Waste disposal

Dry subtractive Plasma-assisted etching: various techniques

Physical bombardment (sputtering)

* Ion milling, sputter etching

Chemical reaction

* Pure plasma etching

* Dry equivalent of wet chemistry (e.g., SF6 etching for silicon)

Combination of physical and chemical mechanisms

* Plasma etching: with bombardment

* Reactive ion etching (RIE)


* Reactive ion beam etching

* Bosch process (time-multiplexing)

Wet additive

Chemical or electrochemical deposition

LIGA

Thick ( > 100 mm) resist

X-ray exposure

Electroplate Ni, Cu in developed image

Use metal structure as a mold insert for reproduction


Dry additive

Lift-off

Advantages; limitations

* No need for selective etching of metal

* Film thickness


2.6 CVD/PVD PROCESS

PVD (physical vapor deposition)

Thermal evaporation

Material source is heated to sublimation temperature in a vacuum

Material is vapor transported to target in vacuum

Deposition is by line-of-sight (mean free path = 50m)

Sputtering

Material is removed from target by momentum transfer

Gas molecules are ionized in a glow discharge, ions strike target and remove mainly neutral atoms

Atoms condense on the substrate

Vacuum level ~ 10 mtorr --> mean free path ~ 5 mm

Easy to deposit alloys


Epitaxy The growth of a thin, crystalline layers on a crystalline substrate, where the substrate

acts as a seed crystal

Homogeneous epitaxy is the process of growing a crystalline film of one material on a substrate of the same material. Example: Silicon on Silicon

Heterogeneous epitaxy is the process of growing a crystalline film of one material on a substrate of another, usually of closely matched lattice spacing and thermal expansion.

Examples of Hetro Epitaxy: Gallium Phosphide on GaAs, Si on Sapphires

Vapor phase epitaxy (VPE)

Material transport in vapor phase

Example: silicon epitaxy @T=1200 C

SiCl4(g) + 2H2(g) Si(s) + 4HCl (g)

CVD (Chemical vapor deposition) Deposition of amorphous or polycrystalline films from the vapor phase

Similar to VPE, but substrate acts only as surface for reaction

Energy for reaction is supplied thermally, by photons, and/or by glow discharge.

Introduction examples

CVD of silicon: SiH4 --> Si + 2H2 (600 -650 C LP)

CVD of oxide: SiH4 + O2 --> SiO2 + 2H2 (400 - 450 C AP)

Deposition variables


Substrate temperature

Pressure / gas flow rate

Gas composition

Deposition techniques

APCVD: atmospheric pressure

LPCVD: low pressure

PECVD: plasma enhanced


2.7 OTHER PROCESSES

Ion implantation A beam of energetic ions implants dopants into the substrate

Depth and dopant concentration are controlled by the acceleration energy and beam current

For p+: boron

For n-: phosphorus

Stopping mechanisms:

* Nuclear collisions >> predominant at low E

* Electronic interactions >> predominant at high E

Terminology:

* Projected range, RP: average distance traveled by ion, parallel to beam

* Projected straggle: DRP: fluctuation in the projected range

* Lateral straggle: DR^: fluctuation in the final rest position, perpendicular to beam

* Peak concentration: NP: concentration of implanted ion at Rp.

Masking

Since the dopant introduction take place at near room temperature. Photo resist can be used as a mask, as well as oxide, nitride, polysilicon.

Concentration profile:

Gaussian Distribution: N x N x R R NQ

Rp p p p p( ) exp[ ( ) / ( ) ],= - - =2 22

2D

pD

Range is determined by acceleration energy, ion mass, and the stopping power of the material

Dose is determined by the charge per ion, zq, the implanted area, A, and the charge per unit time (I) arriving at the substrate


2; / ( / )idt Q Q zqA Dose atoms cm= = Thermal annealing at T > 900 C is required to remove damage to the silicon lattice and

activate the implanted impurities.

For deep diffusion ( > 1mm), implantation is used to create a dose of dopants, and thermal diffusion (limited source) is used to drive in the dopant.

Diffusion of dopant (drive-in)

Following the introduction of a dose, Q, at the surface. The dopant must be driven in to the desired depth.

The ion concentration profile before drive-in

Process examples: Diode: this example required only ion-implantation process

N-MOS process

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Lecture 2

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