Lecture 18: Bipolar Single Stage Amplifiers
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Transcript of Lecture 18: Bipolar Single Stage Amplifiers
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18
Lecture 18:
Bipolar Single Stage Amplifiers
Prof. Niknejad
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Lecture Outline
BJT Amps BJT Biasing Common Emitter Amp Common Base Amp Common Collector Amp
– AKA Emitter Follower β Multiplier Concept Emitter Degeneration
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Bipolar Amplifiers
Common-emitter amplifier:
Biasing: adjustVBIAS = VBE sothat IC = ISUP.
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Small-Signal Two-Port Model
Parameters: (IC = 1 mA, β =100, VA = 3V)
oc3V|| || 3k||r 3k
1mAout o oc ocR r r r
25mV100 2.5k1mAin
m
R rg
1mA 1 S 40mS25mV 25m mG g
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Common-Base Amplifier
To find IBIAS, note that IBIAS = IE = - (1/F)IC
Common-base currentgain Ai = - F
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
CB Input Resistance
Summing currents at the input node:
( ) 0t m o t ovi g v v v gr
small 1
t m ti g vr
1 1
1 1t min m m
t m
v gR g gi r g
25mV 251mA
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
CB Output Resistance
notepolarity
put roc back inafter finding vt / it
Same topology as CG amplifier, but with r || RS rather than RS
|| 1 ( ||out oc o m SR r r g r R
|| 1out oc o mR r r g r SR r
|| 1out oc oR r r
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Output Impedance Details
First draw small signal equivalent circuit with transistor and simplify as much as possible
Then (if needed) add the small signal equivalent circuit If frequency is low, get rid of caps!
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Output Impedance Calculation
tv
ti
r v
SR
mg v or
( )tt m
o
v vi g vr
( || )t Sv i R r
||( || ) t S
t m t S to o
v R ri g i R r i
r r
||1 ( || ) S t
t m So o
R r vi g R r
r r
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Common-Base Two-Port Model
Why did we consider it a current amp?
Current Amp :• Unity Current Gain (-1)• Small Input Impedance• Large (huge!) Output Impedance
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Common-Collector Amplifier
DC Bias:output is one“VBE drop” downfrom input
“Emitter Follower”
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Common-Collector Input Resistance
( 1) ( || || )t t t L o ocv i r i R r r
( 1)( || || )in L o ocR r R r r
( 1)in LR r R
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Common-Collector Output Resistance
Divider between vt and v :
1 1( || ) 0t m t o oci g v v r v r r
tS
rv vr R
1 1( || )t t m t o ocS
ri v g r v r rr R
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Common-Collector Output Res. (cont)
Looking into base of emitter follower: load impedance larger by factor β+1
Looking into emitter of follower: “source” impedance smaller by factor β+1
1 1( || )t t m t o ocS
ri v g r v r rr R
11t t mS
i v g rr R
1t S
outt
v r RR
i
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Common-Collector Voltage Gain
KCL at the output node: note v = vt - vout
1 1||out oc o mv r r g v v r
1 1|| ( )out oc o m t outv r r g r v v
1 1 1||out oc o m m tv r r g r g r v
out tv v
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Common-Collector Two-Port Model
typo: RL
Voltage Amp :• Unity Voltage Gain (+1)• Large Input Impedance• Small Output Impedance
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Summary of Two-Port Parameters
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Typical “Discrete” Biasing A good biasing scheme must
be relatively insensitive to transistor parameters (vary with process and temperature)
In this scheme, the base current is given by:
The emitter current:
1
1 2B CC
RV VR R
1,
1 2
/E CC BE on ERI V V R
R R
1R
2R
CR
ER
CCV
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 18 Prof. A. Niknejad
Gain for “Discrete” Design Let’s derive it by
intuition Input impedance can
be made large enough by design
Device acts like follower, emitter=base
This signal generates a collector current
1R
2R
CR
ERsv
( 1)( )( 1)
in E
E
R r RR
2 1 2( 1) || ||in ER R R R
Can be made large to coupleAll of source to input (even with RS)
~ sv/s Ev R
~ /s C Ev R R