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  • 8/7/2019 Lect 0

    1/22

    Introduction toCMOS VLSI

    Design

    Introduction

    ASHWANI MISHRA

    NARAINA COLLEGE OF ENGINEERING & TECHNOLOGY

    KANPUR

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 2

    Introduction

    Integrated circuits: many transistors on one chip.

    Very Large Scale Integration (VLSI): very many

    Complementary Metal Oxide Semiconductor

    Fast, cheap, low power transistors Today: How to build your own simple CMOS chip

    CMOS transistors

    Building logic gates from transistors

    Transistor layout and fabrication

    Rest of the course: How to build a good CMOS chip

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 3

    Silicon Lattice

    Transistors are built on a silicon substrate

    Silicon is a Group IV material

    Forms crystal lattice with bonds to four neighbors

    Si SiSi

    Si SiSi

    Si SiSi

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 4

    Dopants

    Silicon is a semiconductor

    Pure silicon has no free carriers and conducts poorly

    Adding dopants increases the conductivity

    Group V: extra electron (n-type) Group III: missing electron, called hole (p-type)

    As SiSi

    Si SiSi

    Si SiSi

    B SiSi

    Si SiSi

    Si SiSi

    -

    +

    +

    -

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    CMOS VLSI Design0: Introduction Slide 5

    p-n Junctions

    A junction between p-type and n-type semiconductor

    forms a diode.

    Current flows only in one direction

    p-type n-type

    anode cat ode

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 6

    nMOS Transistor

    Four terminals: gate, source, drain, body

    Gate oxide body stack looks like a capacitor

    Gate and body are conductors

    SiO2 (oxide) is a very good insulator Called metal oxide semiconductor(MOS)

    capacitor

    Even though gate is

    no longer made of metal

    n

    p

    GateSource Drain

    bulk Si

    SiO2

    Polysilicon

    n

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    CMOS VLSI Design0: Introduction Slide 7

    nMOS Operation

    Body is commonly tied to ground (0V)

    When the gate is at a low voltage:

    P-type body is at low voltage

    Source-body and drain-body diodes are OFF No current flows, transistor is OFF

    n

    p

    GateSource Drain

    bulk Si

    SiO2

    Polysilicon

    n

    D

    0

    S

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 8

    pMOS Transistor

    Similar, but doping and voltages reversed

    Body tied to high voltage (VDD)

    Gate low: transistor ON

    Gate high: transistor OFF Bubble indicates inverted behavior

    SiO

    n

    GateSource Drain

    bulk Si

    olysilicon

    p+ p+

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 9

    Transistors as Switches

    We can view MOS transistors as electrically

    controlled switches

    Voltage at gate controls path from source to drain

    g

    s

    d

    g = 0

    s

    d

    g = 1

    s

    d

    g

    s

    d

    s

    d

    s

    d

    nMOS

    pMOS

    OFFON

    ONOFF

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    CMOS VLSI Design0: Introduction Slide 10

    CMOS Inverter

    A Y

    0

    1

    V

    A Y

    A Y

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 11

    CMOS Inverter

    A Y

    0

    1 0

    V

    A Y 0

    GND

    ON

    OFF

    A Y

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 12

    CMOS Inverter

    A Y

    0 1

    1 0

    VDD

    A 0 Y 1

    GND

    OFF

    ON

    A Y

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    CMOS VLSI Design0: Introduction Slide 13

    CMOS NAND Gate

    A B Y

    0 0

    0 1

    1 0

    1 1

    A

    B

    Y

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    CMOS VLSI Design0: Introduction Slide 14

    CMOS NAND Gate

    A B Y

    0 0 1

    0 11 0

    1 1

    A=0

    B=0

    Y=1OFF

    ON ON

    OFF

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    CMOS VLSI Design0: Introduction Slide 15

    CMOS NAND Gate

    A B Y

    0 0 1

    0 1 11 0

    1 1

    A=0

    B=1

    Y=1OFF

    OFF ON

    ON

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    CMOS VLSI Design0: Introduction Slide 16

    CMOS NAND Gate

    A B Y

    0 0 1

    0 1 11 0 1

    1 1

    A=1

    B=0

    Y=1ON

    ON OFF

    OFF

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    CMOS VLSI Design0: Introduction Slide 17

    CMOS NAND Gate

    A B Y

    0 0 1

    0 1 11 0 1

    1 1 0

    A=1

    B=1

    Y=0ON

    OFF OFF

    ON

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    CMOS VLSI Design0: Introduction Slide 18

    CMOS NOR Gate

    A B Y

    0 0 1

    0 1 01 0 0

    1 1 0

    A

    B

    Y

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 19

    CMOS Fabrication

    CMOS transistors are fabricated on silicon wafer

    Lithography process similar to printing press

    On each step, different materials are deposited or

    etched Easiest to understand by viewing both top and

    cross-section of wafer in a simplified manufacturing

    process

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 20

    Inverter Cross-section

    Typically use p-type substrate for nMOS transistors

    Requires n-well for body of pMOS transistors

    n

    p substrate

    p

    n well

    A

    YGND VDD

    n p

    SiO2

    n diffusion

    p diffusion

    polysilicon

    metal1

    nMOS transistor pMOS transistor

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    CMOS VLSI Design0: Introduction Slide 21

    Inverter Mask Set

    Transistors and wires are defined by masks

    Cross-section taken along dashed line

    GND VDD

    Y

    s strate ta ell ta

    n OS transistor OS transistor

  • 8/7/2019 Lect 0

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    CMOS VLSI Design0: Introduction Slide 22

    Summary

    MOS Transistors are stack of gate, oxide, silicon

    Can be viewed as electrically controlled switches

    Build logic gates out of switches

    Draw masks to specify layout of transistors

    Now you know everything necessary to start

    designing schematics and layout for a simple chip!