Large-area formation of self-aligned crystallinedomains of organic semiconductors on transistorchannels using CONNECTSteve Parka,1, Gaurav Girib,1, Leo Shawb, Gregory Pitnerc, Jewook Had, Ja Hoon Koob, Xiaodan Gub, Joonsuk Parka,Tae Hoon Leec, Ji Hyun Namc, Yongtaek Hongd,2, and Zhenan Baob,2

aDepartment of Materials Science and Engineering, Stanford University, Stanford, CA 94305-4034; bDepartment of Chemical Engineering,Stanford University, Stanford, CA 94305-4125; cDepartment of Electrical Engineering, Stanford University, Stanford, CA 94305-9505; and dDepartmentof Electrical and Computer Engineering, Inter-University Semiconductor Research Center, Seoul National University, Seoul 151-742, South Korea

Edited by Joseph M. DeSimone, University of North Carolina at Chapel Hill, Chapel Hill, NC, and approved March 18, 2015 (received for review October15, 2014)

The electronic properties of solution-processable small-moleculeorganic semiconductors (OSCs) have rapidly improved in recentyears, rendering them highly promising for various low-cost large-area electronic applications. However, practical applications oforganic electronics require patterned and precisely registered OSCfilms within the transistor channel region with uniform electricalproperties over a large area, a task that remains a significantchallenge. Here, we present a technique termed “controlled OSCnucleation and extension for circuits” (CONNECT), which usesdifferential surface energy and solution shearing to simulta-neously generate patterned and precisely registered OSC thinfilms within the channel region and with aligned crystalline do-mains, resulting in low device-to-device variability. We have fab-ricated transistor density as high as 840 dpi, with a yield of 99%.We have successfully built various logic gates and a 2-bit half-adder circuit, demonstrating the practical applicability of our tech-nique for large-scale circuit fabrication.

organic semiconductors | patterning | small molecules | transistors | circuits

Organic electronics are being rapidly developed to pave theway for low-cost, large-area, flexible, and transparent elec-

tronics, such as active matrix displays, radiofrequency identifi-cation tags, and integrated logic circuits (1–6). Solution-processablesmall-molecular organic semiconductors (OSCs) are promising forthese applications because of their high performance in organicthin-film transistors (OTFTs) and their low-cost, large-area proc-essability (7–11). Recently, solution-processed small-moleculeOSCs have shown record-breaking charge carrier mobility in thin-film transistors, furthermore providing the exciting prospect oforganic electronics (9–12). However, significant challenges stillremain to realize practical applications of organic electronics.First, patterning and precisely registering OSCs within the channelregion is imperative to reduce leakage current between neigh-boring TFTs and parasitic capacitance, and to increase deviceyield. Second, low variability in electrical characteristics is essentialso that all OTFTs work in concert with one another to carry outproper device functionalities. Last, all these features must beachieved in a scalable and economical manner, as large areaand low cost are key advantages for organic electronics.To address the above challenges, various groups have devel-

oped methods to pattern OSCs (3, 9, 13–24), such as templatingOSCs (14, 19–21), inkjet printing (9, 18), gravure printing, andother roll-to-roll coating methods (25–27). In addition, the useof solvent wetting/dewetting surface treatments has been widelyused in conjunction with the patterning methods described above(10, 11, 13, 15–17, 22, 28, 29). Despite some promising results,there remain shortcomings that potentially limit their practicalapplicability. Primarily, it is difficult to align drain and sourceelectrodes to OSCs, as standard photolithography generallycannot be directly applied due to solvent-induced degradation.

Additive printing methods to place OSCs on electrodes or viceversa is often difficult to achieve, especially as the density ofTFTs become higher (30). For instance, alignment using inkjetprinting is restricted by the registration capability of the instru-ment, whereas the size of each OTFT is limited by the dropletsize attainable (22, 31). Another potential issue with thesemethods is the variance in electrical characteristics of TFTs dueto the difficulty in obtaining uniform crystal growth on isolatedTFTs over large areas (9, 15, 21, 27, 28, 31–35). Even singlecrystalline domains of patterned TFTs may have large variabilityin electrical characteristics as a result of random orientation andsize variance.Self-alignment of OSCs on electrodes has been developed by

various groups to overcome misalignment (36, 37). Vertical TFTswere created to achieve self-aligned small channels (36, 37);however, achieving high-device performance requires precisecontrol of device fabrication. UV light exposure after electrodepatterning can be used to generate a hydrophilic channel betweenthe electrodes, where OSCs can be selectively isolated and de-posited (38–40). However, this method is limited to transparentsubstrates and only short channels (<500 nm). The UV light can

Significance

Solution-processed organic electronics are expected to pavethe way for low-cost large-area electronics with new and ex-citing applications. However, realizing solution-processed or-ganic electronics requires densely packed transistors withpatterned and precisely registered organic semiconductors(OSCs) within the transistor channel with uniform electricalproperties over a large area, a task that remains a significantchallenge. To address such a challenge, we have developed aninnovative technique that generates self-patterned and self-registered OSC film with low variability in electrical propertiesover a large area. We have fabricated highest density oftransistors with a yield of 99%, along with various logic cir-cuits. This work significantly advances organic electronics fieldto enable large-scale circuit fabrication in a facile and eco-nomical manner.

Author contributions: S.P., G.G., J.H.K., Y.H., and Z.B. designed research; S.P., G.G., L.S.,G.P., J.H., J.H.K., and J.P. performed research; S.P., J.H., J.P., T.H.L., J.H.N., Y.H., and Z.B.contributed new reagents/analytic tools; S.P., G.G., J.H.K., X.G., J.H.N., and Z.B. analyzeddata; S.P., G.G., and Z.B. wrote the paper; and Y.H. and Z.B. managed the project.

The authors declare no conflict of interest.

This article is a PNAS Direct Submission.1S.P. and G.G. contributed equally to this work.2To whom correspondence may be addressed. Email: zbao@stanford.edu or yongtaek@snu.ac.kr.

This article contains supporting information online at www.pnas.org/lookup/suppl/doi:10.1073/pnas.1419771112/-/DCSupplemental.

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also damage the OSC–dielectric interface, creating traps that in-crease the variability between TFTs. Contact directed nucleationhave previously been used to increase crystallinity in the channelregion (41). However, grain boundaries remain and result in largevariance in OTFT performance. Mannsfeld et al. (42) have re-ported solution deposition of OSC crystals on electrodes using aliquid vortex method, but the OSC crystals have incompletechannel coverage, leading to varying electrical characteristics.Polycrystalline thin films of pentacene have been formed in be-tween electrodes using vapor deposition, but patterning is re-quired to isolate the area of deposition (43).In this study, we introduce a highly effective method—con-

trolled OSC nucleation and extension for circuits (CONNECT)—that uses differential surface wetting properties combined withsolution shearing (44, 45) to pattern and align crystalline do-mains of OSCs selectively between source and drain electrodesin a single step. This method of patterning overcomes a numberof challenges previously encountered with other patterningmethods described above. First, as the electrodes themselvesserve as templates for patterning OSCs, extra steps to patternand register OSCs to the channel region are not necessary.Second, this method ensures that each bridging event yieldsaligned crystalline domains from a single nucleation site acrossthe channel, which results in OTFTs with relatively low variance inelectrical characteristics. Our method was observed to work over awide range of channel lengths, ranging from 0.5 to 20 μm, bothwith photolithographically patterned and inkjet-printed elec-trodes, making our process versatile to different electrode typesand a wide range of OTFT densities. We have attained OTFTdensities as high as 840 dpi, which is among the highest achievedin OTFTs (46). Last, our method was shown to be scalable to alarge area and had a high crystal CONNECT yield of 99%. As afirst demonstration of the potential of our method, we havefabricated various logic gates and a 2-bit half-adder circuit con-sisting of 60 source/drain channel regions. Together, thesedemonstrations render our method highly promising for variousorganic electronic applications where ease of processability,scalability, flexibility in OTFT density, device-to-device unifor-mity, and yield are of great importance.

ResultsPatterning OSCs by CONNECT. Photolithography was first used tofabricate bottom-contact Au electrodes (2-nm Cr and 40-nm Au).We then used the selective surface reactivity of SiO2 and Auto silane and thiol, respectively, to functionalize each surfacewith different self-assembled monolayers (SAMs). SiO2 was firstmodified with an n-octadecyltrichlorosilane (OTS) SAM, ren-dering it lyophobic. The OTS physisorbed on the Au surface waseasily removed by heating the substrate to 120 °C for 10 min.Thereafter, the substrate was modified with a thiophenol SAM,which increased the wetting of electrodes to solution. Due to thewetting and dewetting properties of the Au electrode and SiO2,respectively, the subsequent solution-sheared 6,13-bis(triisopro-pylsilylethynyl)pentacene (TIPS-pentacene) deposition occurredselectively on the electrodes and the channel region, whereas therest of the substrate had no TIPS-pentacene deposited (Fig. 1A).As a control experiment, we have sheared over a substratewithout any SAM treatment and have observed no patterning ofTIPS-pentacene (Fig. S1A).CONNECT works by limiting OSC nucleation and promoting

crystal growth in selected areas during solution shearing. Fig. 1Bis a schematic diagram of one of our electrode sets, and Fig. 1Cdepicts the nucleation and crystal growth process. As shearingbegins at the top, multiple nucleation and crystallization eventsoccur in the nucleation region. The selection and growth regionthat follows the nucleation region selects a crystalline domain topropagate downward (Fig. S1 B and C). When the evaporationfront reaches the trailing electrode, the liquid bridges both the

leading electrode and the trailing electrode. Previously, we haveshown that crystal growth begins from the air–solvent interfaceand proceeds toward the substrate during solution shearing (47).In this work, we match the timescale of vertical crystal growthwith the lateral crystal growth, to ensure that the crystallinedomain that was growing on the leading electrode will extend tothe trailing electrode and cover the OTFT channel before thesolution dries (see SI Note 1 for a detailed description of thisphenomenon). This method ensures that each bridging event re-sults in aligned crystalline domains, as we have previously shownthat the fast growth axis of the OSC crystal aligns itself with thedirection of solution shearing, i.e., perpendicular to the channellength in this case (45). To show the applicability of our tech-nique to another molecule, we have also successfully demon-strated CONNECT with fluorinated 5,11-bis(triethylsilylethynyl)anthradithiophene (diF-TES-ADT) (see Fig. S2 for optical im-ages and electrical data). We expect CONNECT to be generallyapplicable to a wide range of other OSCs if the OSC nucleationlocation and crystal growth rate can be controlled, and the OSCcan grow crystals large enough to cover the electrode and thechannel region. However, we note that, depending on the solventand OSC used, further exploration and optimization of SAMtreatment may be required to ensure surface energies that en-ables wetting and dewetting in the desired regions.

Characterization of Patterned TIPS-Pentacene Domains. Fig. 2A is anoptical image of electrodes patterned on a 4-in wafer with TIPS-pentacene deposited over a 2 × 2-in2 area, showing the scalabilityof our technique. Fig. 2B is a large image of a section on thewafer showing selectively patterned TIPS-pentacene crystals onthe electrodes and within the channels. Fig. 2 C and D are large-area and close-up images of a dense array of electrodes, with adensity of 33 OTFTs per millimeter (840 TFTs per inch). Ro-tation of the sample under cross-polarized light (Fig. 2 E and F)extinguishes light of all TIPS-pentacene crystals at ±45° due tothe twinning behavior of TIPS-pentacene crystals, confirming thewell-aligned, fast growth axis of the crystals along the shearingdirection (i.e., the growth of either crystal twin is possible, withthe fast growth axis as the common boundary) (45). The hand-edness of the crystal should not impact the charge transportproperties of the resulting OTFT. Grazing X-ray diffraction alsoconfirms aligned TIPS-pentacene growth (Fig. S3). With opti-mized electrode dimensions and shearing conditions, it is per-ceivable that an even higher density of OTFTs can be achievedusing our technique.Optical and atomic force microscopy (AFM) images show that

cracks in the crystal from one electrode extend to the other,

Fig. 1. Schematic process of CONNECT. (A) Schematic depiction of filmgrowth during solution shearing. (B) Depiction of our electrode design withlabeling of different regions. (C) Description of CONNECT: controlled nu-cleation occurs in the nucleation region followed by selection and growth ofa crystalline domain down the electrode toward the channel region. Filmgrowth from the air–solution interface to the solution–substrate interfaceduring solution shearing allows channel bridging by crystals.

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confirming the same crystalline domain extending across thechannel (Fig. S4 A and B). There is also a dip of 41 nm in the AFMimage near the electrode edge, suggesting that the film conformsto fill up the channel space between the electrodes (Fig. S4B,Inset). We have also taken an AFM image of the TIPS-pentacenein contact with the oxide surface, which showed no apparent grainboundaries with roughness less than 1 nm, confirming highlycrystalline film growth over the channel region (Fig. S5). Becausecharge transport occurs near the semiconductor/dielectric in-terface, it is important that TIPS-pentacene fully contacts theSiO2 dielectric and the electrodes. A cross-sectional transmissionelectron microscopy image (Fig. S4C) shows intimate contact ofTIPS-pentacene to both the SiO2 surface and the Au electrode.

Electrical Characterization of TFTs. The channel length of ourOTFTs was set at 2 μm, whereas the channel width was set at 500and 1,000 μm. CONNECT was performed on four substrates,each with an area of ∼2 × 2 cm2. The substrates yielded amaximum of one to two TFTs that did not bridge out of ∼110OTFTs—resulting in a yield of >99%. High bridging yield of>99% was also obtained over a larger 2 × 2-in2 area, although wehave found some regions of overgrown crystals due to spatialvariability of the solution concentration during solution shearing.Flow enhancement techniques (10) can potentially resolve thisissue and is currently being investigated. OTFT yield is sparselymentioned in literature, but a few examples are available forcomparison. Hambsch et al. (27) have shown that gravureprinting of polymers can yield 75% working OTFTs. Recently,Arias and coworkers (48) have shown fully solution-depositedOTFTs with a yield of 96%. We characterized 120 randomlyselected OTFTs. Fig. S6 contains images of some of the OTFTsmeasured. Fig. 3A is a plot of overlaid transfer curves of 120TFTs measured at VDS = −50 V, whereas the Inset is an opticalimage of some of the measured TFTs. The average mobility ofour TFTs were 0.167 cm2·V−1·s−1 (highest mobility at 0.4 cm2/V·s)with a relative variance (SD divided by average) of 28% over the120 devices tested (histogram and table in Fig. S7). In com-parison, other patterning methods used to create patternedOSCs for isolated OTFTs have shown relative variances rangingfrom 20% to 84% (9, 15, 17, 22, 31, 32, 35, 42, 48–54). For ex-ample, Li et al. (15) have shown that using a PMMA:C8BTBTblend on a solution wetting pattern can deposit crystal plates thathave a mobility relative variance of >40%. The relatively lowvariance in electrical characteristics of our OTFTs can be at-tributed to both the directly bridging crystalline domains thatreduce the number of grain boundaries in the channel region and

the aligned domains that reduce the impact of the anisotropiccharge transport behavior of TIPS-pentacene. The mobilitiesmeasured here are perpendicular to the direction of the fastcrystal growth axis, and for TIPS-pentacene, previous literaturehas shown that this is the slow charge transport direction forsingle crystalline domains by a factor of 3.5–10 (55, 56). Hence,lower mobility obtained in our OTFTs can be attributed to theslow transport direction across the channel, and we predict thatour method will result in larger charge carrier mobilities if thedirection of fast charge transport is perpendicular to the di-rection of fast crystal growth. In addition, the mobility calculatedis likely underestimated due to the short-channel length of ourdevice, which results in contact resistance contributing signifi-cantly to the total resistance of the device. Fig. 3B is a typicaloutput curve of with VG varying from 30 to −50 V in 16-V steps.The diotic behavior of the output curve indicates dominatingcontact resistance. The contact resistance can potentially be re-duced by techniques like contact doping or using high workfunction metals.Fig. 3C shows the histogram of on-current density of the 120

OTFTs. Here, we see that on-current density ranged within afactor of 3 and a relative variance of 26%, furthermore indicatingrelatively uniform crystalline domains of TIPS-pentacene device-to-device. This is especially important for logic circuit applica-tion as the relative on-conductance of various OTFTs in a circuitdetermines the direction of current flow, which enables properlogic functionalities. The average threshold voltage of ourOTFTs was −6.77 V (histogram and table in Fig. S7). Typicalhysteresis characteristic is depicted in Fig. S8. Fig. 3D is a his-togram of log of on/off ratios [Log(ION/IOFF)]. Our OTFTs had avariance in Log(ION/IOFF) of 14.5%, with an average on/off ratioof 6.15 × 103. The variation in on/off ratio can be attributed tothe variation in the thickness of the TIPS-pentacene film, wherethe poorly gated TIPS-pentacene layer away from the dielectric/semiconductor interface contributes to the off-current. Thethickness of the film can be controlled by finer control of solu-tion shearing parameters, which can potentially increase theoverall on/off ratios of the OTFTs.

Electrical Characterization of Organic Circuits. The high uniformityin on-current density and on/off ratios of our TFTs is highlypromising for large-scale circuit fabrication. As a proof of concept,

Fig. 2. Optical characterization of patterned TIPS-pentacene crystallinedomains. (A) Image of TIPS-pentacene sheared on a 4-in wafer over a 2 x 2-inarea. (B) Cross-polarized optical image of a section of the wafer shown in A.The transistors had electrode widths that were 50 or 10 μm and a pitch of200 or 120 μm. (Scale bar: 3,000 μm.) (C) Large-area cross-polarized opticalimage of dense arrays of electrodes with 33 TFTs per millimeter. (D) Close-upimage of C, showing well-aligned patterned crystals on the electrodes andwithin the channel regions. (Scale bar: 200 μm.) (E and F) Rotated images ofD, showing the extinguishing of light at ±45°. The arrows point to the sameelectrode. (Scale bar: 200 μm.)

Fig. 3. Electrical characterization of bridged TIPS-pentacene TFTs. (A) Over-laid transfer curves of 120 OTFTs at −50 VDS. The Inset is an optical image ofseveral bridged OTFTs. (Scale bar: 100 μm.) (B) Representative output charac-teristics of TIPS-pentacene OTFTs. The VG was swept from 30 to −50 V in 16-Vsteps. (C) Histogram of on-current density of 120 OTFTs. (D) Histogram of logof on/off ratio of 120 OTFTs.

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we have built various “universal” logic gates and a 2-bit half-addercircuit. Fig. 4A is a circuit diagram of a P-type metal–oxide–semiconductor (PMOS) inverter (NOT gate) along with our designlayout. To achieve optimal switching, we have designed the re-sistance of the load transistor to be approximately six times that ofthe driver transistor by using an array of six shorted electrode pairsas the driver transistor and a single electrode pair as the loadtransistor. The load transistor was designed to allow voltage (VBIAS)to be applied to the gate electrode to ensure that the load resistor isalways on and to adjust its resistance as needed. An array of elec-trodes was used as the driver transistor to conserve vertical space, asvertical dimensions of each electrode pair were ∼45 times that of itslateral dimensions. We have designed our nucleation region withtriangles, as previous studies have shown that sharp edges increasethe probability of nucleation (10), which induce nucleation andcrystallization over a shorter distance. As seen in the polarizedoptical image in Fig. 4B and schematically depicted in Fig. 4A,nucleation occurred at the sharp corners of the triangles formingnumerous crystal grains. Subsequently, as shearing progresseddownward, one crystalline domain selectively propagated down theelectrodes and would eventually bridge to form OTFTs (Fig. 4C).Fig. 4D is a representative voltage transfer curve of our inverter andits corresponding gain versus VIN plot with VDD = 40 V, VBIAS =−20 V, and VIN swept from 0 to 40 V. The voltage transition occursfrom 17 to 24 V with a gain of 14.5, yielding noise margin of ∼10–13V. Such characteristics indicated that our inverter can be used toswitch logic gates without losing logic integrity.By placing a second driver transistor in parallel or in series, we

have constructed NAND gate (low output only when both inputsare high) and NOR gate (high output only when both inputs arelow), respectively (Fig. S9 A–D). VDD was set at 40 V, whereas Aand B inputs were either 0 or 40 V. We have observed properswitching functionalities of both of logic gates, confirming the vi-ability of our TFTs for logic applications. Finally, combining all ofthese logic gates (NOR, NAND, and NOT gates), we have built a2-bit half-adder circuit (Fig. 5 A and B). This circuit was designedto have two inputs (A and B) and two outputs (C, carry, and S,sum); C represents the 21 digit that yields a high output only whenboth inputs are high, whereas S represents the 20 digit that yields ahigh output only when either A or B input is high. To enable thiscircuit to function properly, 60 electrode pairs needed to bebridged. Fig. 5C is a zoomed-out image of our circuit substrate,whereas Fig. 5D are bright-field and cross-polarized optical images

of a section of our circuit, demonstrating selective deposition andbridging of TIPS-pentacene crystals on the source/drain electrodesand within the channel region. Fig. 5E is the input–output char-acteristics of our circuit, which shows proper functionality as de-scribed above. Such a demonstration of a small-scale circuit usingCONNECT opens up the possibility of building more complexsystem-level circuits over a large area in a facile manner.

Bridging of Inkjet-Printed Patterns. To extend applicability ofCONNECT to form low-cost, fully solution-processed organic elec-tronics, inkjet-printed silver electrodes were used as bridging elec-trodes. Inkjet printing is a low-cost method of fabricating TFTs, butthe channel spacing is limited to 15- to 20-μm resolution (57, 58). Fig.6A and its Inset are crossed-polarized optical images of bridgedinkjet-printed Ag electrodes, whereas Fig. 6B is transfer characteris-tics of several inkjet-printed TFTs. The highest mobility attained was0.49 cm2/V·s with an average of mobility of 0.24 cm2/V·s. The ef-fectively bridged TFTs confirm that our technique not only workswith lithographically patterned electrodes but also is transferrable toprinted electrodes with larger channel lengths. This opens up apossibility of using our technique in conjunction with inkjet printingto yield perfectly aligned and patterned crystals between printedsource and drain electrodes in a single step. Our technique is po-tentially advantageous over the inkjet printing of organic solutions asit is not limited by the printer’s registration capacity and the size ofthe droplet. In addition, the crystalline domains can be aligned toyield more uniform device-to-device performance.

DiscussionPatterning, aligning, and controlling the charge transport ofOSCs are paramount for creating large-area organic electronics.Various techniques have been developed to pattern OSCs suchas templating, differential surface wetting, inkjet printing, androll-to-roll printing (e.g., gravure, offset, flexographic printing)(3, 9, 13–15, 17, 25–29, 52). However, these techniques generallyrequire extra steps to align the electrodes and the OSC layer,which can increase fabrication cost and reduce device yield.Inkjet printing (59–63) and roll-to-roll printing (27, 64–66) are thetwo most commonly used methods to fabricate organic circuits

Fig. 4. Bridged OTFT-based PMOS inverter. (A) Circuit diagram and designlayout of our PMOS inverter. The zoomed-in image depicts triangular design atthe top used to induce nucleation and to subsequently select one crystallinedomain to propagate down toward the electrodes. (B) Cross-polarized opticalimage of the triangular region showing nucleation and crystal growth. (Scalebar: 100 μm.) (C) Cross-polarized optical image showing a set of electrodesbridged with crystalline domains. (Scale bar: 100 μm.) (D) Representative voltagetransfer curve with corresponding gain versus VIN plot. Gain was 14.5.

Fig. 5. Logic gates and 2-bit half-adder circuit. (A) Circuit diagram of 2-bithalf-adder circuit. (B) Schematic layout of the 2-bit half-adder circuit design.Blue and yellow lines represent electrodes that are on the top and bottomof the dielectric layer, respectively, whereas red squares represent via holes.(C) Zoomed-out image of our circuit substrate. (Scale bar: 1 cm.) (D) Bright-fieldand crossed-polarized optical images of the 2-bit half-adder circuit, showingpatterned and aligned TIPS-pentacene crystals on the top electrodes and withinthe channel regions. (Scale bar: 500 μm.) (E) Input–output voltage characteristicsof our 2-bit half-adder circuit, showing proper logic functionality.

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and have the greatest potential for enabling large-area, low-costorganic electronics. These techniques, however, suffer from reg-istration inaccuracies requiring large features and speciallydesigned layouts and processes (27, 64, 66). The minimum fea-ture sizes also vary widely, typically in the tens of micrometersrange or higher (27, 67). These restrictions set a limit on the sizeand density of TFTs that can be achieved. Furthermore, in-homogeneity in film morphology and crystal orientation is also asignificant issue at larger length scales (27, 66) that can lead tovariability in electrical characteristics.In the CONNECT process, we use the electrodes to define the

solvent wetting regions. The OSCs only crystallize on the solventwetting electrodes and across the channel, effectively creatingself-patterned and precisely registered crystalline domains acrossthe channel. Because registration and feature size are not limitedby the capabilities of the instrument, our technique was able toachieve channel lengths and device-to-device pitch much smallerthan many other solution-based printing techniques (27, 67).Furthermore, unlike many other solution-based deposition meth-ods, our process is able to control the crystal orientation of thefilm during deposition, resulting in low variability in electricalproperties. We were able to fabricated OTFT arrays with 99%yield, previously unseen in literature. We believe that our yieldcan be further improved by optimizing shearing conditions, forexample by harnessing timescale of the diffusion lengths of theOSC in solution and matching it with the crystal growth rate.Using CONNECT, we created various logic gates and a 2-bit half-adder organic circuit to demonstrate that CONNECT is an in-dustrially feasible method to fabricate large-area organic elec-tronics. Finally, CONNECT was expanded to use with inkjet-printed silver electrodes, showing the versatility of this methodto accommodate various solution deposition and fabricationmethods of the rest of the components of the organic circuit.Our work represents a significant improvement in the formationof patterned OSCs and outlines a method of making complexorganic circuits.

Materials and MethodsMaterials. TIPS-pentacene, phenyl phosphonic acid, and thiophenol werepurchased from Sigma-Aldrich, and OTS was purchased from Gelest. Allchemicals were used as received (stored under an argon atmosphere toprevent hydrolysis). Silver nanoparticle ink for the inkjet-printed electrodeswas purchased from Sigma-Aldrich. Highly doped n-type silicon wafers (re-sistivity, <0.005 Ω·cm) with a 300-nm thermally grown silicon oxide gate di-electric layer (capacitance of the gate dielectric per unit area, Cox = 10 nF·cm−2)were used as the substrates for OTFT fabrication.

Substrate Preparation and Characterization. The 300-nm-thick SiO2 and siliconsubstrate were used as the dielectric layer and gate electrode, respectively.

Electrodes were patterned using photolithography followed by the thermalevaporation of 2-nm Cr and 40-nm Au. The electrode width was set at 10and 50 μm, whereas the channel length was set at 2 μm. The channel widthwas set at 500 or 1,000 μm. We note that side walls that are typically formedat the edge of the electrodes during the liftoff process resulted in poorlycontacting TIPS-pentacene with the electrodes (i.e., voids were typically seennear the interface). This issue was circumvented by using a liftoff layer (LOL)to render the edge of the electrodes smooth (Fig. S10). LOL that was usedwas LOL2000, and it was spin cast on the SiO2 surface at 3,000 rpm for 1 min.The LOL was then baked for 235 °C for 30 min. One micrometer of photo-resist 3612 was then deposited on top of the LOL followed by 1-min bake at90 °C. Exposure was conducted using ASML 5500 under 60 mJ/cm2, followedby standard development procedure. Thereafter, 2 nm of Ti and 40 nm of Auwere deposited, followed by liftoff in acetone; LOL was removed usingRemover PG. The LOL is not a photosensitive material; however, it developsat a faster rate than photoresists. Hence, after development, the edges ofthe photoresist are lifted off of the substrate, allowing the subsequentlydeposited metal to be lifted off without side walls. The patterned substratewas treated with O2 plasma at 200 mTorr and 150 W for 30 s. The substratewas then immersed in a 0.1% vol solution of OTS in trichloroethylene for20 min, followed by rinsing with toluene and heating for 10 min on a hotplate at 120 °C. Thereafter, the substrate was immersed in 0.33% vol solu-tion of thiophenol in ethanol for 10 s, followed by a toluene rinse. For inkjetprinting, silicon oxide/silicon substrate was treated with UV ozone (UV/O3) at28 mW·cm−2 for 45 s to increase surface energy (from ∼44 to 70 mJ/mm2) ofthe substrate, and thus to achieve well-defined electrode patterns. Ag inkwas printed on the substrate with a piezoelectric inkjet printer (DMP-2831;Dimatix Corporation) and then sintered at 150 °C for 30 min in air. For narrow-channel formation, a 1-pL-volume ink cartridge that has 9-μm-diameter noz-zles was used. The fabricated electrode width was about 30 μm; the channelwidth was 500 μm; and the channel length was about 15–20 μm. The OTStreatment was done on the inkjet-printed substrate using the same procedurestated above. The substrate was then immersed in 0.33% vol solution ofphenyl phosphonic acid in ethanol for 10 s, followed by toluene rinse.

Solution Shearing of TIPS-Pentacene Films. The TIPS-pentacene solution wasprepared at a concentration of 16 mg·mL−1 in toluene. Both the devicesubstrate and the shearing plate were held in place by vacuum while thedevice substrate was mounted on a resistively heated stage (a thermoelectricmodule from Custom Thermoelectric) held at 80 °C. After placing ∼50 μL·cm−2

of TIPS-pentacene solution on the device substrate, the shearing plate waslowered with a micromanipulator to make contact with the solution. Thedevice substrate was horizontal while the shearing plate was placed at a tiltangle of 1° from the horizontal. The gap distance between the device sub-strate and the shearing plate was fixed at 100 μm. The shearing plate wastranslated at different velocities by a stepper motor around 0.4 mm·s−1. Theresulting sheared film was left on the heating stage for 2–3 min at 90 °C toremove residual solvent. The meniscus contacts both the top and bottomsubstrate for the duration of our experiment; the solution does not dewetcompletely from either the shearing plate or the bottom substrate.

Solution-Sheared Film Characterizations. The solution-sheared films werecharacterized using a cross-polarized optical microscope (Leica DM4000M).Tapping-mode AFMwas performed using a Multimode Nanoscope III (DigitalInstruments/VeecoMetrologyGroup). Electricalmeasurementswere conductedin a glove box under nitrogen using Keithley 4200 SC semiconductor analyzer.

Fabrication of Organic Circuit. Standard photolithography was used to patternthe bottom-gate bottom-contact logic gates and circuits. The gate and thesource drain electrodes were composed of 2 nm of Cr and 40 nm of Au. The300 nm of silicon oxide was deposited on gate electrode using low-pressurechemical vapor deposition. Via holes were made using wet-chemical HF etching.

ACKNOWLEDGMENTS. Z.B.’s group thanks the National Science Foundation(DMR-1303178), AFOSR (FA9550-12-1090), and Kodak Graduate Fellowship forfunding. J.H. and Y.H. thank the Center for Advanced Soft-Electronics fundedby the Ministry of Science, Information and Communications Technology,and Future Planning as Global Frontier Project (CASE-2012M3A6A5055728).Y.H. also thanks Seoul National University, SBS Foundation, and Korea Foun-dation for Advanced Studies for their financial support during his sabbaticalyear at Stanford.

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Fig. 6. Optical imaging of bridged TIPS-pentacene crystals on inkjet-printedsilver electrodes. (A) Cross-polarized optical microscope image of the pat-terned TIPS-pentacene thin films on an array of silver electrodes. (Scale bar:500 μm.) The Inset is a zoomed-in cross-polarized image of one of the TFTsshowing TIPS-pentacene extending from one electrode to the other. (Scalebar: 100 μm.) (B) Transfer characteristics of several TFTs operated atVDS = −50 V.The 300-nm SiO2 and silicon substrate were used as dielectric layer and gateelectrode, respectively.

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