Lab1_opamp
5
Philippine Institute for Integrated Circuits Rm. 413 UP NEC Building, Osmeña Avenue, University of the Philippines Diliman, Quezon City, Philippines 1101 [email protected] (632) 9969293 Lab 1: Multi-stage Amplifiers Introduction: We learned from the discussion that single stage amplifiers are not enough to satisfy the requirements of actual amplifiers. However, we can combine different single-stage topologies to come up with an amplifier which satisfies all the requirements. In this exercise, you will simulate 2 commonly used multi-stage amplifiers: (1) CS-CS and (2) CS-CG or cascode. Both amplifiers provide very high voltage and high output impedance. You will compare the performance of these amplifiers using DC and AC simulations. The circuit schematics are already in your working directories. Look into library named lab1. At the end of this exercise, you should be able to describe the advantage of one topology over the other. Procedure: Part I 1. Open the schematic Library: lab1, Cell name: cscs. DC Analysis 2. Simulate Vout VS Vin and measure the DC gain. Sweep the DC input from 0 to 1V. Use a 0.0001 step size to have accurate result. a. Determine the maximum gain. b. Determine the input bias for maximum gain. c. Determine the range of input have a gain within 10% of maximum. d. Determine the range of input and output where the voltage gain is linear. 3. Simulate the small signal parameters of each stage. Bias the amplifier at the maximum gain. e. Determine the gm and Ro, cgs, cgd and cdb of each stage. Use dcOpInfo to get the required parameters. f. From these parameters, calculate the total two port parameters. Page 1
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Transcript of Lab1_opamp
Philippine Institute for Integrated Circuits
Rm. 413 UP NEC Building, Osmea Avenue, University of the Philippines Diliman, Quezon City, Philippines 1101
[email protected] (632) 9969293
Lab 1: Multi-stage Amplifiers
Introduction:We learned from the discussion that single stage amplifiers are not enough to satisfy the requirements of actual amplifiers. However, we can combine different single-stage topologies to come up with an amplifier which satisfies all the requirements. In this exercise, you will simulate 2 commonly used multi-stage amplifiers: (1) CS-CS and (2) CS-CG or cascode. Both amplifiers provide very high voltage and high output impedance. You will compare the performance of these amplifiers using DC and AC simulations. The circuit schematics are already in your working directories. Look into library named lab1. At the end of this exercise, you should be able to describe the advantage of one topology over the other.
Procedure:
Part I1. Open the schematic Library: lab1, Cell name: cscs.
DC Analysis
2. Simulate Vout VS Vin and measure the DC gain. Sweep the DC input from 0 to 1V. Use a 0.0001 step size to have accurate result.a. Determine the maximum gain. b. Determine the input bias for maximum gain. c. Determine the range of input have a gain within 10% of maximum. d. Determine the range of input and output where the voltage gain is linear.
3. Simulate the small signal parameters of each stage. Bias the amplifier at the maximum gain.e. Determine the gm and Ro, cgs, cgd and cdb of each stage. Use dcOpInfo to get the required parameters.f. From these parameters, calculate the total two port parameters.g. Estimate the pole locations. (Note: Account for Miller Effect.)h. Simulate the two-port parameters and compare with calculations.
AC Analysis
4. Make AC Magnitude = 1 of the input and simulate the frequency response (AvdB20 VS frequency).i. Determine the Bandwidth and Unity Gain Frequency.j. Compare the pole locations with your calculations from 3rd step.
Milestone 1Answer:2: a) ___________________________________________________________________________b) ___________________________________________________________________________c) ___________________________________________________________________________d) ___________________________________________________________________________
3: e) ___________________________________________________________________________f) ___________________________________________________________________________g) ___________________________________________________________________________h) ___________________________________________________________________________4: i) ___________________________________________________________________________j) ___________________________________________________________________________
Part II1. Open the schematic Library: lab1, Cell name: cscg.
DC Analysis
2. Simulate Vout VS Vin and measure the DC gain. Sweep the DC input from 0 to 1V. Use a 0.0001 step size to have accurate result.a. Determine the maximum gain. b. Determine the input bias for maximum gain. c. Determine the range of input have a gain within 10% of maximum. d. Determine the range of input and output where the voltage gain is linear.
3. Simulate the small signal parameters of each stage. Bias the amplifier at the maximum gain.e. Determine the gm and Ro, cgs, cgd and cdb of each stage. Use dcOpInfo to get the required parameters.f. From these parameters, calculate the total two port parameters.g. Estimate the pole locations. (Note: Account for Miller Effect.)h. Simulate the two-port parameters and compare with calculations.
AC Analysis
4. Make AC Magnitude = 1 of the input and simulate the frequency response (AvdB20 VS frequency).k. Determine the Bandwidth and Unity Gain Frequency.l. Compare the pole locations with your calculations from 3rd step.
Milestone 1Answer:2: a.___________________________________________________________________________b.___________________________________________________________________________c. ___________________________________________________________________________d. ___________________________________________________________________________
3: e. ___________________________________________________________________________f. ___________________________________________________________________________g. ___________________________________________________________________________h. ___________________________________________________________________________
4: i. ___________________________________________________________________________j. ___________________________________________________________________________
Milestone 3
1. What limits the Bandwidth of the CS-CS amd CS-CG?
Answer: _________________________________________________________________________
2. Given the output impedance of the two amplifiers, which is better in driving a resistive load?
Answer: _________________________________________________________________________
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