L24-ProcessorRegisterOrga
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Transcript of L24-ProcessorRegisterOrga
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CPU must:Fetch instructions
Interpret instructions
Fetch data
Process data
Write data
Organizational requirements that are derived from these
functions:
ALU
Control logic
Temporary storage
Means to move data and instructions in and around the CPU
Processor organization
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CPU With System Bus (External view of the CPU)
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Internal Structure Of CPU
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Register Organization
Registers form the highest level of the memoryhierarchy:
Small set of high speed storage locations
CPU must have some working space (temporarystorage for data and control information), which are
called registers
Number and function vary between processor designs
One of the major design decisions
Top level of memory hierarchy
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Two types of registers
User-visible May be referenced by assembly-level
instructions and are thus visible to the
user
Control and status registers
Used to control the operation of the CPU Most are not visible to the user
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User-visible RegistersGeneral categories based on function
General purpose Can be assigned a variety of functions
Ideally, they are defined orthogonally to the operations
within the instructions
Data
These registers only hold dataAddress
These registers only hold address information
Examples: general purpose address registers, segment
pointers, stack pointers, index registers
Condition codes Visible to the user but values set by the CPU as the result
of performing operations
Example code bits: zero, positive, overflow
Bit values are used as the basis for conditional jump
instructions
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Design trade off between general purpose and specialized registers
General purpose registers maximize flexibility in instructiondesign
Special purpose registers permit implicit register specification in
instructions reduces register field size in an instruction
No clear best design approachHow many registers are enough
More registers permit more operands to be held within the CPU --
reducing memory bandwidth requirements to some extent
More registers cause an increase in the field sizes needed to
specify registers in an instruction word Locality of reference may not support too many registers
Most machines use 8-32 registers
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How big (wide)
Address registers should be wide enough to hold the longest
address
Data registers should be wide enough to hold most data types
Would not want to use 64-bit registers if the vast majority
of data operations used 16 and 32-bit operands
Related to width of memory data bus Concatenate registers together to store longer formats
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Control and status registersThese registers are used during the fetching, decoding and
execution of instructions Many are not visible to the user/programmer
Some are visible but can not be (easily) modified
Typical registers
Program counter Points to the next instruction to be executed
Instruction register
Contains the instruction being executed
Memory address register
Memory data/buffer register
Program status word(s)
Superset of condition code register
Interrupt masks, supervisory modes, etc.
Status information
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CPU Register Classification:
1 User-visible registers
General Purpose
Data
Address
Condition Codes
2 Control and status registers