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Page 1: Junctionless silicon nanowire transistors for the tunable operation of a highly sensitive, low power sensor

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Sensors and Actuators B 183 (2013) 1– 10

Contents lists available at SciVerse ScienceDirect

Sensors and Actuators B: Chemical

journa l h om epage: www.elsev ier .com/ locat e/snb

unctionless silicon nanowire transistors for the tunable operation of a highlyensitive, low power sensor

lizabeth Buitragoa,∗, Giorgos Fagasb, Montserrat Fernández-Bolanos Badiaa,ordan M. Georgievc, Matthieu Berthoméa, Adrian Mihai Ionescua

Nanoelectronic Devices Laboratory (Nanolab), École Polytechnique Fédéral de Lausanne (EPFL), Station 11, Bâtiment ELB 336, CH-1015 Lausanne, SwitzerlandTheory, Modelling & Design Centre, Tyndall National Institute, University College Cork, Lee Maltings, Dyke Parade, Cork, IrelandMaterials Chemistry and Analysis Group, Department of Chemistry and Tyndall National Institute, University College Cork, Lee Maltings, Dyke Parade, Cork, Ireland

a r t i c l e i n f o

rticle history:eceived 24 November 2012eceived in revised form 7 March 2013ccepted 11 March 2013vailable online xxx

eywords:unctionlessSFETanowireensor

a b s t r a c t

Silicon nanowire (SiNW) field effect transistors (FETs) have been widely investigated as biological sensorsfor their remarkable sensitivity due to their large surface to volume ratio (S/V) and high selectivity towardsa myriad of analytes through functionalization. In this work, we propose a long channel (L > 500 nm)junctionless nanowire transistor (JNT) SiNW sensor based on a highly doped, ultrathin body field-effecttransistor with an organic gate dielectric εr = 1.7. The operation regime (threshold voltage Vth) and elec-trical characteristics of JNTs can be directly tuned by the careful design of the NW/Fin FET. JNTs areinvestigated through 3D Technology Computer Aided Design (TCAD) simulations performed as a functionof geometrical dimensions and channel doping concentration Nd for a p-type tri-gated structure. Two dif-ferent materials, namely, an oxide and an organic monolayer, with varying dielectric constants εr providesurface passivation. Mildly doped Nd = 1 × 1019 cm−3, thin bodied structures (fin width Fw < 20 nm) with

in FETensitiveeference electrode

an organic dielectric (εr = 1.7) were found to have promising electrical characteristics for FET sensorstructures such as Vth ∼ 0 V, high relative sensitivities in the subthreshold regime S > 95%, high transcon-ductance values at threshold gm,Vfg=0 V > 10 nS, low subthreshold slopes SS ∼ 60 mV/dec, high saturationcurrents Id,max ∼ 1–10 �A and high Ion/Ioff > 104–1010 ratios. Our results provide useful guidelines forthe design of junctionless FET nanowire sensors that can be integrated into miniaturized, low powerbiosensing systems.

Abbreviations: SiNW, silicon nanowire; FET, field effect transistors; S/V, surfaceo volume ratio; JNT, junctionless transistor; Vth, threshold voltage; �r, dielectriconstant; TCAD, Technology Computer Aided Design; Nd, Nch, channel doping con-entration; Fw, fin width; gm,Vfg=0 V, transconductance at Vfg = 0 V; S, sensitivity; SS,ubthreshold slope; Id,max, saturation current; RE, reference electrode; ISFET, ionensitive field effect transistor; MOSFET, metal oxide semiconductor field effectransistor; Vref, reference electrode potential; Vlg, local gate potential; Id, drainurrent; DNA, deoxyribonucleic acid; PSA, prostate specific antigen; VOC, volatilerganic carbon; �D, Debye screening length; Vd, drain voltage; R, radius; BG, backate; SOI, silicon on insulator; SiO2, silicon dioxide; td, dielectric thickness; Fh, fineight; L, length; S/D, source/drain; BOX, buried oxide; gm, transconductance; Vfg,

ront gate voltage; Vfb, flat band voltage; q, charge; �, mobility; G, conductance; Smax,aximum sensitivity; �, normalized Plank’s constant; m*, effective carrier mass;

MS, work function difference between gate material and silicon; εsi , silicon per-ittivity; Cox, gate dielectric capacitance per unit length; c, fitting parameter; UT,

hermal energy; K, Boltzmann constant; Qm, mobile charge density; gm,max, maxi-um transconductance; B, boron; �, gate work function; SRH, Shockley–Read–Hall.∗ Corresponding author. Tel.: +41 21 693 3973.

E-mail addresses: [email protected] (E. Buitrago),[email protected] (G. Fagas), [email protected]. Badia), [email protected] (Y.M. Georgiev),

[email protected] (M. Berthomé), [email protected] (A.M. Ionescu).

925-4005/$ – see front matter © 2013 Elsevier B.V. All rights reserved.ttp://dx.doi.org/10.1016/j.snb.2013.03.028

© 2013 Elsevier B.V. All rights reserved.

1. Introduction

The ISFET (ion sensitive field effect transistor) introduced byBergveld in 1970 [1–3] is analogous to a MOSFET (metal oxide semi-conductor field effect transistor) except that the gate channel isexposed to a solution and therefore ions or charged molecules at thesurface of the channel act as a gate [4]. In comparison to a MOSFETwhere the gate electrode has direct contact with the gate dielectric,a reference electrode Vref or local gate Vlg electrode is instead typi-cally inserted into the analyte contacting the gate. Ions in solutionor charged molecules influence the gate potential so that they canexert electrostatic control on the source to drain current Id [4].

When charged analyte molecules adsorb on a NW an electricfield created on the surface exerts an effect both inside and out-side of the semiconductor channel. Nanosensor structures such asSiNWs have the potential to provide fast, low cost, low power, labelfree detection, real time response, high throughput analysis and

insight into biological processes while not requiring large samp-ling quantities [5,6]. Due to the small size (large S/V) of SiNWsthe presence of a few charged biological molecules on their sur-face can modulate the carrier distribution over their entire cross
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E. Buitrago et al. / Sensors

ectional conduction pathway making the devices highly sensitiveompared to the traditional planar sensor that Bergveld introduced7]. It has also been found that decreasing the size of the nanowireecreases the electrostatic capacitances that provides for fasteresponse times [8].

Since their first implementation for pH sensing by Cui et al. [6],iNW FETs have been investigated for a large number of biosensorpplications such as disease marker screening [9,10], monitoringf explosive materials [11], non-invasive clinical testing and earlyiagnostics of asymptomatic diseases such as diabetes and can-er [12,13]. Ultra-low detection with high specificity towards aarticular analyte (simple molecules [6,14–16], proteins [13,17],NA [18], viruses [15]) is possible through functionalization of theiNW surface. Some of the most notable examples in literatureith high potential for clinical diagnostics are the fM detection ofrostate specific antigen (PSA) a protein marker for prostate can-er [9,10], the detection of breast cancer serum biomarker proteinA15.3 down to 110 pM (limit relevant for clinical applications)13], the specific ssDNA strand recognition for genetic diseasenalysis [19] and enzyme modified (urease) SiNW FET for lowetection (mM) of urea in biofluids [20]. Highly sensitive detectionf polar (N2O, NO, CO, etc.) and non-polar analytes (hexane, octane,tc.) in the gas phase through an appropriate surface functional-zation protocol (i.e., organic receptor attachment) has also beenhown [16,21] making NW FETs interesting even for the detectionf volatile organic carbons (VOCs) disease biomarkers present inuman breath or for environmental monitoring. All these exam-les serve to demonstrate the potential that SiNWs offer in generalor future sensing applications.

The reference electrode is normally an indispensable part ofhe ISFET measurement set-up. Its function is to provide a sta-le electrical contact to the test electrolyte and define the electricotential of the sensing liquid or the operation point of the FETensor. It must also provide for an electrode–electrolyte interfaceotential that does not vary with electrolyte composition so thathanges in Id of the ISFET are a measure only of changes in itslectrolyte–insulator interface [22]. Device sensitivity is dependentn the operating point at which sensor measurements are carriedut. The subthreshold region has been found to have the optimalensitivity (highest conductance response) for enhancement modeW sensors [9,23]. In this regime, the NW is nearly depleted ofarriers with a much larger screening length �D in comparisono its radius R allowing for molecular gating to occur through-ut the whole cross section of the structure [9,23]. Commercialeference electrodes (i.e.: Ag/AgCl or calomel) though stable, theyre bulky, expensive and their inclusion in sensing measurementsrohibits the successful integration of FET sensors into miniatur-

zed, portable, low cost systems. Therefore use of a noble metalseudo reference electrode (Vgate) integrated into a differential pairISFET/REFET) circuit has been previously explored [3,22,24,25].he differential ISFET/REFET pair configuration allows for the usef a solid state noble metal local electrode that can be patterned byhotolithography on chip versus the use of an external, large and

ntrusive reference electrode. We may also set the operation pointfor maximum sensitivity) by back-gating (BG) [26,27], but is alsoot appropriate for low-power device applications as high voltagesre needed in order to induce inversion, accumulation or depletionhrough the backgate insulator.

In this work, we seek to tune the operation point of a JNT sen-or by the careful design of the NW/Fin geometrical dimensions,oping concentration and gate insulator. The JNT having a uniformnd usually highly doped source/channel/drain can provide high

rain currents and a tunable threshold voltage [28] for maximumensitivity. Fig. 1a shows a schematic diagram of the proposed p-ype junctionless sensor in a silicon on insulator (SOI) substrate. Theource/drain S/D metal pads need to be insulated from the liquid

ctuators B 183 (2013) 1– 10

sensing environment. Fig. 1b shows an n-channel junction-basedenhancement SiNW based sensor for comparison. Either sensorcan be integrated into a differential pair circuit or a conventionalreference electrode can also be used.

2. Background to nanowire sensor design

2.1. The junctionless transistor

JNTs are said to be junctionless because the source and drainextensions have the same type and doping concentration as theconduction channel (i.e.:P+−P+−P+, N+−N+−N+) [29–32]. They havehigh doping channel concentrations and with no p–n junctions ordoping gradients they are essentially resistors with a gate elec-trode that controls the carrier density [28,29,33–35]. The operationof the JNT is based on the depletion or accumulation of carriersin the highly doped semiconductor channel [30,32]. JNTs featurebulk conduction as opposed to surface conduction [31,36] mak-ing them an interesting candidate for NW FET biosensor deviceswith high S/V ratios. Having no doping concentration gradientsgreatly simplifies the fabrication process, reduces variability andrelaxes thermal budget requirements since there is no impuritydiffusion during thermal processing steps [34,36,37]. Furthermore,the threshold voltage can be easily varied by changing differ-ent parameters such as the width, height, doping and surfacepassivation/dielectric characteristics. These are all advantageousqualities for the fabrication of miniaturized sensor devices and theirheterogeneous integration with other components. There are pow-erful market drivers for 3D design and integration as we reach atechnological, performance, and cost limit to Moore’s law of scal-ing [38] such as the need to reduce the system’s footprint andinterconnect parasitics for faster operation [39]. One importanttechnological goal aims at the complete integration of a reliableheterogeneous system for which parts can better be fabricated andtested separately and combined possibly as modular componentswhile operating at low powers and ambient conditions [40]. Thereis therefore tremendous potential for JNT sensors in heterogeneousnanosystems for non-invasive clinical diagnostics, portable, anddisposable applications.

2.2. Sensing interface

Another aspect that deserves some thought when designing asensor structure is the surface passivation material which acts as agate dielectric. The SiNW–dielectric interface is important for theelectrical stability of the device. SiO2 is not the best pH selectivematerial as it does not provide a stable contact between the liq-uid and the sensor [1]. Since protons can penetrate the S-oxidelayers leading to large leakage current, different dielectrics (i.e.:alumina) have been deposited in order to efficiently suppress thisissue [23]. The protection layer should be as thin as possible inorder to maintain the sensitivity of the device. It has been found inliterature that the passivation of the silicon surface via strong cova-lent Si–C bonds can provide well defined and stable monolayerswith insulating properties superior to that of native oxide [41,42].Two different dielectric materials are therefore investigated in thisstudy. First, the dielectric constant εr = 1.7 of the organic monolayerSiC16H33 passivating an oxide free silicon surface as determined

employed in future work assuming that the dielectric proper-ties of this organic monolayer are similar to the functionalizationof interest. SiO2 as a gate dielectric material (εr = 3.19) was alsoinvestigated.

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E. Buitrago et al. / Sensors and Actuators B 183 (2013) 1– 10 3

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ig. 1. (a) Schematic of JNT SiNW SOI junctionless sensor system. Source–channel–b) Schematic of n-channel enhancement mode SiNW SOI sensor system. N–P S/D j

. Methods

.1. TCAD simulation study

Different junctionless transistor devices have been studied byD TCAD simulations. Fig. 2 shows the top side view of the meshedimulated structure. The geometric parameters (fin height Fh, finidth Fw and channel length L indicated in Fig. 2) as well as the

unctionless channel doping concentration Nd, have been variedn order to find the optimal device characteristics for a low powernd high sensitivity sensor. The dielectric thickness td, source/drainS/D) extensions, and buried oxide (BOX) are also displayed in thechematic.

3D TCAD simulations using Sentaurus Device e.2010.12 haveeen performed as a function of gate dielectric constant (εr = 1.7,.9), geometrical dimensions (fin channel length L = 0.5, 1, 2 �m,n height Fh = 10, 20, 30, 45 nm and width Fw = 10, 20, 30 nm)nd doping concentration (boron B, Nd = 1018 cm−3, 1019 cm−3,

× 1019 cm−3) for a p-type Si–NW/fin tri-gated junctionless FET.he fin width Fw, height Fh, channel L, dielectric thickness td, andource/drain (S/D) extensions are displayed in the schematic ofig. 1. For sensing applications, long channels L > 100 nm are neces-ary to guarantee biological interaction with the NW surface and areherefore also studied here. The simulations were built to include45 nm of buried oxide (BOX) (displayed in the schematic of Fig. 2)

ith varying silicon fin heights and widths to resemble the silicon

n insulator (SOI) Fin FET based structure currently being fabri-ated. The lateral S/D extensions are 10 nm on each side of the gate

Fig. 2. 3D and cross section of simulated tri-gate junctionless structure.

egions have same type P+–P+–P+ and doping concentrations Nd, without junctions.ns are clearly shown in schematic.

channel. The S/D contacts are simulated as ohmic. The junction-less transistor is gated from the front-side resembling a tri-gateFET (multigate fin). The front gate voltage Vfg is swept keepingthe back-gate grounded Vbg = 0 V for high and low drain voltagepotentials of Vd = −1 V and −50 mV. The gate electrode was sim-ulated as N+ polysilicon (2 × 1020 cm−3, workfunction ϕ = 4.1 V).Similar enhancement mode devices with εr = 1.7 and L = 500 nmwere also simulated as a function of fin height Fh = 10, 20, 30, 45 nmand width Fw = 10, 20, 30 nm. The enhancement mode simulateddevice is N-type (p-type substrate, n-channel). For our simulationsthe source is grounded VS = 0. The source and drain extensionsare doped n-type phosphorous NSD = 2 × 1020 cm−3. The nanowirechannel is p-doped Boron with a changing channel doping concen-tration from Nch = 1016 cm−3 to 1019 cm−3. All simulated devicesare gated from the front and from the sides, in a tri-gate FET archi-tecture. The drain current Id is iteratively computed by solving thePoisson’s and continuity’s majority carrier equations (holes for JNTand electrons for enhancement) throughout the cross-section ofthe fin. The drift-diffusion model is used for the carrier transport inthe semiconductor without impact ionization. A mobility degrada-tion model is also being implemented for carrier scattering effectsin highly doped semiconductors for the JNT simulated devices. Adoping dependent carrier mobility model was also included aswell as an electric field dependent model with Shockley–Read–Hall(SRH) carrier recombination/generation.

3.2. Experimental

A p-doped (1018 cm−3) SOI wafer with top Si device layerof 45 nm and buried oxide (BOX) layer of 145 nm was used inthis study for the fabrication of JNTs. Devices were patternedwith electron beam lithography (EBL) using a high-contrast andlow roughness development process for the negative tone resisthydrogen silsesquioxane (HSQ) [43,44], followed by a chlorine (Cl)chemistry based reactive ion etching (RIE). After device pattern-ing, an additional 200 nm SiO2 layer was deposited on the wholesurface, except the device regions, to minimize the leakage currentthrough the buried oxide. Next, the source/drain metal contactswere created by a self-aligned platinum (Pt) silicidation processwith thermal annealing for 30 min at 425 ◦C in forming gas (10%H2/90% N2). Then, a 40 nm nickel (Ni) interconnection layer wasdeposited and thermally annealed at the same conditions as above.

Finally, a passivation layer of 500 nm SiO2 was deposited againon the whole surface, except the device regions and metal pads.These three subsequent depositions were done by electron beamevaporation and were respectively combined with three steps of
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hotolithography and lift-off. Electrical measurements of devicesere done using cascade manual probe station and Agilent semi-

onductor analyser B1500.

. Simulation results

.1. Transfer and output characteristics of simulated devices

Simulated drain current curves as a function of front gate volt-ge (Id – Vfg) at low (Vd = −50 mV) and high drain bias (Vd = −1 V)re presented in Fig. 3a (left-axis) for a structure with Fw = 10 nm,h = 45 nm, εr = 1.7, Nd = 1018 cm−3, and L = 500 nm. The right axishows the calculated transconductance gm = (dId/Vfg) which can bendicative of device sensitivity. This figure illustrates the differentNT conduction regimes: (i) Vfg � Vth for flatband Vfb, the point at

hich the current is Id = q�Nd(FwFh)Vd/L (q: charge and �: holeobility) and the JNT becomes a simple resistor, (ii) Vfg < Vfb accu-ulation, (iii) Vfg = Vfb flatband, (iv) Vfb < Vfg < Vth partial channel

epletion, and (iv) Vfg = Vth threshold. Fig. 3b shows the Id − Vdutput characteristics for devices with Fw = 10 nm, Fh = 45 nm,

= 500 nm, Nd = 1018 cm−3 and two different gate dielectrics εr = 1.7organic monolayer) and εr = 3.9 (SiO2). We can see the normalperation of a p-type junctionless device transitioning from lin-ar to saturation regimes as the drain voltage increases towardsore negative values. As expected, below threshold (Vfg > Vth) the

-doped device is off and the drain current Id drops to very low val-es. As the gate voltage increases the channel becomes depletedf majority carriers (holes) and shuts off even for increasing neg-tive drain voltages. Above Vth, as the drain voltage is increasedtowards higher negative drain voltage values) the height of theotential barrier that impedes carriers’ flow (hole conduction cur-ent) through the channel is decreased and the current increases in

linear fashion with increasing Vd until saturation is reached. Ataturation, the drain current Id reaches a constant value indepen-ent of the drain bias Vd. The gate potential efficiently modulateshe channel conductance and shuts-off the JNT device for bothielectrics. Fig. 3 curves are representative of all simulated deviceso be presented here.

The simulated Id − Vfg for structures with Fw = Fh = 10 nm,ength L = 500 nm and different channel doping concentrationsd = 1018 cm−3, 1019 cm−3, 2 × 1019 cm−3 are shown for two dif-

erent gate dielectrics εr = 1.7 (Fig. 4a) and for SiO2 εr = 3.9 (Fig. 4b).

he right axes (light shade) shows the linear Id − Vfg curves (Fig. 4a)nd calculated transconductance (Fig. 4b) respectively. The simu-ated Id − Vfg for enhancement mode devices with Fw = Fh = 10 nm,ength L = 500 nm and different channel doping concentrations

tials for a device with Fw = 10 nm, Fh = 45 nm, Nd = 1018 cm−3, εr = 1.7 and L = 500 nm.= 10 nm, Fh = 45 nm, L = 500 nm for Nd = 1018 cm−3 for different gate dielectrics.

Nch = 1016 cm−3, 1017 cm−3, 1018 cm−3 and 1019 cm−3 for εr = 1.7 athigh drain vias Vd = 1 V are shown in Fig. S1 of the supplementaryinformation.

4.2. Sensitivity

Enhancement mode SiNW/Fin FET-based sensors have beenfound to be extremely sensitive to surface charge perturbationsand their sensitivity changes as a function of Fw, Fh and L dimen-sions [19,45–49]. In particular, the sensitivity of these structuresincreases as a function of increasing surface to volume ratio [50].For such devices, when the cross sectional dimensions are compara-ble to the screening length �D molecular gating is more efficient andbetter control of the conducting channel is achieved. Nanometer-scale cross-sections lead to depletion or accumulation of carriersin the bulk of the device when a charged biomolecule binds tothe surface, versus surface-only modulation for ISFET planar sen-sor [18,50–52]. As the channel doping concentration determinesthe Debye length (�D˛

√1/Nd) for these NWs it has been shown

in literature that lightly doped channels exhibit greater sensitivi-ties than highly doped or undoped [46–48]. Typically, sensitivityis defined as the relative variation of current (or conductance G)(Id 0 − Id 1)/Id 0 due to a difference in the external potential (here,� = ( 1 − 0 = 110 mV)). For the NW/Fin dimensions investigatedhere (Fh ≤ 45 nm, Fw ≤ 30 nm) all enhancement mode devices sim-ulated show high maximum sensitivities S > 98%. Fig. S2 in thesupplementary information shows S and Id as a function of Vov withincreasing Nch and for Fh = 10 nm, Fw = 30 nm εr = 1.7, L = 500 nm forenhancement mode devices as an example. The high sensitivitiesfound are due to the small cross sections and high S/V that allow foran excellent gate electrostatic control even at high channel dopingconcentrations. This can be more clearly seen by the extractedsubthreshold slopes SS ∼ 60 mV/dec shown in Fig. S10 of the sup-plementary section.Fig. 5a shows S and Id as a function of overdrivevoltage VOV = Vfg − Vth for different junctionless channel dopingconcentrations and Fw = Fh = 10 nm, εr = 1.7, L = 500 nm. In this figurewe can see that high sensitivities (S ∼ 98 %) are possible with junc-tionless devices with the relative sensitivity being the highest inthe subthreshold regime (S > 98%). Furthermore, it is still possible tohave high sensitivities (S > 80%) and measure high output currents(Id > nA) above threshold. In this figure we can see that for deviceswith small cross sections (10 nm × 10 nm) the relative sensitivity

does not change significantly with increasing doping concentra-tion and the same Smax is observed at subthreshold. Fig. 5b alsoshows that the Smax for thin fin devices (Fw = 10 nm) is almostunchanged with increasing Fh and only when the doping channel
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E. Buitrago et al. / Sensors and Actuators B 183 (2013) 1– 10 5

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r = 1.7 (a), εr = 3.9 (b). The right axes of (a) shows the respective linear Id − Vfg curv

oncentration increases to Nd = 2 × 19 cm−3 the sensitivity changesoticeably (reduction) with Fh. The maximum sensitivity for all thinw = 10 nm structures is still high and greater than 98%.

Fig. 6(a) shows S and Id as a function of Vov with increasing Fw

nd for Fh = 10 nm, εr = 1.7, L = 500 nm. Fig. 6(b) shows the Smax asunction of increasing Fw for different Nd when Fh = 10 nm, εr = 1.7,

= 500 nm. One can see from these figures that again the maximumensitivity does not change significantly with increasing Fw excepthen the doping concentration increases to Nd = 2 × 1019 cm−3.hen Nd = 2 × 1019 cm−3 the Smax decreases considerably with

ncreasing Fw (Smax = 68% for Fw = 30 nm, when Nd = 2 × 1019 cm−3).

.3. Threshold voltage

In this work the threshold voltage Vth was defined as the voltageor which the drain current reaches a value of Id = (100nA ∗ Fw/L)s it is typically defined in industry [37]. Fig. 7 shows the extractedth values for the simulated JNT devices as a function of increas-

ng Fh values for different Nd and with a gate dielectric constantf εr = 1.7 (Fig. 7a) and εr = 3.9 (Fig. 7b) while keeping constantw = 10 nm. Similarly, Fig. 8a and b shows the Vth for differentoping concentrations with increasing Fw and increasing junc-ionless channel length respectively (εr = 1.7 and Fh = 10 nm). Fig.1 in the supplementary information shows the Vth for differentoping concentrations with increasing Fw when εr = 3.9 with con-

tant Fh = 10 nm and L = 500 nm.

For good electrostatic control, the cross section area FhFw needso be small enough to allow depletion of carriers and efficientlyurn-off the JNT [30]. Figs. 7 and 8a show that for increasing

ig. 5. (a) Relative sensitivity S for junctionless devices with increasing Nd, Fw = Fh = 10 nmd − Vov (right). (b) Maximum sensitivity Smax as function of increasing Fh for different Nd

tials for a device with Fw = Fh = 10 nm, L = 500 nm and increasing Nd for a device with (b) the transconductance gm.

doping concentrations it is harder to turn off the device for a givenFw and Fh. The threshold voltage increases and goes from negativetowards more positive values as the fin height and doping concen-trations increase in agreement with literature results [53]. For lowdoping concentrations the Vth variation is minimal neverthelessfor all Fh, Fw, L and it changes the most when Nd = 2 × 1019 cm−3.When Nd = 1018 cm−3, and εr = 1.7, the threshold voltage shift is�Vth = 0.093 V with increasing Fh from 10 to 45 nm, whereas whenNd = 2 × 1019 cm−3 �Vth = 0.890 V (Fig. 7a). For low doping levels,the side gates are enough to completely deplete the channel; the topgate does not have any impact, which translates into Vth depend-ing only on Fw. With a high doping level, the side gates are notenough to deplete completely the channel, which translates into Vthdepending more on the height (relates to the thickness that the topgate has to deplete in order to turn off the device). The Vth variationwith Fh and Fw is not as pronounced for devices with SiO2 dielectricconstants (εr = 3.9, Fig. 7b and S3 in the supporting information), i.e.:when Nd = 2 × 1019 cm−3, �Vth = 0.414 V as the Fh is increased from10 to 45 nm (Fig. 7b), almost 50% less than when εr = 1.7 (Fig. 7a).Though threshold voltage variation increases with doping concen-tration, it is also not as pronounced for devices with fin widthsof 10 nm in accordance with previous literature results that haveshown that for small cross section structures (<10 nm × 10 nm) theVth change with doping concentration is almost negligible [54]. It istherefore possible to reduce threshold voltage variability because

device layer thickness reproducibility is not an issue: current SOItechnology allows for the manufacture of wafers with ultra-thinsilicon device layers (below 50 nm) with tight uniformity specifi-cations within a few Angstroms (6 sigma range of less than 1 nm),

, εr = 1.7, L = 500 nm when Vd = −1 V as a function of VOV (left axis) and correspondingwith constant Fw = 10 nm, εr = 1.7, L = 500 nm, Vd = −1 V.

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6 E. Buitrago et al. / Sensors and Actuators B 183 (2013) 1– 10

Fig. 6. (a) Relative sensitivity S for junctionless devices with increasing Fw, high doping concentration Nd = 2 × 19 cm−3, Fw = 10 nm, εr = 1.7, L = 500 nm, Vd = −1 V as a functionof VOV (left axis) and corresponding Id − Vov (right). (b) Maximum sensitivity Smax as function of increasing Fw for different Nd with constant Fh = 10 nm, εr = 1.7, L = 500 nm,Vd = −1 V.

F Fw = 1o ].

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ig. 7. Vth variation as a function of Fh for different Nd for JNT devices with constantpen symbols show the corresponding calculated Vth using de Sauza’s model [28,53

elow 2% [55]. The variation in the width highly depends on pro-ess variation (lithography, etching), and could therefore be moreroblematic than the thickness variation.

The effect of Fw and Fh on the threshold voltage of a JNT has pre-

iously been investigated in literature. For example, Doria et al.28], and de Souza et al. [53], derived an analytical model thatelates the threshold voltage to the fin cross sectional area FwFh andffective width 2Fh + Fw from a 2D solution of the Poisson equation

ig. 8. Vth variation as a function of increasing Fw (a) with constant Fh = 10 nm, L = 500 nmd and gate insulator dielectric εr = 1.7. The open symbols in (a) show the corresponding

0 nm, L = 500 nm, Vd = −1 V for an insulator dielectric εr = 1.7 (a) and εr = 3.9 (b). The

for a gate-all-around structure. Eq. (2) shows de Souza’s derivationfor Vth of a junctionless transistor. Here, � is the normalized Plank’sconstant, m* is the effective carrier mass, �MS is the work functiondifference between the gate material and silicon, εsi is the silicon

permittivity, q is the electron charge, Cox is the gate dielectric capac-itance per unit length and c is a fitting parameter that characterizesthe corner capacitances [28,53]. We can see that the geometricalcharacteristics of the device greatly influence the operation regime

, Vd = −1 V and increasing L (b) with constant Fw = Fh = 10 nm, Vd = −1 V for differentcalculated Vth using de Sauza’s model [28,53].

Page 7: Junctionless silicon nanowire transistors for the tunable operation of a highly sensitive, low power sensor

E. Buitrago et al. / Sensors and Actuators B 183 (2013) 1– 10 7

F ping cL

antbfv

C

V

NostoNaε

ddsgtJ(oaH

V

otFdda

o

ig. 9. Ion/Ioff (a) and Id,max (b) variation as a function of increasing Fw for different do = 500 nm.

s found throughout our simulation results. In particular, it is worthoticing that the Vth is strongly influenced by the fin width due tohe quadratic dependence of the second part of the equation shownelow. Figs. 7 and 8a show the calculated Vth using Eq. (2) as aunction of Fh and Fw. In agreement with our results the thresholdoltage depends on the Fw, Fh, Nd, Cox (Eq. (1)) and �MS:

ox = εr

(Fw + 2Fh

td+ c

)(1)

th = �MS − qNd

(FwFh

Cox+ 1εSi

(FwFh

2Fh + Fw

)2)

+ 2h2

2qm∗

(1

F2h

+ 1

F2w

)(2)

onetheless as can be seen in Fig. 8a the Vth trend as a functionf Fw does not seem to correlate well with the model. Our resultshow a much greater Vth shift as the fin width increases from 10o 30 nm in particular for high Nd. For Nd = 1018 cm−3 the thresh-ld voltage shift with increasing Fw is �Vth = 0.075 V and whend = 2 × 1019 cm−3 �Vth = 1.967 V in comparison to the Vth shifts the fin height increases from 10 to 30 nm �Vth = 0.739 V whenr = 1.7.

Since the working principle of a junctionless transistor is quiteifferent from that of a typical inversion or accumulation modeevice, it is not surprising that the definition of threshold voltagehould as well be different. One definition that can still be used is theate potential at which mobile charge density Qm is cancelled. Withhis definition in mind, from a charge based analytical model for aNT double gate MOSFET (DG MOSFET) Sallese et al. [30], derived Eq.3) for Vth which includes both linear and logarithmic contributionsn the doping concentration (influencing the Vth in opposite ways)nd a linear dependence on the thickness of the semiconductor Tsi.ere, UT = kT/q, ni is the intrinsic doping concentration.

th = �MS + UT · ln(Nd

ni

)− q · NdTSi ·

(1

2Cox+ 1

8CSi

)(3)

This equation illustrates the unusual non-monotonic variationf the threshold voltage with doping concentration Nd for junc-ionless transistors that can also be seen in the Id–Vfg curves inigs. 7 and 8. One can also see that it is possible to find the bestoping density Nd and thickness combination for a given Vth and

ielectric which makes junctionless NWs attractive for biosensorpplications.

Holtij et al. [56] investigated the Vth variation as a functionf increasing L. They found that the threshold voltage decreases

oncentrations for devices with gate insulator dielectric εr = 1.7, constant Fh = 10 nm,

considerable with decreasing L for L < 100 nm with the changebeing particularly drastic for channel gate lengths below 22 nm.Our simulation results do not show a strong Vth dependence withincreasing gate length L for the long channel devices investigatedhere (0.5–2 �m) as shown in Fig. 8b. Holtij et al. [56] defined thethreshold voltage as the gate bias at which the value of the min-imum potential equals the value of the Fermi potential at whichpoint the mobile charge density equals the fixed charge density. Atthis point, a neutral region forms inside the channel and currentbegins to flow from source to drain in the bulk. From this assump-tion they derived an expression for the threshold voltage Vth andfound analogous trends as the ones presented here for their n-typedevices [56]. The same trends for Vth were found for low drainpotentials Vd = −50 mV.

Fig. S4 shows the extracted Vth values for the simulatedenhancement mode devices as a function of increasing Fh (a) andFw (b) for different Nch (εr = 1.7, L = 500 nm) while keeping constantFw = 10 nm, and constant Fh = 10 nm respectively. In comparison toJNT the Vth for enhancement mode devices does not change sig-nificantly with Fw and Fh and Nch. Only when the channel dopingconcentration is very high the Vth shifts to a greater extent. Even forhigh channel doping concentrations Nch = 1019 cm−3 the thresholdvoltage shift is �Vth = 0.063 V with increasing Fh from 10 to 45 nmwith the highest change occurring when the Fw increases from 10to 30 nm with a �Vth = 0.331 V.

4.4. Drive current

When comparing devices with the same geometry and chan-nel doping concentrations but different gate insulator materialswe can see that when εr = 1.7 (Fig. 9a shows the Ion/Ioff ratio asfunction of increasing Fw with constant Fh = 10 nm, Fig. S6a in thesupporting information shows the Ion/Ioff as a function of increasingFh with constant Fw = 10 nm with different doping concentrations)only devices with a doping concentration of Nd = 1018 cm−3 or witha sufficiently small channel cross section (Fw = Fh = 10 nm) can beefficiently turned off at Vfg = 0 V (Ion/Ioff > 1013). Ioff (off-state, drain-leakage) is the current Id at Vfg = 1e−10 V. The on-state current Ion

is defined as the value of the drain current at Vfg = −3 V. All otherdevices with εr = 1.7 are normally on at Vfg = 0 V or have a muchsmaller Ion/Ioff current ratios < 104 (106 for Fw = 10, Fh = 20 nm, forhigh drain potentials Vd = −1 V and Nd = 1019 cm−3). When the insu-

lator dielectric constant is increased to εr = 3.9 (Fig. S6b in thesupporting information shows Ion/Ioff as a function of increasingFh with constant Fw = 10 nm with different doping concentrations)devices can be turned off at Vfg = 0 V even for higher doping
Page 8: Junctionless silicon nanowire transistors for the tunable operation of a highly sensitive, low power sensor

8 E. Buitrago et al. / Sensors and A

F−

cog

ipFLfmdal

5

rLettTttiaIIanugattdrta

6

d

ig. 10. Id − Vbg curves at three different drain potentials (Vd = −0.3 V, −0.5 V, and0.9 V) for a device with Fw = 10 nm, Fh = 45 nm, L = 500 nm, and Nd = 1018 cm−3.

oncentrations of Nd = 1019 cm−3 as the higher gate capacitanceffers better electrostatic control and the electric field from theate is capable of completely depleting the channel of carriers.

As a general trend, the maximum current Id,max increases withncreasing doping concentration Nd (Fig. 9b), Fh (Fig. S7a in the sup-orting information shows the Id,max as a function of increasingh for different doping concentrations with constant Fw = 10 nm,

= 500 nm and εr = 1.7) and Fw (Fig. 9b). The Id,max also decreasesor increasing channel lengths L (Fig. S7b in the supporting infor-

ation shows the Id,max as a function of increasing L for differentoping concentrations with constant Fw = Fh = 10 nm, and εr = 1.7)s expected due to the higher total resistance of higher channelengths.

. Experimental results

Fig. 10 shows the transfer characteristics (Id − Vbg) of a fab-icated junctionless nanowire transistor (Fw = 10 nm, Fh = 45 nm,

= 500 nm, p-type doping concentration Nd = 1018 cm−3) for differ-nt drain bias potentials Vd = −0.3, −0.5, −0.9 V for an analogousransistor geometry as studied here through TCAD simulations. Fur-her details on the fabrication process can be found on Section 3.hese curves show our first efforts to study the transistor charac-eristics of the fabricated junctionless sensor, further experimentalesting is currently underway. As the sensor experiments will notnvolve a front gate, a backgate was used for the transistor char-cterization. The fabricated devices are of good quality with high

on (in the range of �A at low Vd) and relatively high Ion/Ioff ratios.n the range of interest (up to 1 V), and for the devices tested with

channel doping concentration of Nd = 1018 cm−3, Vd has almosto influence on Vth and SS as previously found through TCAD sim-lations. It is worth noting that the devices with this particulareometry and doping concentration are normally off (depleted)nd require a significant negative backgate potential Vbg ∼ −10 Vo operate them in the sub-threshold regime where they havehe highest sensitivity. However, our simulation results show thatevice performance can be finely tuned by tailoring the geomet-ical dimensions and doping concentration of the channel (NWs)o ensure their successful application in low-power high-sensitiveutonomous sensor systems.

. Conclusions

Silicon nanowire FET based sensors have great potential for theirect and specific measurement of biological entities at ultra-low

ctuators B 183 (2013) 1– 10

concentrations in completely miniaturized, low power, possiblyimplantable systems. Junctionless nanowire sensors may allow thesuccessful integration of such devices into a myriad of systems dueto their tunable electrical characteristics (in particular Vth). Also,having no doping concentration gradients simplifies the fabricationprocess, reduces variability and thermal budget requirements sincethere is no impurity diffusion during thermal processing steps. Theuse of heavily doped channel devices is also advantageous due tothe inherent reduction of dopant fluctuations that will thereforereduce variations in the electrical characteristics of the junctionlessdevice.

It is important when designing the next generation of junc-tionless FET sensors to select the device geometry and dopingconcentration that can be made reproducibly. Also, to select thedevice that allows for high drain currents, high transconductancegm values in the absence of a local/reference electrode poten-tial (when Vfg = 0 V), that leads to the operation of the FET in thehigh sensitivity regime (subthreshold) around Vfg = 0 V with a Vthvalue ∼ 0 V for the dielectric gate insulator of interest. From thesimulations conducted here we found a few choices that meet all ofthese requirements for each dielectric. For εr = 1.7 the most inter-esting devices are the ones with fin width Fw = 10 nm and heightFh = 30 and 45 nm, doping concentration of Nd = 1 × 1019 cm−3

and length L = 500 nm. They have high transconductance valuesof gm,Vfg=0 V of 71 and 233 nA/V, respectively, Vth ∼ 0 V for highsensitivities with high output currents. Devices with the samegeometries are also interesting for εr = 3.9 except that a higherdoping concentration of Nd = 2 × 1019 cm−3 is necessary to have Vtharound ∼0 V, increasing at the same time the drain current. Look-ing at a broad parameter space our results provide useful guidelinesfor tuning the design of FET nanowire sensors for a low-power andhigh-sensitivity device.

Acknowledgments

Especial thanks to S. Rigante, and A. Biswas of the Nanolab, EPFLfor their expert advice in select topics. This research was partiallyfunded by the Semiconducting Nanowire Platform for AutonomousSensors (SiNAPS) European Project. GF acknowledges partial fund-ing from the Science Foundation Ireland.

Appendix A. Supplementary data

Supplementary data associated with this article can be found, inthe online version, at http://dx.doi.org/10.1016/j.snb.2013.03.028.

References

[1] P. Bergveld, Thirty years of ISFETOLOGY—what happened in the past 30 yearsand what may happen in the next 30 years, Sensors and Actuators B 88 (2003)1–20.

[2] P. Bergveld, Development of an ion-sensitive solid-state device for neuro-physiological measurements, IEEE Transactions on Biomedical Engineering(1970) 70–71, BME-17.

[3] P. Bergveld, The development and application of FET-based biosensors, Biosen-sors 2 (1986) 15–33.

[4] E. Stern, A. Vacic, M.A. Reed, Semiconducting nanowire field-effect transis-tor biomolecular sensors, IEEE Transactions on Electron Devices 55 (2008)3119–3130.

[5] K.I. Chen, B.R. Li, Y.T. Chen, Silicon nanowire field-effect transistor-basedbiosensors for biomedical diagnosis and cellular recording investigation, NanoToday 6 (2011) 131–154.

[6] Y. Cui, Q. Wei, H. Park, C.M. Lieber, Nanowire nanosensors for highly sensitiveand selective detection of biological and chemical species, Science 293 (2001)1289–1292.

[7] N.S. Ramgir, Y. Yang, M. Zacharias, Nanowire-based sensors, Small 6 (2010)

1705–1722.

[8] I.Y. Park, Z.Y. Li, A.P. Pisano, R.S. Williams, Top-down fabricated silicon nanowiresensors for real-time chemical detection, Nanotechnology 21 (2010) 015501.

[9] P.A. Gao, G. Zheng, C.M. Lieber, Subthreshold regime has the optimal sensitivityfor nanowire FET biosensors, Nano Letters 10 (2009) 547–552.

Page 9: Junctionless silicon nanowire transistors for the tunable operation of a highly sensitive, low power sensor

and A

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

[

E. Buitrago et al. / Sensors

10] G.F. Zheng, F. Patolsky, Y. Cui, W.U. Wang, C.M. Lieber, Multiplexed electricaldetection of cancer markers with nanowire sensor arrays, Nature Biotechnol-ogy 23 (2005) 1294–1301.

11] Y. Engel, R. Elnathan, A. Pevzner, G. Davidi, E. Flaxer, F. Patolsky, Supersensi-tive detection of explosives by silicon nanowire arrays, Angewandte ChemieInternational Edition 49 (2010) 6830–6835.

12] T.S. Pui, A. Agarwal, F. Ye, Z.Q. Ton, Y.X. Huang, P. Chen, Ultra-sensitive detectionof adipocytokines with CMOS-compatible silicon nanowire arrays, NanoscaleResearch Letters 1 (2009) 159–163.

13] Y. Chen, X. Wang, M.K. Hong, C.L. Rosenberg, B.M. Reinhard, S. Erramilli, P.Mohanty, Nanoelectronic detection of breast cancer biomarker, Applied PhysicsLetters 97 (2010) 233702.

14] Y. Chen, X. Wang, S. Erramilli, P. Mohanty, A. Kalinowski, Silicon based nano-electronic field-effect pH sensor with local gate control, Applied Physics Letters89 (2006) 223512.

15] M. Curreli, Z. Rui, F.N. Ishikawa, C. Hsiao-Kang, R.J. Cote, Z. Chongwu, M.E.Thompson, Real-time label-free detection of biological entities using nanowire-based FETs, IEEE Transactions on Nanotechnology 7 (2008) 651–667.

16] Y. Paska, T. Stelzner, S. Christiansen, H. Haick, Enhanced sensing of nonpolarvolatile organic compounds by silicon nanowire field effect transistors, ACSNano 5 (2011) 5620–5626.

17] X. Duan, L. Yue, N.K. Rajan, D.A. Routenberg, Y. Modis, M.A. Reed, Quantifica-tion of the affinities and kinetics of protein interactions using silicon nanowirebiosensors, Nature Nanotechnology 7 (2012) 401–407.

18] E. Stern, J.F. Klemic, D.A. Routenberg, P.N. Wyrembak, D.B. Turner-Evans, A.D.Hamilton, D.A. LaVan, T.M. Fahmy, M.A. Reed, Label-free immunodetection withCMOS-compatible semiconducting nanowires, Nature 445 (2007) 519–522.

19] E. Stern, R. Wagner, F.J. Sigworth, R. Breaker, T.M. Fahmy, M.A. Reed, Importanceof the Debye screening length on nanowire field effect transistor sensors, NanoLetters 7 (2007) 3405–3409.

20] C. Yu, W. Xihua, H. Mi, E. Shyamsunder, M. Pritiraj, Surface-modified siliconnano-channel for urea sensing, Sensors and Actuators B 133 (2008) 593–598.

21] Y. Paska, T. Stelzner, O. Assad, U. Tisch, S. Christiansen, H. Haick, Moleculargating of silicon nanowire field-effect transistors with nonpolar analytes, ACSNano 6 (2011) 335–345.

22] H.S. Wong, M.H. White, A CMOS-integrated ISFET-operational amplifier chem-ical sensor employing differential sensing, IEEE Electron Device Letters. 36(1989) 3479–3487.

23] O. Knopfmacher, A. Tarasov, W.Y. Fu, M. Wipf, B. Niesen, M. Calame, C. Scho-nenberger, Nernst limit in dual-gated Si-nanowire FET sensors, Nano Letters10 (2010) 2268–2274.

24] A. Thanachayanont, S. Sirimasakul, Ultra-low-power differential ISFET/REFETreadout circuit, ETRI Journal 31 (2009).

25] A. Tarasov, M. Wipf, K. Bedner, J. Kurz, W. Fu, V.A. Guzenko, O. Knopfmacher,R.L. Stoop, M. Calame, C. Schönenberger, True reference nanosensor realizedwith silicon nanowires, Langmuir 28 (2012) 9899–9905.

26] H. Jang, W. Cho, Fabrication of high-performance fully depleted silicon-on-insulator based dual-gate ion-sensitive field-effect transistor beyond theNernstian limit, Applied Physics Letters 100 (2012) 073701.

27] G. Shalev, A. Doron, U. Virobnik, A. Cohen, Y. Sanhedrai, I. Levy, Gain optimiza-tion in ion sensitive field-effect transistor based sensor with fully depletedsilicon on insulator, Applied Physics Letters 93 (2008) 083902.

28] R.T. Doria, R.D. Trevisoli, M. de Souza, M.A. Pavanello, Threshold voltage injunctionless nanowire transistors, Semiconductor Science and Technology 26(2011) 105009.

29] J.P. Colinge, A. Kranti, R. Yan, C.W. Lee, I. Ferain, R. Yu, N. Dehdashti Akha-van, P. Razavi, Junctionless nanowire transistor (JNT): properties and designguidelines, Solid State Electronics 65–66 (2011) 33–37.

30] J.M. Sallese, N. Chevillon, C. Lallement, B. Iniguez, F. Pregaldiny, Charge-basedmodeling of junctionless double-gate field-effect transistors, IEEE Transactionson Electron Devices 58 (2011) 2628–2637.

31] J.P. Colinge, C.W. Lee, A. Afzalian, N.D. Akhavan, R. Yan, I. Ferain, P. Razavi,B. O‘Neill, A. Blake, M. White, A. Kelleher, B. McCarthy, R. Murphy, Nanowiretransistors without junctions, Nature Nanotechnology 5 (2010) 225–229.

32] J.P. Colinge, C.W. Lee, I. Ferain, N.D. Akhavan, R. Yan, P. Razavi, R. Yu, A.N.Nazarov, R.T. Doria, Reduced electric field in junctionless transistors, AppliedPhysics Letters 96 (2010) 073510.

33] L. Chi-Woo, A. Borne, I. Ferain, A. Afzalian, R. Yan, D.A.N., P. Razavi, J.P. Colinge,High-temperature performance of silicon junctionless MOSFETs, IEEE Transac-tions on Electron Devices 57 (2010) 620–625.

34] C.W. Lee, A. Afzalian, N.D. Akhavan, R. Yan, I. Ferain, J.P. Colinge, Junc-tionless multigate field-effect transistor, Applied Physics Letters 94 (2009)053511–053512.

35] L. Ansari, B. Feldman, G. Fagas, J.P. Colinge, J.C. Greer, Simulation of junction-less Si nanowire transistors with 3 nm gate length, Applied Physics Letters 97(2010), 062105–062103.

36] J.P. Raskin, J.P. Colinge, I. Ferain, A. Kranti, C.W. Lee, N.D. Akhavan, R. Yan, P.Razavi, R. Yu, Mobility improvement in nanowire junctionless transistors byuniaxial strain, Applied Physics Letters 97 (2010) 042114.

37] S.J. Choi, D. Moon, S. Kim, J.P. Duarte, Y.K. Choi, Sensitivity of threshold voltageto nanowire width variation in junctionless transistors, IEEE Electron Device

Letters 32 (2011) 125–127.

38] G.E. Moore, Cramming more components onto integrated circuits, Electronics38 (1965) 114–117.

39] P.E. Garrou, C.A. Bower, P. Ramm, Handbook of 3D Integration: Technology andApplications of 3D Integrated Circuits, Weinheim, 2008.

ctuators B 183 (2013) 1– 10 9

40] M.J. Wolf, P. Ramm, A. Klumpp, H. Reichl, Technologies for 3D wafer levelheterogeneous integration, in: Symposium on Design, Test, Integration andPackaging of MEMS/MOEMS, MEMS/MOEMS 2008, 2008, pp. 123–126.

41] E.J. Faber, L.C.P.M., W. Olthuis, H. Zuilhof, E.J.R., P. Bergveld, A. van den Berg,Si–C linked organic monolayers on crystalline silicon surfaces as alternativegate insulators, ChemPhysChem 6 (2005) 2153–2166.

42] M.Y. Bashouti, Y. Paska, S.R. Puniredd, T. Stelzner, S. Christiansen, H. Haick,Silicon nanowires terminated with methyl functionalities exhibit stronger Si–Cbonds than equivalent 2D surfaces, Physical Chemistry Chemical Physics 11(2009) 3845–3848.

43] Y.M. Georgiev, W. Henschel, A. Fuchs, H. Kurz, Surface roughness of hydro-gen silsesquioxane as a negative tone electron beam resist, Vacuum 77 (2005)117–123.

44] W. Henschel, Y.M. Georgiev, H. Kurz, Study of a high contrast process for hydro-gen silsesquioxane as a negative tone electron beam resist, Journal of VacuumScience & Technology 21 (2003) 2018–2025.

45] P.R. Nair, M.A. Alam, Screening-limited response of nanobiosensors, Journal ofthe American Chemical Society 8 (2008) 1281–1285.

46] P.R. Nair, M.A. Alam, Performance limits of nanobiosensors, Applied PhysicsLetters 88 (2006) 233120–233123.

47] P.R. Nair, M.A. Alam, Design considerations of silicon nanowire biosensors, IEEETransactions on Electron Devices 54 (2007) 3400–3408.

48] E. Buitrago, M. Fernández-Bolanos, A.M. Ionescu, Vertically stacked Si nano-structures for biosensing applications, Microelectronic Engineering 97 (2012)345–348.

49] S. Rigante, L. Lattanzio, A.M. Ionescu, FinFET for high sensitivity ion and biolog-ical sensing applications, Microelectronic Engineering 88 (2011) 1864–1866.

50] N. Elfström, R. Juhasz, I. Sychugov, T. Engfeldt, A.E. Karlström, J. Linnros, Surfacecharge sensitivity of silicon nanowires: size dependence, Nano Letters 7 (2007)2608–2612.

51] C. Heitzinger, G. Klimeck, Computational aspects of the three-dimensionalfeature-scale simulation of silicon-nanowire field-effect sensors for DNA detec-tion, Journal of Computational Electronics 6 (2007) 387–390.

52] A. Kim, C.S. Ah, H.Y. Yu, J. Yang, I. Baek, C. Ahn, C.W. Park, M.S. Jun, S. Lee,Ultrasensitive label-free and real-time immunodetection using silicon field-effect transistors, Applied Physics Letters 91 (2007) 103901–103903.

53] M. de Souza, M.A. Pavanello, R.D. Trevisoli, R.T. Doria, J. Colinge, Cryogenicoperation of junctionless nanowire transistors, IEEE Electron Device Letters32 (2011) 1322–1324.

54] R. Yan, A. Kranti, I. Ferain, C.W. Lee, R. Yu, N. Dehdashti, P. Colinge, P. Jean,Investigation of high-performance sub-50 nm junctionless nanowire transis-tors, Microelectronics Reliability 51 (2011) 1166–1171.

55] X. Cauchy, F. Andrieu, Questions and Answers on Fully Depleted SOI Tech-nology for the Next Generation CMOS nodes, 2010, September, Available:http://www.soitec.com/pdf/SOIconsortium FDSOI QA.pdf

56] T. Holtij, M. Schwarz, A. Kloes, B. Iniguez, 2D analytical potential modeling ofjunctionless DG MOSFETs in subthreshold region including proposal for cal-culating the threshold voltage, in: 13th International Conference on UltimateIntegration on Silicon (ULIS), 2012, pp. 81–84.

Biographies

Elizabeth Buitrago received her B.Sc. degree in chemical engineering from the Uni-versity of California San Diego (UCSD), in La Jolla, California and her M.Sc. degree inprocess engineering from the Eidgenössische Technische Hochschule Zürich (ETHZ)with an emphasis in particle technology. Currently, she is a Ph.D. Student-Researcherat the Ecole Polytechnique Fédérale de Lausanne (EPFL), in Switzerland, developingvertically stacked silicon nanostructure devices for biosensing applications. Throughher internship and work experiences as a process engineer at AMI Semiconductorand Micron Technology in the United States, she became highly interested in thesemiconductor industry.

Giorgos Fagas is a senior researcher at Tyndall National Institute, University Col-lege Cork, coordinating activities in nanoelectronics and energy-efficient electronicsand promoting actively European research. He has been a Humboldt Fellow at theUniversity of Regensburg and a research fellow at the Max-Planck-Institut-PKS inDresden. His interests are in a priori technology evaluation of nanotechnology-enhanced electronic devices and predictive methods based on solid physicalprinciples. His expertise is in transport and quantum effects in nanomaterials andlow dimensional structures, and the development of simulation software IP. He haspublished over 50 peer-reviewed articles and edited a reference book on molecularelectronics

Montserrat Fernández-Bolanos Badía received her M.Sc. degree in telecommuni-cation engineering from the University of Seville, Seville, Spain, in 2005, and herPh.D. degree in microsystems and microelectronics from the Ecole PolytechniqueFédérale de Lausanne (EPFL), Switzerland, in 2010. Since receiving the Ph.D. degree,she has been a Scientific Collaborator in the Nanoelectronic Device Laboratory atEPFL. The focus of her research is in the field of RF MEMS switches, phase shifters,

and tunable filters for airborne and space applications. Her present research inter-ests include the open challenges of RFMEMS devices such as reliability, packagingand their 3-D integration with RF ICs.

Yordan Georgiev holds a Ph.D. in physics since 1997. He worked in some of the bestresearch institutions in Russia, Bulgaria, Germany, and now Ireland and has a rich

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1 and A

efocs

Mio(oP

0 E. Buitrago et al. / Sensors

xperience in fabrication of nanostructures and devices down to the 10 nm regionor semiconductor electronics, optoelectronics, nanoimprint lithography, bionan-technology, etc. His current research interests include design, fabrication, andharacterization of novel Si and Ge nanowire devices for digital electronics andensing applications.

atthieu Berthomé received his M.Sc. in engineering in Phelma, Grenoble,

n the Physics and nanosciences department. He did his master researchn nanowire-based metamaterials at the University of California San DiegoUCSD). He is currently a Ph.D. student at the Nanoelectronic Devices Lab-ratory (Nanolab) in the Ecole Polytechnique Fédérale de Lausanne (EPFL).revious to that he worked two years in CEA-LETI (Grenoble) as an engineer.

ctuators B 183 (2013) 1– 10

His research topic is the Junctionless nanowire transistor architecture, and itsapplications.

Adrian Mihai Ionescu received his Ph.D. degree from the National Polytechnic Insti-tute of Grenoble in France. He is a full professor at the Swiss Federal Instituteof Technology, Lausanne (EPFL) in Switzerland. He has held staff and/or visit-ing positions at LETI-CEA, Grenoble, LPCS-ENSERG, and Stanford University during

1998 and 1999. His research interests focus on micro- and Nanoelectronic devicesaimed at integrated circuit design, particularly process development, modelling,and electrical characterization. He has published more than 250 articles in interna-tional journals and conference proceedings. He is the Director of the Laboratory ofMicro/Nanoelectronic Devices (Nanolab) at EFPL.