iTOP readout electronics statusmza/presentations/...Apr 21, 2011  · to 6 ne duo/ 1.2 v q S X 50 0...

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iTOP readout electronics status IDLAB University of Hawai'i 2011-04-21 Belle II bPID upgrade meeting Matt Andrew University of Hawaii

Transcript of iTOP readout electronics statusmza/presentations/...Apr 21, 2011  · to 6 ne duo/ 1.2 v q S X 50 0...

Page 1: iTOP readout electronics statusmza/presentations/...Apr 21, 2011  · to 6 ne duo/ 1.2 v q S X 50 0 h," CC Lk + Z C LK pos', J LPM (6- J 16 = Tv;g-Mlon: L POX 16 = 123 16 — 305 320

iTOP readout electronics status● IDLAB● University of Hawai'i

2011-04-21 Belle II bPID upgrade meeting Matt Andrew University of Hawaii

Page 2: iTOP readout electronics statusmza/presentations/...Apr 21, 2011  · to 6 ne duo/ 1.2 v q S X 50 0 h," CC Lk + Z C LK pos', J LPM (6- J 16 = Tv;g-Mlon: L POX 16 = 123 16 — 305 320

board stack development2010 November:concept mechanical design -> mechanical mockup

2011-04-21 Belle II bPID upgrade meeting Matt Andrew University of Hawaii

Page 3: iTOP readout electronics statusmza/presentations/...Apr 21, 2011  · to 6 ne duo/ 1.2 v q S X 50 0 h," CC Lk + Z C LK pos', J LPM (6- J 16 = Tv;g-Mlon: L POX 16 = 123 16 — 305 320

board stack development

2011 February:scaled drawing of most recent iteration

2010 November:mechanical mockup completed

2011 March/April:blab3a, carrier, interconnect boards being fabricated (should ship this week)

2011-04-21 Belle II bPID upgrade meeting Matt Andrew University of Hawaii

Page 4: iTOP readout electronics statusmza/presentations/...Apr 21, 2011  · to 6 ne duo/ 1.2 v q S X 50 0 h," CC Lk + Z C LK pos', J LPM (6- J 16 = Tv;g-Mlon: L POX 16 = 123 16 — 305 320

SCROD timeline

2010 November:concept

2011 February:fabrication & assembly

2010 December to 2011 January:detailed design / schematic entry / layout

2011 March/April:FPGA programs and runs!

2011-04-21 Belle II bPID upgrade meeting Matt Andrew University of Hawaii

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