ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register...

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ITEC 352 Lecture 25 Memory(3)

Transcript of ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register...

Page 1: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

ITEC 352

Lecture 25Memory(3)

Page 2: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

Memory (3)

Review

• Questions• RAM–What is the difference between register

memory, cache memory, and main memory?

–What connects the different types of memory together?

–What are some of the different ways to handle what is in the cache?

Page 3: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

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Objectives

• Cache memory• Intro to virtual memory

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Performance of a cache

• Assume a program (instructions) is loaded into the memory from address 0 to 57. Also assume: cache access time: 80 ns and memory access time: 2500 ns.

• What is the performance when using a cache.

0 - 16

Memory address range Memory

17 - 33

34-40

41-57

Cache

Page 5: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

Memory (3)

Performance of a cache

• What is the memory address of the first instruction accessed?– Address: 0

• Is this in the cache? – Initially, cache is empty.

Hence, no! • So what do you do?

– Depends on the policy

0 - 16

Memory address range Memory

17 - 33

34-40

41-57

Cache

Page 6: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

Memory (3)

Performance of a cache

• As the data is not in the cache, the block 0-16 is loaded into the slot1 of the cache.

• The next instruction is at address 1. – Is this in the cache? – Yes – so the next 15

instructions are in the cache.

0 - 16

Memory address range Memory

17 - 33

34-40

41-57

Cache

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Performance of cache

• Hence:Event Location Time 1 miss 0 2500 ns15 hits 1-16 80ns X 15…

Page 8: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

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Hit Ratios and Effective Access Times

Hit ratio and effective access time for single level cache:

Hit ratios and effective access time for multi-level cache:

Page 9: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

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Multilevel caches

• As size of ICs have increased, packing density also has increased.– Multilevel caches have been developed

• Fastest level L1 is on the chip. – Usually data and instructions are kept separate on

this cache. Called split cache.• Level L2 and L3 are slower than L1 and are

unified caches.

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Question

• Lets say there are 10000 memory references to execute a process.– 90 cause L1 misses and of these 10 cause L2 misses.– Let L1 hit time: 5 ns (this is the time to access a memory

location if it is in the cache).– Let L2 hit time: 20 ns– Let the L2 miss time: 100 ns (time to access memory in the

main memory).

• What is the effective access time to access a memory?

Page 11: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

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Summary so far …

• We have seen different types of memory elements and gone up the hierarchy of memory.– We have developed RAM, ROM, Registers and looked at Caches.

• Next: we will see how programs that we develop are allocated memory.

• Some terminology:– Process: any program in execution is called a process.

• E.g., A java program that you write is simply a program, unless you execute it. During its execution it becomes a process.

• There can be multiple processes of the same program.

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MemoryAllocation

• Two problems in memory allocation.– Processes must not have conflicts in memory they use.

(must have separate memory). • E.g., you wouldn’t want memory used by your process to be

overwritten by that of another user. • Solution: Relocatable Code

– Small amount of physical memory (RAM) must be used to execute a large number of processes

– (or execute large processes each of which exceed the size of RAM)– Solution: Virtual Memory.

Page 13: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

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Relocatable code and Virtual Memory

• Relocatable assembly code: processes must be able to reside in any portion of the physical memory. – Why ? Consider an operating system, where all executions of Microsoft

Word must only reside at address 0x800000. What would happen ?– Hence, compiled and assembled programs do not have fixed addresses

allocated to them.

Virtual memory: use hard disk as an extension for RAM. Intuition: processes are allocated memory in a special portion of

the hard disk. They are loaded into RAM only when they are executing on the CPU

Page 14: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

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Relocatable code

• Program binary code, such that the addresses of the process address space can be changed dynamically.

• I.e. it doesn’t map to main memory• It has it’s own memory space• Operating system replaces with what it deems

appropriate

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Relocatable Code

#include <…>

int main() {

int x = 10;

return x;

}

<main+0>: push %ebp BINARY CODE

<main+1>: mov %esp,%ebp

<main+3>: sub $0x8,%esp

…<main+32>: ret

<main+33>: nop

0x0804867c <main+0>: push %ebp

0x0804867d <main+1>: mov %esp,%ebp

0x0804867f <main+3>: sub $0x8,%esp

0x0804869c <main+32>: ret

0x0804869d <main+33>: nop

Compiler +

assembler

Compiler generates relocatable code: e.g., return instruction is 32 bytes away from beginning of code segment

When process is created. The process is given addresses by OS Address called as logical address

Address binding: binding each logical address to a location in physical memory

Linking and

loading

Page 16: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

Memory (3)

Relocatable Code

#include <…>

int main() {

int x = 10;

return x;

}

<main+0>: push %ebp BINARY CODE

<main+1>: mov %esp,%ebp

<main+3>: sub $0x8,%esp

…<main+32>: ret

<main+33>: nop

0x0804867c <main+0>: push %ebp

0x0804867d <main+1>: mov %esp,%ebp

0x0804867f <main+3>: sub $0x8,%esp

0x0804869c <main+32>: ret

0x0804869d <main+33>: nop

Compiler +

assembler

Compiler generates relocatable code: e.g., return instruction is 32 bytes away from beginning of code segment

When process is created. The process is given addresses by CPU. Address called as logical address

Address binding: binding each logical address to a location in physical memory

Linking and

loading

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Using a HD as memory

© Image from Silberschatz and Galvin

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Three types of memory addresses

C program Compiler/Assembler

Binary code(relocatable addresses)\Aka linear addresses

When program isExecuted.

CPU generated Logical AddressesAlso called Virtual addressLoader

Logical AddressBound to Physical memory

address

Three types of addresses: linear address (addresses in compiled binaries), logical address (address in the virtual memory) and physical address (address in the RAM when a program is loaded).

Page 19: ITEC 352 Lecture 25 Memory(3). Review Questions RAM –What is the difference between register memory, cache memory, and main memory? –What connects the.

Dynamic Relocation using relocation register: mapping logical to physical address.

© Image from Silberschatz and Galvin

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Virtual Memory (2)

• When a process is executed, the OS allocates memory for the process on the disk (usually 4 GB of memory is allocated).– This includes a code segment, data segment and program stack. – In UNIX, we usually call this portion of the disk as swap partition.

• Advantage: Process memory is not tied to the amount of RAM.• However, for a CPU to execute a process, the process must be in the

physical memory. – Hence, OSes provide methods to map process address space on virtual

memory (called logical memory) to physical memory (memory addresses in RAM).

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Summary

• Cache access• Virtual memory