420 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-27, NO. 2, FEBRUARY 1980

Ion-Implanted Low-Barrier PtSi Schottky-Barrier Diodes

JEFFREY B. BINDELL, WILLIAM M. MOLLER, AND EDWARD F. LABUDA, MEMBER, IEEE

Abstract-An ion-implanted, shallow n+ layer has been used for lowering the barrier height of PtSi-n-Si Schottky diodes. Barrier height reductions up to 200 mV have been achieved with little degradation of the diode’s reverse-current characteristics. During silicide formation, the implanted ions are “pushed” ahead of the PtSi-Si reaction zone and pile up at the silicide-silicon interface, resulting in more barrier lowering than would be expected from the ion-implant dose. A model including the impurity pileup is presented and calculations based on the model are shown to be in reasonable agreemen6 with experimental measurements.

S INTRODUCTION

CHOTTKY-BARRIER diodes are used extensively in Si integrated-circuit applications. However, their effective-

ness is often compromised by the discrete set of barrier heights available with those metal-Si systems which also satisfy a great many other technological requirements. For a simple metal (e.g., AI) deposited directly onto a clean Si surface, Andrews [ l ] , Shannon [2], and Hariu and Shibata [3] have shown that the effective barrier height can be modified by a shallow ion implantation, the peak of which is located in the immediate vicinity of the metal-Si interface. This implant increases the magnitude of the electric field at the surface, thereby, to a first approximation, lowering the effective bar- rier height through an enhanced Schottky lowering effect. If the implant i s sufficiently shallow (100 A) and is completely depleted at zero bias, the reverse-curient characteristics will not be severely degraded [4].

A common metal used for Schottky diodes is PtSi, which is formed by a solid-state reaction at temperatures less than the melting temperature of Pt or Si. The metal-semiconductor interface is formed below the surface (typically 200 to 500 A) upon which the Pt is deposited. This results in an exceptionally clean interface, free from contamination and interfacial oxides [ 5 ] . The 0.82- to 0.85-eV PtSi barrier height on n-type silicon provides an ohmic contact to p- and n’-Si and a Schot- tky diode [6] to lightly doped (<lo” ~ m - ~ ) n-Si.

The subject of this paper is the use of an ion-implanted, shallow n+ layer for lowering the barrier height of PtSi-n-Si Schottky diodes. The finite depth of the PtSi-Si interface is a disadvantage with respect to achieving the narrow interfacial charge peak required for barrier lowering and for minimum degradation of reverse-leakage characteristics. A deeper im- plant must be used compared to a simple metal-Si surface junction, and because of increased straggle, a wider profile re-

Manuscript received March 29,1979; revised August 8, 1979. The authors are with Bell Laboratories, Allentown, PA 18103.

sults. However, during silicide formation, the implanted ions are pushed ahead of the PtSi-Si reaction zone by way of a segregation effect and pile up at the silicide-silicon interface, resulting in a narrow charge peak. This produces a barrier lowering which is greater than would be expected from the implant profile alone. A model will be presented which yields reasonable agreement with experimental results only if this “push-ahead” effect is included [7] .

Ion-implanted low-barrier PtSi Schottky diodes can be used to decrease the speed-power product of some integrated- circuit technologies and to increase the noise margin in others [8] -[lo]. Other silicides can also be used to form a Schottky- barrier diode with a barrier height less than that of PtSi, but problems may be encountered in making ohmic contact to lightly doped (<IO’* ~ m - ~ ) p regions (bases in bipolar inte- grated circuits) without complicating the processing. The ion- implantation technique provides a continuous range of barrier heights and permits both high- and low-barrier diodes to be fabricated on the same integrated circuit with the use of a selective implant masking step.

DEVICE PROCESSING Schottky diodes were prepared on n-doped, (1 11 ) substrates

with a doping density of 2 X 10’ ~ m - ~ . A test pattern was used which produced both guarded and unguarded diodes 29 Mm on a side [l 11 . A contact resistivity pattern was included which synthesized the base region of a bipolar transistor so that the base contact resistivity could also be characterized. Standard bipolar Si integrated-circuit processing was used prior to metallization.

The barrier lowering ion implantation was performed prior to Pt deposition for PtSi formation. After implantation, the Si slices were annealed in an N2 ambient at 800°C for 30 min, chemically cleaned, and loaded into a triode [12] sputtering system which had been modified [13] to reduce f i m contami- nation which results from cosputtering from the plasma confinement structure.’ After a 20-s sputter etch (r175 A of Si removed,’) a 500-8 Pt film was deposited and subsequently

‘Although a triode system was used exclusively in our work, it should not be required for the successful fabrication of low-barrier PtSi diodes. Excellent results for unimplanted diodes have been obtained with an RF diode system and we can anticipate no differences between these two types of systems for the case of low-barrier device fabrication.

2For reproducible PtSi formation, we have found that the rate of Si removal during sputter etching is an important variable. Faster rates reduce contamination due to redeposition and give a more reproducible PtSi process. The present work was done with an Si sputter etch rate in the range of 400-500 A/min.

0018-9383/80~0200-0420$00.75 0 1980 IEEE

annealed at 650°C for 10 min in a tube furnace through which a flow of 10 percent 02-90 percent argon (by volume) was maintained. This treatment is sufficient to form a uniform PtSi film approximately twice the thickness of the initial Pt deposit, that is, SI000 8. Standard Ti-Pt-Au metallization was used for contacting the diodes, and sputter etching was used for defining the metal pattern [I41 , [15] .

Low-barrier diodes were selectively fabricated on integrated circuits by adding one additional masking level. Photoresist was used for masking the implant from the diodes in which the normal PtSi barrier height is desired. For diodes receiving the barrier-lowering implant, the developed image in the photo- resist can be considerably larger than the contact window so that alignment is noncritical.

ELECTRICAL CHARACTERIZATION The diodes were characterized by measuring the forward

turn-on voltage VF and the reverse voltage VR defined as those voltages which produced a current of 10 PA (El A/cm2) through the test diode for forward and reverse bias, respec- tively. For our integrated-circuit applications, VF and VR are the important device parameters and the validity of using these parameters to characterize the behavior of implanted diodes will become apparent from the current-voltage curves to be presented below. No attempts were made to directly measure the barrier heights of implanted diodes. All barrier heights referred to in this paper are effective barrier heights as deduced from measurements of VF. For the particular devices studied here, an unimplanted diode had VF 400 mV. For low implant doses, V, approximates the onset of avalanche breakdown, but for higher doses most of this current repre- sents carriers which penetrate the potential barrier of the PtSi-Si interface via a thermally assisted tunneling mechanism.

The variation of Vp as a function of ion dose is shown in Fig. 1 for a P' implant of 35 keV. Over the measured range, Vp is linearly reduced by 100 mV for every 4 X 10l2 ions/cm2 implanted. An approximately ohmic contact is produced for VF < 100 mV, implying the forward diode characteristics can be altered to fit almost any device requirement provided the associated reverse current is acceptable. Reverse-current data are presented in Fig. 2 where V, is plotted as a function of Vp. For VF > 200 mV, VR is not seriously degraded, but for increased ion dose, the tunneling current begins to signifi- cantly increase with a consequent reduction in diode quality. The parameter normally used to describe the thermal behavior of a Schottky diode is the ideality factor or n value, defined by [161

4 av kT a (In J>

*=-- (1 1 where 4, k , and T are the electronic charge, Boltzmann's con- stant, and the absolute temperature, respectively, and where V and J are the forward voltage and current density. The factor yk is plotted in Fig. 3 as a function of implant dose. As the dose is increased, VF is decreased and the n value increases from 1 .O to greater than 2.0. As a result, when a selective im- plant is used to fabricate diodes of different barrier heights on

Pf IMPLANT

BINDELL e t al.: ION-IMPLANTED LOW-BARRIER PtSi SCHOTTKY-BARRIER DIODES

the same circuit, the J-V characteristics of the diodes will not barrier is beginning to contribute to the current flow.

42 1

"\\

0 4.0 8.0 12.0 16.0

DOSE x io-iz atoms/cm2

Fig. 1. Forward voltage VF at 10-0A current as a function of ion- implant dose.

VF ( mv)

Fig. 2. Relationship between VF and VR at 10-pA current.

Fig. 3. Ideality factor n as a function of ion-implant dose. V p is in- cluded as a parameter.

have the same temperature dependence. Since n = 1 for a thermionic emission transport mechanism, the n values greater than 1 in Fig. 3 imply that tunneling through the top-of the

422 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-27, N3. 2 , FEERLIARY 1980

,4800 - N u) z

X 0 Y

11 W u) a 3800 I I I I I I I J

0 4 8 12 16 DOSE cm-2 ( X ~ O - ~ ~ )

Fig. 4. Contact resistivity at 25'C for a lightly doped p region ( ~ 1 0 ' ~ cmm3) versus ion-implant dose.

The parameters V,, V R , and n suffice to characterize the implanted diodes because over the current-voltage range of in- terest for most integrated-circuit applications, the In J versus V characteristics were linear and representable by a distinct value of the parameter n (see Figs. 10 and 1

The ion doses required for barrier lowering are modest (<I .2 X 1013 cm-'), making it possible to selectively produce lowered barrier heights without an additional masking step to shield p-type base contacts in bipolar integrated circuits; suffi- cient charge to convert the base and thereby form an n-p junc- tion is not present. The base contact resistivity as a function of ion dose is shown in Fig. 4 for a 600-L?/0 base with a sur- face concentration of r1018 ~ m - ~ . There is only a slight in- crease in base contact resistance over the implant dose range of interest and the contact is still ohmic at -55'C.

Barrier lowering with As+ and Sb' ions was also evaluated, and the results are shown in Fig. 5. The solid curve represents many determinations for P+ and the individual data points are not plotted. As+ implant profiles of comparable depth (and straggle) were slightly more effective in barrier lowering than were P' or Sb'. Based upon these data, it would appear that the As' is pushed ahead more strongly than either Sb+ or P', in agreement with recent Rutherford backscatter studies by Wittmer and Seidel [ 171 who studied the redistribution of im- planted As and Sb following the formation of PtSi, Pdz Si, and Nisi.

The assumption that the increased current flow results from tunneling through the barrier rather than from some other mechanism requires some justification since it is also possible that the increase in current could result from an increase in the saturation current due to the introduction of structural defects in the vicinity of the metal-semiconductor interface. This is unlikely because the 800°C, N2 anneal should be sufficient to

3Barrier-height measurements were not attempted because for our ap- plications the parameters VF, VR, and n sufficiently characterize the implanted diodes. Capacitance-voltage measurements of barrier heights of implanted diodes are not straightforward because of the reverse cur- rent passed by these diodes. Inferences of barrier heights from In J versus V curves are only valid for low n values. A photoelectric mea- surement might yield interesting information, however, we were not equipped to do these measurements.

400n + = S b + @ 90 KeV

a : A s * @ 70 KeV

- = P * @ 35 KeV _._ s P 200 *\

io0

0 + -u DOSE x i ~ - ' ~ o t o m c i / o m ~

0 5 10 i5 20 25

Fig. 5 . VF versus ion-implant dose for various ions. All im:plants were such that most of the initial charge profile was covered b y the grow- ing PtSi. The solid curve represents an avexage of many experiments for P+.

/SPUTTER ETCH

0 200 400 600 800 I000

DEPTH ( 8 ) - Fig. 6 . Formation of a PtSi ion-implanted Schottky diode for the case

of a silicide which was expected to penetrate most of th,e implanted charge. Approximately 174 A of silicon was removed in the sputter etch process. Note that since 500 A of Pt forms e10010 A of PtSi, the outer silicide surface would be at a position corresponding to x = -375 A.

remove the implant damage for the small doses being used. Furthermore, the silicide is driven past the heavily damaged re- gion into the tails of the implant where very 1it.tle residual damage would be expected. Finally, since the reverse current does not appear to degrade substantially for the lowest im- plant doses, this argues against changes in the saturation cur- rent being the mechanism of enhanced current transport.

MODELING O F BARRIER LOWERING For a 35-keV, PSI implant, the LSS projected range is 435 A,

the straggle is 160 a, and the resulting ion profile is sketched in Fig. 6. The origin is the original Si surface. Pt is deposited on surface A following the sputter-etch, and after PtSi forma- tion, the PtSi-Si junction forms at surface "B," - 4 7 5 A away from the initial Si surface. Since this is 1.5 standard deviations beyond the peak of the implant, only a maximum of 7 percent of the implanted charge remains in a position to modify the potential barrier. Thus for 1.2 X I O l 3 cm-2, the maximum ion dose considered, only an effective dose of 8.4 X 10" cm-' is available beyond the PtSi interface for barrier lowering. Most of this will be concentrated within 150 a of this inter- face (2.5 standard deviations beyond the peak). Assuming a uniform charge distribution, this gives an equivalent implanted impurity density of approximately 5.6 X IO1' C I T I - ~ .

Within the confines of the uniform depletion approximation [ 181 , the effect of this additional charge on the properties of a

BINDELL e t al.: ION-IMPLANTED LOW-BARRIER PtSi SCHOTTKY-BARRIER DIODES 423

Schottky diode can easily be calculated. We assume a uniform density of donors N 1 from the PtSi-Si interface to a depth d, a density Nd beyond, and a depletion width W which is greater than d. Then the electric field E, at the PtSi-Si interface is given by

E,=- [ N , d + N d ( W - d ) ] 4 e (2 1

where

in which Wo is the depletion width for the unimplanted de- vice. That is

where #IBo is the barrier height of the unimplanted diode, #In is the magnitude of the energy difference between the Fermi level and the conduction band in the undepleted Si, V’ is the forward bias applied to the diode, and the rest of the symbols have their usual meaning.

For Nd = 2 x ~ m - ~ , #In = 0.2 eV and for PtSi-n-Si, (PB, S 0.85 eV. Consequently, for a typical operating point, VF = 100 mV, Wo = 1850 A. If N 1 = 5.6 X I O l 7 ~ m - ~ , as cal- culated above, and for d = 150 a, we find W = 1680 a and Es = 1.8 X lo7 V/m. This field is three times larger than the unimplanted diode interface field of 0.58 X I O 7 V/m.

The increased interface field reduces the effective barrier height due to both the Schottky effect and because of an in- crease in thermally assisted tunneling through the top of the barrier. Shannon [I91 has considered this problem for a trian- gular potential profile with image force correction and his cal- culations show that for a surface field of l .8 X I O 7 V/m the barrier lowering is less than 0.16 V. This is considerably less than we observe.

These calculations suggest that the estimated charge at the PtSi-Si interface is not sufficient to reduce the barrier height by the observed amount. Furthermore, the measured n values in the neighborhood of 2.0 suggest a strong tunneling contri- bution 1201, while our estimates indicate tunneling should be minimal. It, therefore, must be concluded there is more charge at the interface than was assumed in the above calculations.

PILEUP APPROXIMATION Up to this point the implanted ions were assumed to be in-

corporated into the PtSi. A more likely possibility is that some of the implanted ions are pushed ahead of the advancing PtSi front and pile up at the PtSi-Si interface [ 171 . The pileup results from segregation effects at the interface; solubility lim- its must also be considered if the concentrations are sufficiently high.

If all of the implanted charge at an implant dose of 1.2 X 1013 cm-’ were piled up, and if we once again assume d = 150 A, then N , = 0.8 X IO1’ ~ m - ~ , which is high enough to produce an ohmic contact whereas the resulting diode still shows minimal rectification. Thus complete pileup may not

r Pt Si

Si 02 As DOPED 1017crn-3

/+’

0 1000 2000 3000 4060” Pt si THICKNESS ( i i )

Fig. 7. The ideality factor n (+) and VF (0) versus PtSi thickness for unimplanted diodes formed on As-doped ~ r n - ~ ) epitaxial material.

be consistent with the data presented but the estimate does suggest that most of the implanted charge is available to lower the effective barrier height.

Most of the existing analytical techniques are not sufficiently sensitive to permit the direct confirmation of the pileup effect. An indirect verification was accomplished by forming PtSi of various thicknesses on an As epitaxial layer with a doping den- sity of I O l 7 ~ m - ~ . If the push-ahead mechanism is operative for As, it would be expected that as the PtSi thickness is in- creased, more As would be pushed ahead, and the barrier height, and consequently V,, would decrease. Verification of pileup is provided by the data for Fig. 7 which show that VF decreases and n increases with increasing PtSi thickness.

The shape of the potential barrier between PtSi and Si can be represented by a triangle with a slope proportional to the magnitude of the interface electric field Es. If this straight-line approximation holds to a sufficient depth into the structure, the important parameter in determining the diode properties will be E, and the exact shape of the impurity dis- tribution which is responsible for creating this field will not be of prime importance. The validity of this argument is demon- strated in Fig. 8 where V, is plotted versus V F for diodes fab- ricated under various conditions. In general, the points fall on the same universal curve for all dopants and implant condi- tions implying that the major variable which determines the ef- fective diode parameters is E,.

In order to approximately model the pileup effect, Poisson’s equation was solved numerically for an impurity density of the form

where the first term represents the initial uniform impurity density and the last the undisturbed implanted charge. The second term represents the charge piled up at the PtSi-Si inter- face which is assumed to decay from the interface with a char- acteristic decay length d.

Andrews [21] has suggested that for the values of Es we are considering (1-10 X lo7 V/m), the potentia! barrier is reduced by an amount proportional to Es, as a result of penetration of electrons near the Fermi level from the metal into the semi-

424 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-27, Irro. 2, FERRTJARY 1980

30 r I 0 1

0 100 200 3 0 0 400 VF AT lo@ (mV)

SYMBOL 0 A8 IMPLANTAT 70 kV C Sb IMPLANT AT BO kV

DOSE

0 P IMPLANT AT 35 kV Pt THICKNESS DOSE

KEY VARIABLE

P IMPLANT AT 3 5 kV DOSE ~~.

Fig. 8. VR versus VF for diodes fabricated with various ions under vari- ous conditions.

conductor. The proportionality factor a has been reported to have a value of s 3 0 i% for PtSi [6] . This barrier-lowering ef- fect was included directly into the solution of Poisson’s equa- tion in a self-consistent way since it is linear with Es. The bar- rier lowering produced by the Schottky image force varies as EjIZ and, as a result, is much more difficult to include in a self-consistent solution [6] . For simplicity, the image force lowering was treated as a perturbation, as is usually done [20] .

A numerical solution can be obtained both for the usual de- pletion approximation and for the exact case including the mobile charge [22] . However, without independent measure- ments of d and a , the model contains too many parameters to justify extensive computations. Therefore, for simplicity, a numerical solution using the depletion approximation was ob- tained, even though the validity of the depletion approxima- tion in the present case is subject to serious question when the implant is not fully depleted. A further assumption was made that the current transport across the interface is due to ther- mally assisted tunneling of carriers through the top of the bar- rier [23], and that Es determines the slope of the potential at least up to a distance for which the barrier is wide enough for tunneling to be negligible. The slope of the potential be- low the maximum was taken to be tangent to the Schottky- modified potential so that the procedure reduced to numeri- cally calculating the potential, adding the Schottky effect, and dividing the potential into straight-line segments to simplify the tunneling calculation. This current was added to the thermionic current to obtain the total current. The final po- tential is shown in Fig. 9 and the limitations of this approach have been reviewed in the literature [24], [6] . The parame- ters in the figure may be calculated from the equations re- ferred to above, and the WKB transmission factor [25] , [26] is calculable from these parameters. The total current may then be calculated by means of the formulation of Crowell and Rideout [27].

The results of this model for the case of forward bias are compared to the experimental data in Fig. 10. Re;.sonable

SLOPEZIT

SLOPfi= ES

METAL % SEMICONDUCTCR

V&

x i x 2 DEPrH - Fig. 9. Schematic diagram of the assumed potential used for the tunnel-

ling calculation. The three segments are (0, X I ) , (XI, xz), ( x z , =). The shape of the potential is not greatly affected by V A , the applied bias. In the calculation, the tunnelling effective mass w*/m was taken to be 0.3. @IN represents the potential maximum, assumed flat between (x x z ) .

I O N Or--

Jsc-l /

Pt THICKNESS

3 5 ksV

d = 15; a = IOA

-91 ‘ / /‘ EXPERIMENT CALCULATED

= 500

0 100 200 300 400 FORWARD VOLTAGE ( m v )

Fig. 10. Results of the pileup calculations compared to experiment for forward bias. Parameters used are shown in the figure.

lo’ E

REVERSE VOLTAGE (VOLTS)

Fig. 11. Results of the pileup calculations compared to experiment for the case of reverse bias.

BINDELL et al.: ION-IMPLANTED LOW-BARRIER PtSi SCHOTTKY-BARRIER DIODES 425

agreement was found for (y. = 10 A and d = 75 A and with the REFERENCES assumption that r 8 5 percent of the implanted charge was ac- tive, that is, -15 percent was lost into the PtSi phase. These parameters, arrived at by a best fit criterion, are in excellent agreement with literature values. For the same model param- eters, the results for reverse bias are compared to the experi- mental data in Fig. 11. The agreement is better for the higher ion doses. In all cases, the model underestimates the current, although the order of magnitude is reasonable, as is the slope of the calculated curves (i.e., the ideality factor n).

CONCLUSION The barrier height of PtSi-n-Si Schottky diodes can be re-

duced in a controllable manner with a shallow n+ layer formed by low-energy ion implantation. Barrier lowerings up to 200 mV have been achieved for modest ion doses (up to 8 X 10l2 cm-2) and with little degradation in the reverse characteristics. Larger lowerings result in degraded reverse characteristics and for large enough ion doses (>12 X 1OI2 cm-2) an essentially ohmic contact is obtained. Thus by varying the ion dose, the forward-diode characteristics can be changed all the way from a Schottky diode to an ohmic contact. Since the ion doses needed for barrier lowering are small, no masking of lightly doped p-type ohmic contacts (base contacts in bipolar circuits) is required during the barrier-lowering implant. The barrier lowering was found to be reproducible to within +15 mV and can be applied directly to any bipolar integrated-circuit tech- nology which uses PtSi contacts.

A model has been presented for estimating the current- voltage characteristics of ion-implanted PtSi Schottky diodes which gives reasonable agreement with experiment. An essen- tial assumption of the model is that during the formation of the PtSi, the implanted ions are swept ahead and pile up in a snow-plow fashion at the advancing PtSi-Si interface. This raises the effective doping density at the interface and pro- duces the very narrow impurity profiles which are required for the fabrication of usable devices with acceptable reverse current-voltage characteristics.

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