Investigation into optimising high switching frequency regular sampled PWM control for drives and static power converters

S.R. Bowes Y.S. Lai

Indexing terms: Pulse width modulation, High switching frequency, Microprocessor control, Drives, Stutic power converters

Abstract: A new high switching frequency regular sampled PWM control technique is presented, which significantly reduces the number of calculations required to generate PWM control in real-time. It is shown that this new PWM technique greatly simplifies the microprocessor software implementation, thereby considerably reducing the on-line computing requirements, and thus allows significantly higher switching frequency PWM to be generated using microprocessor techniques. Moreover, it is confirmed using both simulation and experimental results that this reduction in the computational burden does not significantly increase the harmonic distortion. Finally, it is shown that the new regular sampled PWM technique can be described and generated using both the conventional ‘per-phase’ and ‘space- vector’ techniques.

List of principal symbols

Per-phase P WM f, = carrier frequency fm = modulating frequency f, = sampling frequency tA and tg = active pulse times allocated to the

switching states (loo), (OlO), or (001) and (1 IO), (01 I ) , or (101)

to and t7 = null pulse times allocated to the switching states (000) and (1 1 l), respectively

w T, = sampling position T = carrier period

Ts w M = modulation index

= sample period for high frequency PWM = angular frequency of modulating wave

0 IEE, 1996 IEE Proceedings online no. 19960486 Paper first received 30th August 1995 and in revised form 27th March 1996 S.R. Bowes is, and Y.S. Lai was formerly with the Department of Electrical and Electronic Engineering, Faculty of Engineering, University of Bristol BS8 ITR. UK

N

F(T,) a k , a k + l

&, l j k i l

= number of half carrier periods between

= sampled modulating values at T, = prepulse and postpulse switching angles = prepulse and postpulse switching times

= PWM pulse widths = frequency ratio (ratio of carriedmodulat-

ing frequencies) = per unit (1 pu corresponds to maximum

fundamental voltage produced by sinu- soidal PWM before overmodulation)

samples

with respect to sampled position

FR

PU

Space vector modulation TA and Tg = active vector times allocated to the

switching states (loo), (OlO), or (001) and (]lo), (Oll), or (101)

To and T7 = null vector times allocated to the switch- ing states (000) and (1 1 I), respectively

Tz = sampling period Y = polar angle of reference vector referring

SJ. = inverter switching states y = 0, 1, 2, ..., 7 SA = inverter switching states, either (loo),

SB = inverter switching states, either (1 lo),

= voltage vector related to the switching

VA and VB = voltage vector related to switching states

vs* = reference voltage space vector

1 Introduction

to v,

(OlO), or (001)

(01 l), or (101)

state Sy, y = 0, 1, ..., 7

SA, and SB

VJ.

Recent developments in high switching frequency power devices [ I ] offer the possibility of developing ultrasonic carrier PWM control techniques [2-51. These high frequency PWM control techniques can be used to reduce the total harmonic current distortion (THD) and significantly improve the harmonic spectrum by moving the carrier and associated sideband compo- nents well away from the fundamental [6]. This reduc- tion in harmonics also reduces acoustic noise, RFI, torquehpeed ripple effects etc., and results in consider- able improvements in performance.

28 1 IEE Proc -Electr Power Appl., Vol. 143, No. 4, July I996

However, to generate ultrasonic carrier frequency PWM 'on-line' and in 'real-time' requires either a full hardware implementation or, if a software algorithm is used, a very fast microprocessor [2-51 or DSP. Fast processors are expensive, and their computational speed imposes a limit on the maximum switching fre- quency PWM that can be generated using software based techniques. To overcome these problems, it becomes necessary to simplify the PWM generating technique to reduce the computational burden imposed on the microprocessor. However, in general, this can only be done at the expense of a deterioration in the harmonic spectrum and/or the introduction of errors in the fundamental voltage modulation depth relation- ship.

This paper shows how simple modification to the conventional regular sampled PWM technique [&8] can significantly reduce the number of calculations required and thereby allow higher switching frequency PWM to be generated with the minimum deterioration in performance.

The well defined [6-81 and widely used regular sam- pled PWM technique [9-131 allows the effects on per- formance of these simple modifications to be easily understood, analysed and assessed, as demonstrated in the paper. Moreover, the modifications necessary to reduce the number of calculations can be easily incor- porated into existing microprocessor implementations [8-121 and therefore existing PWM controllers can be straightforwardly updated to produce high frequency PWM.

Finally, it will be shown how the new high frequency regular sampled PWM technique can be described and implemented using 'space vector modulation' (SVM) techniques, based on previously developed relationships [12-141. Thus the new regular sampled PWM technique can be viewed in both the conventional 'per-phase' three-phase representation and also the SVM form for both understanding the theory and implementation.

2 Theory

Regular sampled PWM has been widely used for many years [6-131, and therefore only a brief review of the basic theory sufficient to explain the developments in this paper will be provided; more details can be obtained from references [6-131.

A typical practical implementation of regular sam- pled PWM is illustrated in Fig. 1. As shown in the Fig- ure, the sinusoidal modulating wave a is sampled at regular intervals t l , r2 etc., and stored by a sample-and- hold circuit to produce an amplitude modulated wave b. Comparison of b with the triangular carrier wave c produces the points of intersection TI, T2 defining the switching edges of the PWM pulses d. The implementa- tion of Fig. l is representative of a typical analogue or discrete digital hardware implementation [6], as shown in the diagram in Fig. 2. An important feature of Fig. 2 is that the modulating frequency f,, carrier frequency f, and sampling frequency J;. are in general, as shown, independent, and therefore any desired relationship between them can be defined. The simplest relationship is to set k;. = f , and therefore to sample the modulating wave at the carrier frequency, as shown in Fig. 1. This results in only one sample being taken every carrier cycle, and therefore the sampled modulating wave is kept constant throughout the carrier period resulting in each edge of the PWM pulse being modulated equally;

282

commonly referred to as symmetric modulation [6], as illustrated in Figs. 1 and 3. Alternatively, f, = 2fc can be used such that two samples of the modulating wave are taken each carrier cycle.

30 60 90 120 150 1 t l t 2

-1 - I I

I 1 , I

I

0

-1

Fig. 1 a modulating wave, b sampled modulating wave, c carrier, d PWM wave, e fundamental voltage, f sampling points, 1 , and t2 = regular sampling instants, T, and T2 = switching instants

Symmetrical regular sampled PWMprocess

Fig.2 Regular sumpled PWM implementation

modulating wave asymmetric

symmetric

carrier

I : I :

I :

; I m';! I sym met ri c I

I

I I

I I

I : I

: I : I : I : I

I j

I : I :

PWM I :

- T1 I I 1 2 I

I I t , I b I

TI 2 T I 2 Fig. 3 Detailed comparison of symmetric and asymmetric regular sumpled P W M

IEE Proc.-Electr. Power Appl., Vol. 143, No. 4, July 1996

The first sample taken at the start of the carrier cycle is used to modulate the leading edge of the pulse and the second sample, taken at the middle of the carrier cycle, used to modulate the trailing edge, resulting in asymmetric modulation, as shown in Fig. 3. Since more samples of the modulating wave are used to produce asymmetric PWM, the harmonic spectrum is superior to that of symmetric PWM [6-8].

t t . t t t t : :: . . . . . . . .. . .. . .. . ..

. . . . . . . . . .

I : j I j j

asymmetric

T I 2 T12 Fig. 4 U asymmetrical sampled modulating wave (high sampling frequency, T , , T2, T3 etc.) b asymmetrical sampled modulating wave (low sampling frequency, T2, T,, T, etc.) c symmetrical sampled modulating wave (very low sampling fre- quency, T , etc.)

Eflects of high and low sampling frequency

One could sample at a frequency much greater than the carrier (or switching) frequency, for example, at f, = 4f, (say). This high sampling frequency condition is shown in Fig. 4a and compared with the low sample frequency condition f, = 2f , in Fig. 4b. As illustrated, both sampling conditions produce asymmetric modula- tion with the leading edge modulation the same in both cases. However, the trailing edge of the pulse, as shown in Fig. 4, is modulated by a different amount in the high sample frequency case. This is a simple example of how the sample frequency can affect the precise degree of modulation and therefore the harmonic spectrum. However, since only two samples can be used to define the PWM pulse, there are considerable advantages to be gained in sampling at the beginning and centre of the carrier period. For example, to sample at f, = 26 for asymmetric modulation (or f, = f c for symmetric modulation) provides simple relationships which can be used as the basis for an efficient microprocessor soft- ware algorithm [9-131. Additionally, only a limited number of samples need be stored in memory and these can be easily determined offline prior to programming. More importantly, the time between samples is increased to allow the pulse calculations to take place in ‘real-time’, and consequently the carrier (or switch- ing) frequency can be proportionally increased. Finally, the additional samples would not greatly improve the harmonic spectrum, particularly at high frequency ratios FR = f&fm where, because of the high number of pulses, small changes in the switching edges would not significantly change the harmonics.

Another possible relationship is to make f, < A,, that is to use less than one sample per carrier cycle, as illus-

IEE Proc -Electr. Power Appl.. Vol. 143. No. 4, Jury 1996

trated in Fig. 4c for a very low sampling frequency. To illustrate this possibility a sample taken in a previous carrier cycle, shown by T1 in Fig. 46, is used to modu- late each edge of the pulse equally in the following car- rier cycle. Thus, the number of samples of the modulating wave would be reduced and consequently the number of calculations correspondingly reduced, allowing higher switching frequencies to be generated. This is the basis of the new PWM technique described below.

I I li I I I

Fig. 5 Sampling frequency = ,/; = 2f, , sampling period = T, = Ti2, carrier frequency = /;, carrier period = T

High switching frequency asymmetrical regular sampled P WM

I I I I c

Ts= NT12 TS

I I S Is I

Fi 6 High switching frequency low sampling frequency regular sampled

Sampling frequency = f i , sampling period = T,, carrier frequency = f ; , carrier period = T , f , = 2f,JN, T, = NTi2

P#i4

The details of a typical high switching frequency asymmetric regular sampled PWM process is shown in Fig. 5. The important features of this process is the relationship f, = 2 h producing two different samples per carrier cycle, such that each consecutive pulse edge is modulated by a different amount, requiring a

283

calculation to produce each switching edge. To reduce the number of calculations required, whilst still main- taining the same switching frequency, the j , < f , condi- tion described in Fig. 4c is used in Fig. 5 to produce the modulation process shown in Fig. 6. In this Figure, the sampling frequency is reduced by N to give a sam- pling frequency relationship Ji = 2f,/N, resulting in only one sample being taken every N samples of the conven- tional asymmetric case, shown in Fig. 5.

Thus, the number of calculations required to produce the complete PWM waveform is N times less than the conventional case. This is a substantial saving in calcu- lation time which allows significantly higher switching frequencies to be used for the same number of calcula- tions. The example used in Fig. 6 is for N = 3, and as illustrated, one sample value of the modulating wave is used over three half carrier cycles, that is using T, = 3Ti2. This results in the degree of modulation being calculated once and this is then used on three consecu- tive switching edges before a new sample is used to cal- culate the next three consecutive switching edges. Thus, the new low sampling frequency regular sampling proc- ess shown in Fig. 6 can be viewed as incorporating both symmetric and asymmetric PWM characteristics.

As illustrated in Fig. 6 those pulses produced with the same sample value are symmetric and the pulses centred on a new sample value are asymmetric for odd N . Note that all pulses will be symmetric for even N .

It is important to note that, whilst the use of a sam- pling frequency lower than the carrier frequency can significantly reduce the number of calculations required, the representation of the modulating wave in the PWM waveform becomes less accurate; as evi- denced by the fixed width pulses shown in Fig. 6. This will, in general, result in a deterioration in the har- monic spectrum and the possible introduction of errors in the fundamental voltage modulation depth relation- ship. However, since it is proposed to use the new PWM technique at high switching frequencies, these effects should be relatively small, provided that the cor- rect relationship between f, and f; is maintained by choosing an appropriate N to minimise harmonics and errors. These relationships will be presented in Section 5.

I I : w t

* - - *. i T - - T I - k T i 2 ;

- 2 & 2

Fig. 7 U moddating waveform, h regular samples of modulating wave, c PWM wave- form

284

Details of usymmetric reguhr sumpled P W M

The essential features of a single modulated pulse are shown in Fig. 7. This Figure illustrates the relation- ships between the various switching angles and the degree of modulation for the kth carrier period. The relationships shown in Fig. 7 can be extended to the new high frequency PWM technique, as shown in Fig. 8, for per-phase modulation.

sample k sample k + 1 I I I I I I I I I I I I

I I I

t- I T s = X I ~ I ., I J 2 ,, ,

Fig.8 quency low sumpling frequency regukr sumpled P W M

Definition of switching un les and pulses for high switching j re-

The pulse angles 8 k , , and switching angles a,,, shown in Fig. 8 can be defined as:

pulse angle 6 k , J = - (1 + (- 1)"~ M F ( T k ) ) T 4

(? -9 1 (1) where sample index k = 0, 1 ,2 ,3 , . . . ,

intersample index j = 1,2,3, . . . , N I k N T

F R = frequency ratio, T k = - 2

and switching angle cYk,3 = T k , 3 + bk,J T

where T k , J = kT, + ( j - 1)- 2

N T and T, = ~

2 It is important to note that, in eqn. 1 6k.I = 8k,3 = 8 k . s ... etc., and 6 k , 2 = 8k,4 = ... etc., as illustrated in Fig. 8, confirming the reduction in the number of calculations required.

Eqns. 1 and 2 are generalised equations for the new PWM technique and can be simplified for N = 1 to give the switching angles for the conventional asym- metric regular sampled PWM technique [6, 81:

m

where IC = 0,1 ,2 ,3 , . . . , (2FR - 1) ( 3 )

Eqns. 3 and 4 with k even gives the switching angles for the leading edge modulation and k odd gives trail- ing edge modulation. The above eqns. 1 to 4 can be used to simulate the various regular sampled PWM techniques for harmonic spectrum analysis purposes or, together with a motor model for drive simulations. They can also be used as a basis for microprocessor software implementation and generation of regular sampled PWM, as shown in the next Section.

3 Microprocessor implementation

The asymmetric regular sampled PWM microprocessor implementation will be described first and used as a

IEE Proc-Elcclr. Power Appl.. Vol. 143, No. 4, July I996

basis for explaining the modifications necessary to pro- duce the new high switching frequency PWM tech- nique. The new PWM technique can be implemented using either an analogue or a fully digital hardware implementation [6, 71. In the case of a microprocessor software implementation [7-131, the samples of the modulating wave can be defined a priori and stored in memory i o be used in a software algorithm to calculate the PWM switching edges.

The essential features of the pulse generation process are shown in Fig. 7, from which the following equa- tions for the switching angles based on the definitions shown in Fig. 7 can be deduced.

Prepulse angle defining the leading edge: T M T 4 4

61, = - - -F(Tk)

Postpulse angle defining the trailing edge: T M T 4 4 &+l = - - P F ( T k + l ) (5)

where Tk = kTi2 and F(Tk) is the sample of the modu- lating wave at T,.

I I I I I I I I

I I I --

I I I I I I 6 ~ ( i O ; I I

I j 1 I

I I I

I- i

I I ' I I I I I _ - I I

' ( k + l ) T Tk+ 2 'k+ 1 = 2 Three-phme P WM pulse configurution for typical sanzpled period

T -

Fig. 9

These equations can be used with appropriate phase shifts for the three-phase case as shown in Fig. 9, and expressed for the prepulse leading edge angles as:

T M T 4 4 b A ( k ) - - -p(T , )

4 4 Similar equations can be derived for the postpulse trail- ing edge iingles [ 12, 131.

It is well known [6-141 that using a pure sinusoidal modulating wave does not produce the best harmonic spectrum or the maximum linear modulation range. Research investigations [lo] have shown that using a nonsinusoidal modulating wave can both considerably improve i he harmonic spectrum and greatly extend the linear modulation range. It has been shown [lo] that adding 2.5%) of the third harmonic (or zero sequence component) to the sinusoidal modulating wave mini- mises the harmonics and maximises the fundamental voltage range.

The details of the minimisation process used to pro- duce this result have been given earlier [lo], and result in an optimal modulating wave of the form:

Using this modulating wave, the linear modulation range can be extended from M = 1pu to M = 1 . 1 2 ~ ~ before overmodulation and pulse dropping occurs. This optimal modulating wave also has significant advan- tages in reducing the complexity in the microprocessor implementation [1%, 131, as described below.

Fig. 9 highlights the special characteristics associated with two possible microprocessor implementations, referred to as the: four-timer [9-131 and single-timer [ 1 1-1 31 implementations. The four-timer implementa- tion has been presented in detail [9-l2] and therefore only the single-timer approach will be considered in this paper. As will be demonstrated in the next Section the single-timer approach can be shown to be equiva- lent under certain circumstances to a very popular and widely used form of space vector modulation (SVM). Fig. 9 shows the sequential switching times to, tA, tB and t7 of the leading edge of all the pulses in the first sample period (half carrier cycle). As shown in the Fig- ure, to ( t7) corresponds to the period when all three phases are connected to the lower (upper) voltage rail represented by switching state So = (000) (S7 = (1 11)). These null states (vector) represent inactive (nonswitch- ing) states and tA and tB correspond to one of the six active (switching) states SI to S6. Thus, given that the switching limes and states are calculated in each sample period, one timer can be used to generate the three- phase PWM waveforms, hence the terminology single- timer implementatiion [l l-131.

It has been shown [12, 131 that using the optimal modulating wave of eqn. 7 produces null pulse times which are very nearly equal (maximum difference being less than 3%), therefore using to = t7 further simplifies the single-timer implementation.

The switching times can be derived directly from inspection of Fig. 9 as:

t o = t7 = & ( k )

t A S A ( k ) - k ' ( k ) (8) t B = 6 B ( k ) -. 6A(k)

This single-timer approach can be used to generate the new high frequency PWM technique with appropriate modifications and simplifications to reflect the lower sampling frequency. The approach is illustrated in Fig. 10 using the condition N = 3 which corresponds to taking a sample of the modulating wave every three half carrier cycles. As shown in this Figure, a sample e is taken at the beginning of the sample period T, and used to calculate aA1, 6,, and &!. These 6s are, in turn, used to calculate the switch1n.g times b to, t A , tB, t7 and these are stored in memory (RAM) in the form of a look-up-table (LIJT) together with the associated switching states c. This calculation is done only once at the beginning of the sample period T, and these switch- ing times are repeatedly accessed in the LUT for each subsequent N half carrier periods Ti2, as illustrated in Fig. 10.

The process used to access the LUT and output the PWM swiitching pattern is shlown in Fig. 1 I . This proc- ess consists of sequentially accessing the switching times LUT and loading these times into a timer which, when the timer has timed-out, interrupts the processor (shown as d i n Fig. lo). This, in turn, initiates the inter- rupt routine which accesses a new switching time and toggles the output to produce the appropriate switching state and changes the PWM switching pattern. The important new feature of thie process as described is

285 IEE Pvoc.-E!~cti.. Powev .4pp!, Vol. 143, No. 4, Jubi 1996

therefore the reduction in the number of calculations rcquired, involving only one calculation every N half carrier cycles, equal to NT/2, rather than every half carrier cycle T/2, as required in conventional regular sampled PWM.

I 1 I I

I

I 6A1

I I I I I

I

!

e k f l A

~~~~ ~~

Fig. 10 INustrcition of high switching fiequencj loit. sciriipling jiequency regular sumpled PWM technique, A' =3 ( I Three-phaae PWM ptiises, / I switching timcs, c s~~itchin_p pattern. d interrupt instants for onc-timcr implementation. e sampling Instants, f calculation instants

x

y-1 position

software implementation

hardware implement at i on

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

t inverter

t A t B tC Fig. 11 Diagrumnwtic representation of calculation and P W M oupzrr

4 Space vector implementation

Space vector modulation (SVM) techniques have become popular over recent years for drive control applications. It has bccn shown earlier [13] that the reg- ular sampled to = t7 PWM presented in Section 3 is exactly equivalent to SVM [14], although the two approaches have been developed from entirely different points of view.

In this Section, the comparison is taken further to include the new high frequency PWM technique and thereby to show that the new PWM technique can be implemented using both the conventional per-phase and SVM approaches.

256

The basic theory and development of SVM is well known [14], and therefore only those SVM results nec- essary to appreciate the comparison with regular sam- pled PWM will be considered. SVM is based on time- averaging techniques over a sampling period T, and can be expressed in Sector 1 (0-60") by the following equations [14]:

2 TA = T,a- sin & '1

TB = T , a L sin(7) & (9)

1 2

To = T7 = -(Tz -TA - TB) where a = V,*/(PkVDc), V,* is the reference voltge vec- tor, VDc = DC link voltage, y = angle between refer- ence voltage vector and VA, and Pi, = d(2/3).

To allow direct comparison between the active pulse times TA and T, (for SVM) and tA and tg (for per- phase regular sampled PWM), a sampling instant T, at mTk E [7c/2, 57ci61, corresponding to yk E [O, x/3] in Sec- tor 1 is considered.

O 5 I 0

- : . ~

-0.866 -1

sector 5

SA 001

s g 101

O Y 6 1 2 3

100 100 010 010

101 110 110 011

3 330360 bw L ; 5

001 ; 001

011 101

Fig. 12 Characteristics of per-phase modulation and relationship to SVM> M = Ipu

P

a

01 sector 5

Fig. 13 Charucteristics of SVM related to per-phase modulation

IEE Proc.-Electr. Power A p p l , Vol. 143, No. 4, July 1996

The general relationships between the SVM a - plane and the per-phase modulation waveforms are illustrated in Figs. 12 and 13, respectively. These gen- eral relationships are the key to comparing the two approaches and therefore can be used to generalise the result produced below for Sector 1.

From eqns. 6 and 8 for Sector 1 the regular sampled PWM active pulse times for the leading edge can be derived [13] as:

t A = 6 ~ ( k ) - 6 ~ ( k ) =

(10) Since yk = COT, - nl2, eqn. 10 can be written as:

Comparing eqn. 11 for regular sampled PWM with eqn. 9 for SVM confirms that the active pulse times are the same T,, = tA and T g = tg provided that the SVM sample time T, = TI2 and M = 4aI3. It can be shown that the same relationships hold for other Sectors. Also, since To (to) equals T7 (t7) in both SVM and reg- ular sampled PWM, all the pulse times are equal, con- firming that both approaches are exactly equivalent with regard to these switching times. It is also possible to show that the switching pattern is the same in both approaches. For example, in Sector 1 from Fig. 12 the switching pattern for SA = (100) and for SB = (110); therefore the switching pattern for the first sample period is 000 -+ 100 + 110 + 11 1. For asymmetric regular sampled PWM, as shown in Fig. 12, the maxi- mum modulating wave Fmax(k) in this sector is phase k and the minimum modulating wave F,,,(k) is phase C. Therefore, from Fig. 12 the switching pattern will be 000 + 100 -+ 110 -+ 111 for the leading edge and 111 -+ 110 -+ 100 -+ 000 for the trailing edge, noting as shown only one inverter leg switches between each transition, resulting in minimum switching frequency in the three-phase modulation case. Thus, the switching patterns for both SVM and asymmetric regular sam- pled PWM are exactly equivalent and this equivalence can be confirmed for all Sectors, as shown in Figs. 1% and 13. .

P

I F k . 14 quency regular sampled SVM (sector I ) High frequency !;ampling TA = Tl2, Vk = reference voltage vector with sam- pling, Vk,, = reference voltage vector without sampling

IEE Proc.-Electr. Power Appl., Vol. 143, No. 4, July 1996

Comprison of high and low sampling techniques for high fve-

P A

+a

Fig. 15 Comparison ojhigh and low sampling trchniques jbr high )e- quency regular .sumpled SVM (sector l ) Low frequency sampling T, = NTI2, V, = reference voltage vector with sam- pling, Vkd = reference voltage vector without sampling

The above results have proved that both the switch- ing times and switching patterns are exactly equivalent in both approaches and therefore will produce the same three-phase PWM voltage waveforms and harmonic spectra. The new high frequency regular sampled PWM technique can be defined and implemented using the SVM methods simply by noting that the sampling fre- quency has been reduced, such that the sampling time T, = NTl2. In this case, eqn. 9 can be used directly to calculated TA, TB, To, T7 at the sampling instant T,<, and these times are subsequently used repeatedly over N half carrier periods Tl2.

This situation is illustrated diagrammatically in Figs. 14 and 15, which compare the rotation of the reference voltage vector in the first sector for high frequency reg- ular sampled PWM, with high sampling frequency (Fig. 14), and low sampling frequency (Fig. 15). As shown in Fig. 14 for conventional regular sampled PWM with high sampling frequency the angular posi- tion ' /k of the reference voltage vector at the sampling instant is yk = oTk - 7d2, and therefore a sample is taken every oT12 and used in eqp. 9 (or eqn. 11) to cal- culate the active times TA and TB, and the null times To and T7. These times are used with the active switching states SA and SB, selected from the corresponding adja- cent voltage vectors, shown in Fig. 12, and the null vec- tors So and S7 to reproduce the sampled reference voltage vector over one half carrier period Tl2.

Table 1: Illustration of switching pattern for N = 3

s o - 1 s , ~ s , - 1 s , ~ s , + s s B - ~ s A - 1 s o ~ s o ~ s A - ) s B ~ s 7 leading +T/2-*?T/2-----1?72+ edge

+ T/2-*t-T/2++T/2+ trai l ing edge

In contrast, as illustrated in Fig. 15, for low sampling frequency, the samples of the reference voltage vector are taken at yk = okT, ~ 7cI2 and therefore the angular separation between samples V k and Vk+l is wNTI2. Thus, in the low sampling frequency case, only every Nth sample is used to calculate the active times T A and TB, as shown in Fig. 15. These times are repeatedly used over N half carrier cycles to approximately repro- duce the intersample reference voltage vectors Vk,!s until the next sample at Vk+l is taken and used in eqn. 9 to calculate new times. Table 1 illustrates the

287

switching pattern for N = 3 and, as shown, it represents a repetitive sequence which can be easily implemented for any N.

0.06- 0.055 0 . 0 5 -

0.045- $ 0.04- 0’ 0.035-

0.03- 0.025-

5 Simulation and experimental results

As shown in earlier Sections using the new high switch- ing frequency, low frequency sampling regular sampled PWM technique can significantly reduce the number of calculations to liN of those required for conventional regular sampled PWM. This reduction in the calcula- tions to 1/N occurs irrespective of whether per-phase or SVM methods of implementation are used. However, as shown in the previous Section and in Fig. 15, only the reference voltage vector at the sample instants V,, Vk+, etc. are accurately reproduced, and the intersam- ple reference voltage vectors Vk,]s are only approxi- mately reproduced. This results in some of the active times TA, TB (or tA, tB) being approximate in those car- rier periods where no new samples are taken, which will produce an amplitude error in the fundamental of the PWM voltage. Also, since the active times are approximate, the null vector times which depend on TA, TB will also be approximate. Note that the null vector times position the PWM switching edges (or pulses) [ 131 and therefore influence the voltage harmon- ics in the PWM output.

The following computed and experimental results show how the above approximations affect the per- formance of the resultant PWM voltage wav-eform. In particular, it is of interest to understand how these approximations change the harmonics as N increases and to identify the maximum value of N for acceptable performance. Computer simulation results for both total harmonic distortion (THD) [ 101 and fundamental voltage error are given in Figs. 16 to 22 for various fre- quency ratios FR, number of half carrier cycles between samples N and modulation index M . The fun- damental voltage error being defined as E = (A4 - VI)/ A4 (i.e. when VI = M no error exists). These Figures show the trends in PWM performance as the various parameters FR, N and A4 are varied and provide a comprehensive picture of the characteristics of the new PWM technique.

-

0.03 N = l

0.02 -0.005 0 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1 1.2

0 045- N=15 0.04-

0.035 0.03

0.025-

0 055- 0 05-

0045- 0 04-

s 0035- b‘ W. 0.02- F. 0 0 3 - 0.015-

M M Fig. 16 Computw simulution re.suits FR = 15, AT = I . 3. 5

N=15 - -

b‘

I k- 0‘

0 045- N=15 0.04-

0.035 0.03

0.025-

0 055- 0 05-

0045- 0 04-

s 0035- b‘ W. 0.02- F. 0 0 3 - 0.015-

Fig. FR =

N=15 - -

0.035- b‘ 0.03- $ 0.025-

0.02 0.015-

i-

0 . 0 2 1 0.015

0

-

0.045 N= 7 \= 7 0.041 0.06-

0.055- 0 . 0 5 -

0.045- 0.04-

0.035- 0.03-

0 .025-

0.0351 0.03

0.005 N=3 , 0.2 0.4 0.6 0.8 1 12 0 0.2 0.4 0.6 0.8 1 1.2

M M 17 Computer .simulation results 21. N = 1, 3, 7

0.015 0.01

0

0.045

0.035 0.03

s 0.025

N= 9 \N=9

k G O E L 0.005

0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1 1.2 M M

Fig. 18 Computer simulation results FR = 27. :V = I . 3 , 9

_ _ _ 0.0251 0.011 * I 0

0 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1 1.2 M M

Fig. 19 Computer simulation re.mIts FR = 45. ;\i = 1. 3 , 5. 9. 15

0.05 0.045

0.04 0.035 0.0451 N=25 0.041 N:25

0.01 t 0.005

0

0.015 - 0.005 N=15

N=15

-0.005 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1 1.2

M M Fig. 20 Coniputer simulution re.sults FR = 15. I\’ = I , 3 , 5 , 15, 25

F. 4.5

frequency rat io, FR Fig.21 THD against F R for N = 1 and 3

Computer simulation re.rults: M = 0.8 und 0 . 5 ’ ~ ~

-0,1/,,/ , ‘M=O.5,N=l , ,

15 21 27 45 75

-0 2 4 -0.3 I -0.4

frequency ratio, FR Fig.22 ConTputer simulution results: kt = 0.8 and 0 . 5 ~ ~ Fundamenlal voltage error against frequency ratio for N = I , 3

2x8 IEE Proc.-Electr. Power Appl., Vol. 143, No. 4, July 1996

It is important to note that all the results given in the Figures for the condition N = 1 correspond to conven- tional asymmetric regular sampled PWM, and there- fore this condition can be used as a basis for assessing the deterioration in performance as N is increased. It is also of interest to note that, in general, as shown in the Figures, as FR increases, the separation between the carrier frequency harmonics y = FR, and its associated sidebands [6], and the fundamental component increases. This results in a reduction in the lower-order harmonics (those closest to the fundamental) with a corresponding improvement in THD. Thus, at high FRs (or high fixed switching frequency) asynchronous PWM is ]possible with low THD and no subharmoni- ous [6] in the PWM output. As shown in Figs. 16-20, the fundamental voltage amplitude error exists for all values of N , indeed, even for N = 1 a very small error exists; albeit less than 0.5% for FR = 15, which tends to zero as FIP increases. This very small error is due to the regular sampling process, and as shown previously [6] results from the fundamental being a function of a Bes- se1 function rather than a sinewave. In practice, the fundamental error is negligible, even for low FRs, for N = 1. However, as N increases, the error in the funda- mental increases, depending upon the FR used, until it becomes unacceptable for higher N for practical appli- cations, a;s shown in Figs. 16 and 17. The same trends also exist for THD with the harmonic distortion increasing with N , as shown in Figs. 16-22.

Table 2 summarises these trends and identifies the threshold value of N , termed THN in the Table, at which the THD and fundamental voltage error becomes unacceptable. As summarised in Table 2, the THN increases as the FR increases and therefore pro- vides a significant reduction in the number of calcula- tions required. For example, for FR = 75 the THN = 15 with the nearest acceptable N = 5 , this means that the calculations can be reduced to 1/5 compared with, N = 1 (conventional) or reduce to 20% of the calculations needed previously with the conventional regular sam- pling technique. This general trend as FR increases is shown in Figs. 21 and 22, and confirms the considera- ble advantages to be gained for high frequency applica- tion of the new PWM technique.

Table 2: Threshold value of N for various frequency ratios

FR THN The nearest acceptable N I

0 . 6

0 . 5

0 . 4 -

0 . 3 -

0 2 .

0 1 .

0.

15 5 3 21 7 3 27 9 3 45 9 5

75 15 5

Which method of PWM implementation per-phase single-timer [l l--1 31, four-timer, or space vector modu- lation is adopted in a particular practical application will depend largely upon the form of the control strat- egy used. For example, if the reference voltage is given in terms of two-axis quantities, for example, in a veclor control system, using space vector modulation has some advantages since the 213 transformation is not necessary. However, if the reference voltage is given in terms of three-phase voltages, for example, in a feed- forward control system, the per-phase implementation will have some advantage, since the intensive computa-

IEE Proc.-Eiwtr. Power Appl., Voi. 143, No 4, July 1996

tion required for locating the position (sector) of the reference vector and 3/2 transformation are not neces- sary. In this case, the four-timer [ 1 1-1 31 implementa- tion will be superior to one-t imer implementation [ 12, 131.

The experimental drive system used a TMS 320 C26 DSP with the PWM control software programmed using the one-timer approach [9-141 in assembly lan- guage. It is important to note that both the four-timer and SVM regular sampled PWM [ 131 implementation have also been used for both conventional [12, 131 and the new high frequency technique and shown to give the same experimental results presented below.

Also, whilst a DSP was used in the experimental drive, other micro~processors could have been used to produce the results, and various microprocessors have been used in the past [7--13] to implement both single- timer and four-tinier based regular sampled PWM con- trollers.

Figs. 23-42 show the simiilation and experimental results for a PWM voltage and current waveforms and associated harmonic spectra. Note that these voltage harmonic spectra correspond to the line to centre-tap voltage and therefore the triple harmonics shown in these Figures will not appear in the phase voltage and the line voltage spectrum owing to the three-phase con- nection with isolated star point. Figs. 23 to 42 show the PWM and current waveform, and current harmonic spectrum which confirms that the triple harmonics have been eliminated in the current spectrum. As shown in these Figures, the experimental results agree very well with the simulation results and confirm the results of the analysis presented earlier in this paper.

Fig.23 PWM voltage and current waveforms

Experimental resuh: FR = 27, A4 = 0.8, N = 1

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 Sin7ulutiorz results: FR = 27, ,W = 0.8, N = 1 Fig.24

PWM voltage spectrum (simulatioii)

189

Current spcctrum

F i g . 2 6 Experimental results: FR = 27, M = 0.8, = 1 PWM voltilge spectruin

F i g . 2 7 E.~perirnentuI results: FR = 27, M = 0.8, :V = 3 PWM voltagc and cui-rcnt wilvefoms

6 Conclusions

A new high switching frequency low sampling fre- quency regular sampled PWM control technique has been presented which significantly reduces the number of calculations required to generate PWM control in real time.

This allows microprocessor software control to be used at much higher switching frequencies by reducing the computational burden on the microprocessor to

290

0.8

0.7

0 6

0.5

0.4

0.3

0.2

0.1

C 1 3 5 7 9 11 13 15 17 19 21 23 25 29 31 33 35 37 39 41

F i g . 2 8 PWCI \oltage spectrum

Siiizilntion wsults: FR = 27, M = 0.8, N = 3

F i g . 2 9 Elper ri?ienrcil rerults FR = 27, A4 = 0 8, N = 3 Current spectrum

F i g . 3 0 PWM \olrage \pectrum

Experirizcmicil resu1t.c: FR = 27, M = 0.8, N = 3

1/N of that required for conventional regular sampled PWM generation. It has been confirmed, using both computer simulations and experimental results, that the new PWM technique does not significantly increase the harmonic distortion. It has also been shown that a maximum N can be identified to give acceptable per- formance for a given switching frequency, or frequency ratio FR. and that this maximum N increases with increased FR. Therefore, the number of calculations required to achieve acceptable performance reduces as

K E Proc.-Electr. Power App l , Vol 143, No 4, .July 1996

the switchiing frequency increases, making the possibil- ity of operating at significantly higher switching fre- quencies feasible.

Lk

Fig.31 PWM voltage and current wavcrorms

Experimental vesu1t.x FR = 45, M = 0.8, N = 1

0.E

0.7

0.E

0.5

0. L

0.:

0.2

0 , l

0

Fig.32 Siwiulution results: F R PWM voltage spectrum

Fig.33 Current spectrum

Experimental re.vu1t.s: FR = 45, M = 0.8, N = I

The relationship between conventional regular sam- pled PWM and space vector modulation (SVM) havc been identified and shown to produce exactly the same PWM switching patterns. These relationships have been shown to be extendable to the new high-fre- quency, 1o.w sampling, PWM technique and therefore both per-phase and SVM microprocessor implementa- tions can be used for both the conventional and new

regular sampled PWM controll techniques. The modifi- cations necessary to existing regular sampled PWM microprocessor implementations are relatively straight- forward and therefore can bc easily retrofit to existing controllers to update them for high switching frequency PWM operations.

Whilst the emphasis of the paper has been on drive applications, the new technique can cqually be applied to other PWM inverter applications, for example, unin- terruptable power suppliers and static frequency con- verters.

Fig.34 PWM voltage spectrum

Experimental results: FR = 45, M = 0.8, N = I

PWM voltage and currcnt wavcforms

0

0

0

0

0

0

0

0

I

Fig.: PWM

Simubtivn resulls: FR = 45, M = 0.8, N = 3 tage spectrum

IEE Proc.-Eleclr. Power Appl. , Vol. 143, No. 4, July 1996 29 1

Fig.38 Experii72ri7lal re.su1t.s: FR = 45, A4 = 0.8. I- = 3 PWM voltage spectrum

Fig. J9 E,:uper.liizentcil r(’.(.tdlt.C: FR = 45, = 0.8 .\ = 5 I’WM v(11lagc and c ~ ~ i e i i t \\nverorms

7 Acknowledgments

The authors gratefully acknowledge the University of Bristol for providing excellent computing and experi- mental facilities, and the UK Science and Engineering Research Council for their continuing support.

1 MOHAN, N . , UNDELAND, T.M. and RORRINS. LV P. ’Poner electronics‘ (John Wilcy. 1995)

201

Fig. 41 Cui islit spectrum

E.yei~ii7ientd results: FR = 45, M = 0.8, N = 5

Fig.42 E.yei.iiiiei?fcil results: FR = 45, M = 0.8, N = 5 P\Vh,l oliaze specti mi

7 GRAhT. D.4. , and HOULDSWORTH. J.A.: ‘PWM AC motor drive employing ultrasonic carrier’. Conference records of the 1EE international conference on Power rkwtronics und variable smed drives, 1984, pp. 237-240 HOLTZ, J.. LAMMERT, P., and LOTZKAT, W.: ‘High-speed drive systems with ultrasonic MOSFET PWM inverter and single- clip microprocessor control’, IEEE Trims., 1987, IA-23, (6), pp. IOIO-1015

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BOWES, S.R.: ‘New sinnsoidal pulsewidth-modulated inverter‘. I’roc. IEE. 1975, 122, ( 1 I ) , pp. 1279 1285 BOWES, S.R.. and MOIJNT, M.J.: ‘Microprocessor control o f PWM inverters‘. /E%‘/’roc., B, 1981. EPA-128. (6), pp. 293-305 BOWES, S.K.. and CLEMENTS; K.K.: ‘Computer aided design of PWM inverter systems’. IEE 1’r.o~ B. 1982, EPA-129, ( I ) , pp. 1-17 BOWES, S.R., and DAVTES. T.: ‘R/licroprocessor-bascd develop- ment system for PWM variable-cpccd drives’. IEE Proc. H. 1985, EPA-132, (1) , pp. 18 45

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I 1 BOWES, S.R., and IMTDOUN. A.: ‘Microprocessor implementa- tion o f n m optiinal PWM switching strategies‘, TEE Proc. B, 1988, EPA-135. ( 5 ) . pp. 269-280

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