InvenSense MPU-6000 - System Plus · 2017. 1. 12. · InvenSense –MPU-6000 7 AA' Cross Section...

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© 2011 by SYSTEM PLUS CONSULTING, all rights reserved. InvenSense MPU-6000 1 9 rue Alfred Kastler - BP 10748 - 44307 Nantes Cedex 3 - France Phone : +33 (0) 240 180 916 - email : [email protected] - website : www.systemplus.fr October 2011 - Version 1 Written by: Maher SAHMIMI DISCLAIMER : System Plus Consulting provides cost studies based on its knowledge of the manufacturing and selling prices of electronic components and systems. The given values are realistic estimates which do not bind System Plus Consulting nor the manufacturers quoted in the report. System Plus Consulting is in no case responsible for the consequences related to the use which is made of the contents of this report. The quoted trademarks are property of their owners.

Transcript of InvenSense MPU-6000 - System Plus · 2017. 1. 12. · InvenSense –MPU-6000 7 AA' Cross Section...

  • © 2011 by SYSTEM PLUS CONSULTING, all rights reserved. InvenSense – MPU-6000 1

    9 rue Alfred Kastler - BP 10748 - 44307 Nantes Cedex 3 - France

    Phone : +33 (0) 240 180 916 - email : [email protected] - website : www.systemplus.fr

    October 2011 - Version 1

    Written by: Maher SAHMIMI

    DISCLAIMER : System Plus Consulting provides cost studies based on its knowledge of the manufacturing and selling prices of electronic components and systems. The given values are realistic

    estimates which do not bind System Plus Consulting nor the manufacturers quoted in the report. System Plus Consulting is in no case responsible for the consequences related to the use which is

    made of the contents of this report. The quoted trademarks are property of their owners.

    http://www.systemplus.fr/http://www.systemplus.fr/http://www.systemplus.fr/

  • © 2011 by SYSTEM PLUS CONSULTING, all rights reserved. InvenSense – MPU-6000 2

    Table of Contents

    1. Overview / Introduction……………………….…........………3

    – Executive Summary

    – Reverse Costing Methodology

    2. Company Profiles ………………………………....…………...6

    3. Physical Analysis………………………………......…………10

    – Physical Analysis Methodology

    – Package Characteristics & Markings

    – Pin Out and Signal Description

    – Block Diagram

    – Package X-Ray

    – Package Opening

    – Package Cross-Section

    – Device Structure 20

    – Die Dimensions

    – MEMS Sensor 22

    – MEMS Sensor -3-Axis Gyroscope

    – MEMS Sensor -X-Axis Gyroscope

    – MEMS Sensor -Y-Axis Gyroscope

    – MEMS Sensor -Z-Axis Gyroscope

    – MEMS Sensor -3-Axis Accelerometer

    – ASIC Marking 32

    – ASIC Bond Pad

    – ASIC Cavities

    – ASIC Delayering

    – ASIC Logic Area

    – ASIC Memory

    – Component Cross-Section 41

    – Cap View

    – Physical Data Summary 50

    4. Manufacturing Process Flow…………………………..…51

    – Global Overview

    – MEMS Process Overview

    – ASIC Process Characteristics

    – ASIC Process Characteristics

    – ASIC Process Flow

    – MEMS Process Flow

    – Description of the Wafer Fabrication Units

    5. Cost Analysis……………………………………………..…64

    – Synthesis of the Cost Analysis

    – Main Steps of Economic Analysis

    – Supply Chain Analysis

    – Yields Explanation

    – Yields Hypothesis 70

    – ASIC Front-End Cost (CMOS)

    – ASIC Front-End Cost ( Cavities)

    – ASIC Front-End Cost ( CMOS+ Cavities)

    – MEMS Front-End Cost 76

    – MEMS FE Cost per Steps

    – MEMS Wafer : Equipment Cost per Family

    – MEMS Wafer : Consumable Cost per Family

    – Total Wafer Cost 86

    – MEMS Die cost

    – Component Packaging Cost 89

    – Component Final Test Cost

    6. Estimated Price Analysis …………………………………92

    – Manufacturers financial ratios

    – Estimated manufacturer Price

    – Estimated Selling Price

    Conclusion

    Glossary

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    Package Characteristics & Markings

    Package Top view

    40 pins QFN Package

    Back view

    0.9mm

    Package Side view

    • Package type: 24-pin QFN

    • Dimensions: 4.0mm x 4.0mm x 0.9mm

    • Pin pitch: 0.5mm

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    • The ASIC die is glued on the leadframe and connected to the substrate by wire

    bonding .

    Package Opening

    Package Opening optical Views

    Package Opening SEM Views

    MEMS

    ASIC

    ASIC

    MEMS

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    Package Cross section

    MEMS CAP

    ASIC

    MEMS Gyroscope

    Leadframe

    Package

    MEMS Accelerometer

    The package is a standard QFN package

    Package Cross section

    MEMS CAP

    MEMS Sensor

    ASIC

    Wafer Thickness (µm)

    ASIC xxx

    MEMS Sensor xxx

    MEMS Cap xxx

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    Capacitive

    electrodes

    Proof mass ASIC Cavity

    X-Axis Gyro– Tilt View

    Interdigitated electrodes SEM View

    MEMS Sensor – X-Axis Gyro

    Bar linkage

    Bar

    linkage

    X Axis Gyroscope SEM view

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    AA' Cross Section Overview

    Cap

    Sensor

    ASIC

    The ASIC wafer and

    Sensor wafer are bonded

    together using an

    Aluminum/Germanium

    Eutectic bonding process.

    Germanium

    The Cap wafer and Sensor

    wafer are bonded together

    using an a fusion bonding

    process.

    Oxide

    Component Cross-Section AA’

    Saw cut

    sign

    Germanium

    Oxide

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    Bonding Cap & Sensor

    Bonding ASIC & Sensor

    Cross Section SEM View

    Cap

    Sensor

    Oxide

    Total oxide thickness ~ 2µm

    Germanium thickness ~0.25µm

    Germanium

    Sensor

    ASIC

    Component Cross-Section AA’

    Germanium connects electrically the MEMS

    Sensor and ASIC Aluminum metallization.

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    Die Cost

    • The final die cost ranges from $xxx to $xxx according to yield variations.

    • The back-end 0 cost (probe test and dicing) represents 2% of the cost of the die.

    • The yield losses costs due to probe and dicing represents 20% of the total manufacturing cost.

    – The die cost includes the rejects at

    probe test and dicing.

    – The yield losses represents the

    defective dies which are rejected.

    Low Yield Medium Yield High Yield

    Cost Breakdown Cost Breakdown Cost Breakdown

    FE : ASIC Cost29%

    FE : MEMS Cost14%

    FE : ASIC/MEMS Assembly Cost

    9%

    Foundry Overhead Cost48%

    Die Cost Breakdown (Medium Yields)

    FE : ASIC Cost 19.4% 22.7% 26.2%

    FE : MEMS Cost 10.7% 11.0% 11.2%

    FE : ASIC/MEMS Assembly Cost 8.5% 7.1% 5.4%

    Foundry Overhead Cost 35.7% 37.6% 39.5%

    BE 0 : Probe Test + Dicing Cost 1.8% 2.1% 2.5%

    BE 0 : Yield losses 23.8% 19.5% 15.2%

    Die Cost 100% 100% 100%

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    • Reverse costing analysis represents the best cost/price evaluation given the publically available data, completed with industry expert estimates.

    • Given the hypothesis presented in this analysis the major sources of correction would

    lead to a +/- 10% correction on the manufacturing cost (if all parameters are cumulated)

    • MEMS +/- 5%

    • IC +/- 8%

    • Test +/- 20%

    • Packaging +/- 10%

    • These results are open for discussion. We can re-evaluate this circuit with your

    information. Please contact us:

    Conclusion

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