Introduction To VPI’s

Introduction To VPI’s

17th October 2001

Capabilities Of PLI

C-language models. Access to programming language libraries. Delay calculation Custom output displays. Co-simulation simulation analysis.

History of PLIs

1985: verilog-XL and PLI developed by Gateway design automation.

1990: verilog-XL and PLI were released to public domain.

1993: OVI requested standardization.IEEE named it as IEEE 1364 and accepted in 1995 as the standard.

IEEE 1364-1999 proposal is yet to be approved.

History of PLIs

TF routines : developed during 1985-1988.

ACC routines: developed during 1988-1989.

OVI PLI1.0: Standardized in 1990.

OVI PLI2.0:Standardized in 1993.

Steps in a PLI registering:

Create a C function. Allocate a s_vpi_systf_data. Provide all info in the data structure. Register using vpi_register_systf(). Add the created C functions to

vlog_startup_routines array. Compile .

Structure of s_vpi_systf_data

typedef struct t_vpi_systf_data

{

int type; /* vpiSysTask or vpiSysFunc */

int sysfunctype;/* fn returns real/int/time/sized */

char *tfname;

int (*calltf)();

int (*compiletf)();

int (*sizetf)();

char *user_data;

} s_vpi_systf_data, *p_vpi_systf_data;

$hello() VPI.

int hello_calltf();

/***************************************************************

* Registration Data

***************************************************************/

void guru_hello_register()

{

s_vpi_systf_data tf_data;

tf_data.type = vpiSysTask;

tf_data.tfname = "$hello";

tf_data.calltf = hello_calltf;

tf_data.compiletf = NULL;

tf_data.sizetf = NULL;

vpi_register_systf(&tf_data);

return;

}

$hello()- continued…

/**********************************************************************

* calltf routine

*********************************************************************/

int hello_calltf(char *user_data)

{

vpi_printf("Hello\n");

return(0);

}

/*********************************************************************/

Object relations in Verilog

One to one :

Ex: port to module.(child to parent) One to many:

Ex:Module to ports.(parent to children) Many to one:

Ex: input port driven by more than one source.

Obtaining handle to objects:

vpi_handle:

vpiHandle vpi_handle (int type,vpiHandle ref);

vpi_iterate :

vpiHandle vpi_iterate(int type, vpiHandle ref); vpi_scan :

vpiHandle vpi_scan (vpiHandle itr);

Accessing Object properties:

vpi_get:

int vpi_get (int property, vpiHandle obj);

vpi_get_string:

char *vpi_get_str (int prop,vpiHandle obj);

Object type properties : vpiModule,vpiNet,vpiPort,vpiReg etc..

Object name properties: vpiName,vpiFullname,vpiDefname.

Printing in VPI applications:

vpi_printf:

int vpi_printf (char * format, ...);

Difference between vpi_printf() and printf().

Data

mod

el dia

gra

ms-

Mod

ule

.

Data

mod

el dia

gra

ms-

Port

s.

Port mismatch finding example

A vpi based utility to report all those unconnected ports/size

mismatched ports of an instance ,which are not reported

by simulator.

Port mismatch finding example:

Required portion of object diagrams:

Module ports

Module

Vpi_iterarte / vpi_scanVpi_iterarte(vpiModule,NULL)

Vpi_iterarte / vpi_scan

Recursion

Self assessment

Write a vpi based utility to report if an instantiation is done by connection by name or not.

Self assessment

Write a vpi based utility to report if any nested if-else-if structure

has more than 7 levels.

Obtaining the values of objects:

Logic value of any object can be read in a:

1. C integer.

2. C double.

3. C string.

4. C constant.

5. C aval/bval structure.

6. C structure for strength.

Routines for reading the value.

vpi_get_value: void vpi_get_value (vpiHandle obj,p_vpi_value value_p)

vpi_get_time: void vpi_get_time (vpiHandle obj, p_vpi_time time_p)

Str

uct

ure

for

s_vpi_value

:

typedef struct t_vpi_value

{

int format;

/* vpi[[Bin,Oct,Dec,Hex]Str,Scalar,Int,Real,String,

Vector,Strength,Suppress,Time,ObjType]Val */

union

{

char *str;

int scalar; /* vpi[0,1,X,Z] */

int integer;/* x/z are maped to 0*/

double real;

struct t_vpi_time *time;

struct t_vpi_vecval *vector;

struct t_vpi_strengthval *strength;

char *misc;

} value;

} s_vpi_value, *p_vpi_value;

Str

uct

ure

for s_vpi_time

typedef struct t_vpi_time

{

int type; /* [vpiScaledRealTime, vpiSimTime] */

unsigned int high, low; /* for vpiSimTime */

double real; /* for vpiScaledRealTime */

} s_vpi_time, *p_vpi_time;

Writing the value to objects:

Reverse process of reading. Routine is vpi_put_value: vpiHandle vpi_put_value(

vpiHandle obj,

p_vpi_value value_p,

p_vpi_time time_p,

int flags

);

X finding example

A vpi based utility to report all those regs/nets whose value is x/z

in the complete design.

X finding example:

Required portion of object diagrams:

Module nets

Module


Vpi_iterarte(vpiModule,NULL)


Recursion

regs

Self assessment

A vpi based utility for listing all the registers having non-zero reset

value.

Call back mechanism:

System task/function call back routines:

All calltf,compiletf and sizetf routines.

Simulation time callback routines:

These are executed whenever a specific type of event occur.

Registering a simulation callback

Events that can be used for callback: Simulation action- start/end of simulation.

Simulation features- start/end of debug mode.

Simulation time activity- end of current time step.

Simulation events - logic value changes.

vpi_register_cb: vpiHandle vpi_register_cb(p_cb_data cb_data_p);

Str

uct

ure

for s_cb_data

typedef struct t_cb_data

{

int reason; /* callback reason */

int (*cb_rtn)(); /* call routine */

vpiHandle obj; /* trigger object */

p_vpi_time time; /* callback time */

p_vpi_value value; /* trigger object value */

int index; /* index of the memory word or var

select that changed */

char *user_data;

} s_cb_data, *p_cb_data;

Organization of events in a verilog simulator: Slot1: These are executed in a way they are

encountered in the code. Active events:a) Blocking assignments.b) RHS evaluation of non-blocking.c) $display/$write.d) continuous assignment.e) Changing i/p’s and outputs of primitives.f) PLI calltf routines. Inactive events: #0 assignments.

Organization of events in a verilog simulator: Slot2:Non-blocking assignments: Update the LHS of non-blocking assignments. Slot3: Simulation Callbacks with cbReadWritesynch

reason. Slot4:Monitor Events: a. $monitor. b. $strobe. Call registered with cbReadOnlysynch reason.

Muxed d-flop example :

An environment to validate a design containing a muxed flop .

Pictorial representation of the problem.

clk

reset

enable

din

1’b0

qout

D-flop pli

compare

Test bench

design

Miscellaneous VPI functions:

file operation in VPI’s :

vpi_mcd_close() vpi_mcd_name() vpi_mcd_open() vpi_mcd_printf()

Information fetching functions :

vpi_get_cb_info() vpi_get_systf_info()

vpi_get_vlog_info()

Guidelines to maximize the performance :

Follow good c programming practices. Every call to pli routine is expensive,

use them efficiently. Avoid routines which convert logic

values to c strings. Use verilog language to model things

like parallelism , forming a shell around pli application.

Advanced topics:

Delay related operations. Creating/maintaining the instance

specific work area. Conversion routines . Tracing a many-to-one relation

(vpi_handle_multi() ).

Introduction To VPI’s

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