Introduction to Embedded Systems Rabie A. Ramadan [email protected] mbedded/ 1.

69
Introduction to Embedded Systems Rabie A. Ramadan [email protected] http://www.rabieramadan.org/classe s/2014/embedded/ 1

Transcript of Introduction to Embedded Systems Rabie A. Ramadan [email protected] mbedded/ 1.

Page 1: Introduction to Embedded Systems Rabie A. Ramadan rabieramadan@gmail.com  mbedded/ 1.

Introduction to Embedded Systems

Rabie A. [email protected]

http://www.rabieramadan.org/classes/2014/embedded/

1

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2

Welcome Back

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Class Organization

3

Attendance is very important Assignments Projects Quizzes

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Textbooks

4

TextT. Noergaard, Embedded Systems Architecture: A Comprehensive Guide for Engineers and Programmers, Elsevier, 2005

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Project

Projects• Team work ( 4 persons)

• Grading• Demonstration

• Reports

We will design a simple robot based on Arduino

Supplementary readings

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About this course

Grading• 20% Lab + Quizzes , 15% homework, 15% exam ,

50% project

Academic Dishonesty

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About this course

Things you should already know

• Digital logic design

• Number representation

• 2’s complement (int and fp)

• Binary arithmetic

• add, subtract, shift, multiply, division,

• Combinational logic

• and, or, xor, nand, nor, mux, …

• Sequential logic

• Flip-flops, registers

• Read/draw a schematic

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About this course

• Things you should have already known• Basic computer organization

• Instruction execution

• Simple assembly programming

• Processor/memory/buses• Programming

• C/C++

• Compilation and debugging

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Topics

The principles of embedded system design and its challenges

Embedded hardware architecture Embedded software development Hardware/software interfacing and debugging Processes and operating systems Advanced design techniques Other topics such as (low power design and real-time

computing) may be covered

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Things you will learn

What is the embedded system and how to design such systems

Practical skills and experiences• Commercial design softwares

• Quartus II, Nios II IDE

• Commercial hardware evaluation board• Arduino Kit

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Embedded System Design

When we talk about the computing system• PC

• Laptop

• Workstation

• Mainframe

• Super Computers … In fact, computing systems are everywhere

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Computing systems are everywhere

…wake up …

…have breakfast …

…set home safety system …

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A late model car can have as many as 65+ processors for engine control, A/C control, cruise control, audio, etc

More than 30% of the cost of a car is now in electronics

90% of all innovations will be based on electronic systems

Examples In Your Daily Life (cont’)

…get into your car …

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…on your way to your University (if any )…

Examples In Your Daily Life (cont’)

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…in your office …

Examples In Your Daily Life (cont’)

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…back home …

Examples In Your Daily Life (cont’)

          

Several hundred processors can be involved in the courseof one day for one person !

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Other Examples

• Mission critical controls• Nuclear plant control, aircraft navigation, military

equipment

• Medical equipment

• Communications

• Toys, etc

We can say: Embedded systems have been deeply ingrained in our life !

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What ??

What is the embedded system?

• Embedded System• Processor based

• General processors

• Micro controllers

• Digital signal processing (DSP)

• A subsystem

• With special purpose

• Not a general programming computer

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Processor(s)

Auxiliary Systems (power, cooling,…)

Memory

Other Hardware

ASIC/FPGA

Software A/D

D/A

Sensors

Actuators

Interconnections

Input

Output Keyboards,

Mouse,

Displays,

Switches, etcClock circuit, timer, etc

Major components

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Example: Digital Camera

Processor

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Some common characteristics

Application specific• Executes a single program, repeatedly

Tightly-constrained• Low cost, low power, small, fast, etc.

Reactive and real-time• Continually reacts to changes in the system’s

environment

• Timing is as important as the correctness

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Why Processors ?

Flexibility Easy to upgrade Easy to build complex system behavior Maintainability

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Design Challenges

Moore’s Law• Productivity Gap

Design Cost Stringent Time-to-market Design requirements (constraints)

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Moore’s Law

The transistor density of semiconductor chips would double roughly every 18 months.

--by Gordon Moore,1965 (co-founder of Intel)

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Image courtesy of Intel Corporation

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Power Consumption Challenges

0

50

100

150

200

250

300

2001 2003 2005 2007 2009 2011 2013 2015 2017

Year

Tra

ns

isto

r S

ize

(B

illio

n)

0

200

400

600

800

1000

1200

1400

Po

we

r (W

att

)Transistor

Power

Source: S. Borkar, Thousand Core Chips – A Technology Perspective, DAC, 2007

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Productivity Gap

The gap between the availability of the IC technology (increasing computing power) and the application of the IC technology.

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Design Challenges (cont’d) Moore’s Law

• Productivity Gap

Design cost • Reduce non-recurring engineering (NRE) cost

• A superior human engineer may outperform the CAD tools in designing simple embedded systems but not for systems with hundred millions to billions gates

Stringent time-to-market Design requirements (constraints)

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Design Cost

Total cost = NRE cost + Unit cost * Unit #• NRE (Non-recurring engineering cost) cost

• one time monetary cost for the products

• Unit cost• the monetary cost of manufacturing each copy of

the system, excluding NRE cost

• Ex: 1000 Units, NRE cost $5,000,000, unit cost $1000• Cost/product = (5000000+1000*1000)/1000 =

6000$

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Design Challenges (cont’d)

Moore’s Law• Productivity Gap

Design cost • Reduce non-recurring engineering (NRE)

cost

Stringent time-to-market Design requirements (constraints)

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Time-to-market• Time required to develop a

product to the point it can be sold to customers

• Market window– Period during which the product

would have highest sales

• Delays can be costly– Each week delay translates to

1% loss in relative performance

Rev

enue

s ($

)

Time (months)

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Design Challenges (cont’d)

Moore’s Law• Productivity Gap

Design cost • Reduce non-recurring engineering (NRE)

cost

Stringent time-to-market Design requirements (constraints)

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Design Requirements (Constraints)

Functionality Timing Power consumption Cost Size & Weight Safety & Reliability

• Low cost reliability with minimal redundancy Others: component acquisition, upgrades, compatibility, etc.

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The General Design Flow

In the past:

• Hardware and software design technologies were very different

• Recent maturation of synthesis enables a unified view of hardware and software

Hardware/software “codesign” High abstraction level design

requirements

specification

architecture

componentdesign

systemintegration

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Embedded Systems Design The big-bang model, in which there is essentially no planning or

processes in place before and during the development of a system.

The code-and-fix model, in which product requirements are defined but no formal processes are in place before the start of development.

The waterfall model, in which there is a process for developing a system in steps, where results of one step flow into the next step.

The spiral model, in which there is a process for developing a system in steps, and throughout the various steps, feedback is obtained and incorporated back into the process.

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Layout Transistor

1970’s

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1980’s

Transistor Gate

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1990’s

Gates

Reg

ALU

MUX

ALUs,MUXes, Regs

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1990’s-2000s’

Reg

ALU

MUX

ALUs,MUXes, Regs Proc,FPGA,ASICs

uP ASICFPGA

MEM A/D D/A

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Software Design

Instruction Set Architecture Assembly Programming (Compiler, Linker) VHDL, C programming Embedded C, Hardware C, … Graphical Language, behavioral synthesis

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Abstraction

Conceptual interpretation of a system

Abstraction Level

System Complexity

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Y-chartBehavioural Structural

Physical

System Level

Register Transfer (RT) Level

Logical Level

Circuit Level

Processors,ASICs,memory

ALU,Reg,MUX

Gates,Flip-Flops

Transistors

Macro-cells,chips

Cells, wiring

Layout

Differential Eqn.

Boolean Eqn.

RT Specifications

Algorithms,processes

Boards,SOCs

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State-of-the-Art Design

Address the complex system at high abstraction levels• Explore all degrees of design freedom

• Making some critical decisions at an early design phrase

• Reducing production cost, design cost, and development time

Emphasize on design use

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IP Reuse

IP (Intellectual Property)• A family of components that can perform

certain clusters of functions• Hard IP, e.g. layout, netlist

• Soft IP, e.g. RTOS, device driver, libraries

Reuse• Not something new

• Reduce Non-recurring Engineering (NRE) cost

• Reduce development time

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What Is an Embedded System? Embedded systems are more limited in hardware and/or

software functionality than a personal computer (PC).

• Hardware

• limitations in processing performance, power consumption, memory, hardware functionality

• software, • limitations relative to a PC—fewer applications, scaled-

down applications, no operating system (OS) or a limited OS, or less abstraction-level code.

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What Is an Embedded System? An embedded system is designed to perform a

dedicated function.

• Most embedded devices are primarily designed for one specific function.

• However, we now see devices such as personal data assistant (PDA)/cell phone hybrids, which are embedded systems designed to be able to do a variety of primary functions.

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What Is an Embedded System? An embedded system is a computer system with higher

quality and reliability requirements than other types of computer systems.

• if a car’s engine controller crashes while driving on a busy freeway or a critical medical device malfunctions during surgery, very serious problems result.

• there are also embedded devices, such as TVs, games, and cell phones, in which a malfunction is an inconvenience but not usually a life-threatening situation

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The Embedded Systems Model The system and application software layers contain all of

the software located on and being processed by the embedded system.

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Processor Basics

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Processors

Processor designed for a variety of computation tasks Carefully designed since higher NRE cost is acceptable

• NRE: Non-recurring engineering• Can yield good performance, size and power• manufacturer spreads NRE over large numbers of units

• Motorola sold half a billion 68HC05 microcontrollers in 1996 alone

Low NRE cost, short time-to-market/prototype, high flexibility• User just writes software; no processor design

Different processor types

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Processor TypesProcessor Clock speed Periph. Bus Width MIPS Power Trans. Price

General Purpose Processors Intel PIII 1GHz 2x16 K

L1, 256K L2, MMX

32 ~900 97W ~7M $900

IBM PowerPC 750X

550 MHz 2x32 K L1, 256K L2

32/64 ~1300 5W ~7M $900

MIPS R5000

250 MHz 2x32 K 2 way set assoc.

32/64 NA NA 3.6M NA

StrongARM SA-110

233 MHz None 32 268 1W 2.1M NA

Microcontroller Intel 8051

12 MHz 4K ROM, 128 RAM, 32 I/O, Timer, UART

8 ~1 ~0.2W ~10K $7

Motorola 68HC811

3 MHz 4K ROM, 192 RAM, 32 I/O, Timer, WDT, SPI

8 ~.5 ~0.1W ~10K $5

Digital Signal Processors

TI C5416 160 MHz 128K, SRAM, 3 T1 Ports, DMA, 13 ADC, 9 DAC

16/32 ~600 NA NA $34

Lucent DSP32C

80 MHz 16K Inst., 2K Data, Serial Ports, DMA

32 40 NA NA $75

Sources: Intel, Motorola, MIPS, ARM, TI, and IBM Website/Datasheet; Embedded Systems Programming, Nov. 1998

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The Von Neumann Model (Architecture)

The system passes all of its I/O through

the arithmetic logic.

It uses von Neumann execution cycle

(also called the fetch-decode-execute cycle)

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The Von Neumann Model (Cont.)

A cycle could be as follows:

1. The control unit fetches the next program instruction from the memory, using the program counter to determine where the instruction is located.

2. The instruction is decoded into a language the ALU can understand.

3. Any data operands required to execute the instruction are fetched from memory and placed into registers within the CPU.

4. The ALU executes the instruction and places the results in registers or memory.

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Instruction Processing Von Neumann execution cycle

Decode instruction

Evaluate address

Fetch operands from memory

Execute operation

Store result

Fetch instruction from memory

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The Modified Von Neumann Model

The data bus: Moves data from main memory

to the CPU registers (and vice versa).

The address bus: Holds the address of the data that

the data bus is currently accessing.

The control bus:Carries the necessary control signals that specify how the

information transfer is to take place.

Did we gain something ?

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CPU

Register Set

ALU

Control Unit (CU)

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Register Set

Fast memory locations • General Purpose

• Can be assigned by the programmer

• Special Purpose• Used only for specific functions

• Ex. PC to hold the address of instruction to be executed

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Register Set

Memory Access Registers• Memory Data Register (MDR)

• Memory Address Register (MAR)

Instruction Fetching Registers• Program Counter (PC)

• Instruction Register (IR)• To hold the fetched instruction

Condition Registers/Flags • Maintain status information.

• special program status word (PSW) register.

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Special-Purpose Address Registers

Index Register• The address of the operand is obtained by adding

a constant to the content of a register.

Stack Pointer• Push and Pop operations

• Implemented in 80x86

StackStack

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DATAPATH

Data Section of the CPU Performs certain operations on the data Local Bus

• Holds the data internally between registers

System Bus • Holds external data

• Move data between registers and memory

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One-bus Organization

Simplest organization Slow – needs 2 cycles for two operand operations Two registers are needed to save the I/p data

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Two-bus Organization

Faster than one-bus• Two operands can be fetched at the same cycle

One register (A) might be needed for the o/p data

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Two-bus Organization

One bus for the I/P (in-bus) One bus for the O/P Additional register is needed to save one of the operands

• In-bus moves the data into registers

• Out-bus moves the data out of registers

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Three-Bus Organization

Two buses are used for moving the data out of the registers (out buses)

One-bus as destination – move the data to the registers

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Fetch instructions The contents of the PC are loaded into the MAR.

The value in the PC is incremented. (This operation can be done in parallel with a memory access.)

As a result of a memory read operation, the instruction is loaded into the MDR.

The contents of the MDR are loaded into the IR.

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Fetch Example – One-bus OrganizationReads the

instruction from the memory

IR takes the instruction

data

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Group Activity

Show the same fetch on three-bus organizations?

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Fetch Example – Three-bus Organization

t0 MAR PCt1 MDR Mem[MAR]; PC PC + 4t2 IR MDR

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69

Byte Halfword Word

Registers

Memory

Memory

Word

Memory

Word

Register

Register

1. Immediate addressing

2. Register addressing

3. Base addressing

4. PC-relative addressing

5. Pseudodirect addressing

op rs rt

op rs rt

op rs rt

op

op

rs rt

Address

Address

Address

rd . . . funct

Immediate

PC

PC

+

+

Addressing modes

The operand is constant within the instruction itself

Operand is a register

The operand is at the memory location whose address is the sum of a register and a constant in the instruction

The address is the sum of the Pc and constant in the instructionJump Address is 26 bits (inst) concatenated with upper PC bits