Internal Architecture of Intel 8086,Final

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Transcript of Internal Architecture of Intel 8086,Final

Page 1: Internal Architecture of Intel 8086,Final

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Welcometo

Our Presentation

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Internal Architecture of 8086 Microprocessor

Md. Md. Ashek-E- Elahi 07105003

Md. Shahabub Arefin Chowdhury 07205007 Md. Abu Bakar Siddique 08105104

Md. Mokaddes Ali 08105029

Presented by

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Contents Introduction Basic Architecture of 8086 Internal Part of the 8086 Microprocessor Bus Interface Unit (BIU) Instruction Queue Segment register Instruction Pointer (IP) Bus Control Logic Real address generator

Execution Unit Control System and Instruction Decode Arithmetic Logic Unit (ALU) Flags General Purpose Register Pointer Registers Index Register Temporary Registers Conclusion

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Introduction

Intel 8086 is a 16 bit integer processor. It has 16-bit data bus and 20-bit address bus. The lower 16-bit address lines and 16-bit data lines are multiplexed (AD0-AD15). Since 20-bit address lines are available, 8086 can access up to 2 20 or 1 Giga byte of physical memory.

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The basic architecture of 8086 is shown below :

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Internal Part of the 8086 Microprocessor

The 8086 Microprocessor is divided into two independent functional unit.

They are-

1. Bus interface unit (BUS)

2. Execution unit (EU)

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Bus Interface Unit (BIU)

The Bus Interface Unit (BIU) sends out addresses fetches instruction from memory, reads data from port and memory and writes data to port and memory.

The functional ports of the BIU are:Instruction Queue (IQ)Segment Registers (SR)Instruction Pointer (IP)Bus Control LogicReal address generator

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Instruction Queue

The instruction queue is six bytes in length, it is first in first out resister and it use to speed up the execution of programs.

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Segment register

These registers are used to store the 16-bit starting address of the four memory segment.

They are- Code segment (CS) register.Data segment (DS) register.Stack segment (SS) register.Extra segment (ES) register.

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Instruction Pointer (IP)Instruction Pointer is designated as register IP. To access

Instruction 8086 uses the register CS and IP. The CS register contains the segment address of the next Instruction.

The IP contains the offset. So IP always hold the address of memory location (offset) of the next instruction to be executed.

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Bus Control Logic

The Bus control logic of the BIU generates all the bus control signals. Such as read and write signals for memory and input/output.

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Real address generator

The 8086 contain the on – chip logical address to physical address mapping hardware. The programmers works with the logical address which includes the six bit contains of a segment register and a six bit displacement or offset value.

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Execution UnitThe EU works in parallel with the BIU. It informs the BIU the location at which the next instruction or data is to be fetched.

The functional part of the EUControl System and Instruction Decode.Arithmetic and Logic Unit (ALU)Flag registerGeneral Purpose registersStack pointer and Base pointer registers Index registerTemporary registers.

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Control System and Instruction Decode

The control circuit of the EU directs all the internal operation of the processor. The instruction in the EU translates the instruction fetched from the memory into a series of action carried out by the EU.

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Arithmetic Logic Unit (ALU)

An arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers.

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Flags

The 16-bit flag register of the 8086 processors stores the information about the status of the processors and the status of the instruction executed most recently.There are two types of flag

Conditional flags Carry flag Parity flag Auxiliary flag Zero flag Sign flag Overflow flag

Control flags Direction flag Interrupt flag Trap flag

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General Purpose Register

These register can be used for temporary storage of 8-bit data. Certain pairs of those GPR can be used together to store 16-bit data words.

Each one of the GPR have their own special meaning:AX (Accumulator) registerBX (Base) registerCX (Count) registerDX (Data) register

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Pointer Registers

The pointer registers are usually used for storing the offset address of data elements stored in stack.

The 8086 processor has two 16-bit pointer register.Stack Pointer Register (SP)Base Pointer Register (BP)

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Index Register

The 8086 processor has two 16-bit index register. The index register are used for storing index or offset of the array elements from the memory.

Two 16-bit index register areSource index (SI)Destination index (DI)

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Temporary Registers

The EU contains temporary registers for holding operands for the ALU to be processed and just the processed data.

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Recommendation

This type chips and registers are not available also manufacturing cost is high

This section is so sensitive

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ConclusionUnlike microcontrollers, microprocessors do not have inbuilt memory. Finally we can say 8086 microprocessor set the stage for a computer and worldwide standard that would become the basis for the architecture of every computer made today.

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Thanks to all*****

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